From cc1b6028878646a2419b27e5f590b5e9fe01dc3d Mon Sep 17 00:00:00 2001 From: Eduardo Valentin Date: Mon, 20 Dec 2010 14:05:09 -0600 Subject: OMAP3630: PM: Erratum i583: disable coreoff if < ES1.2 Limitation i583: Self_Refresh Exit issue after OFF mode Issue: When device is waking up from OFF mode, then SDRC state machine sends inappropriate sequence violating JEDEC standards. Impact: OMAP3630 < ES1.2 is impacted as follows depending on the platform: CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while for all other sysclk frequencies, varied levels of instability seen based on varied parameters. CS1: impacted This patch takes option #3 as recommended by the Silicon erratum: Avoid core power domain transitioning to OFF mode. Power consumption impact is expected in this case. To do this, we route core OFF requests to RET request on the impacted revisions of silicon. Acked-by: Jean Pihet [nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit] Signed-off-by: Nishanth Menon Signed-off-by: Eduardo Valentin Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2/pm.h') diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 29663cc01a5..b4e66f9e194 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -86,6 +86,7 @@ extern unsigned int omap24xx_cpu_suspend_sz; extern unsigned int omap34xx_cpu_suspend_sz; #define PM_RTA_ERRATUM_i608 (1 << 0) +#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) extern u16 pm34xx_errata; -- cgit v1.2.3-18-g5258