From 4be052e1200ef9a574e499bb00b31a1d861bc219 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 17 Aug 2012 09:41:04 -0500 Subject: ARM: highbank: disable unused sdhci and gpio in dts These peripherals are not enabled in current systems, so turn them off. Signed-off-by: Rob Herring Acked-by: Arnd Bergmann --- arch/arm/boot/dts/highbank.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot/dts/highbank.dts') diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 0c6fc34821f..28d58727b8c 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -132,6 +132,7 @@ reg = <0xffe0e000 0x1000>; interrupts = <0 90 4>; clocks = <&eclk>; + status = "disabled"; }; memory-controller@fff00000 { @@ -156,6 +157,7 @@ interrupts = <0 14 4>; clocks = <&pclk>; clock-names = "apb_pclk"; + status = "disabled"; }; gpiof: gpio@fff31000 { @@ -166,6 +168,7 @@ interrupts = <0 15 4>; clocks = <&pclk>; clock-names = "apb_pclk"; + status = "disabled"; }; gpiog: gpio@fff32000 { @@ -176,6 +179,7 @@ interrupts = <0 16 4>; clocks = <&pclk>; clock-names = "apb_pclk"; + status = "disabled"; }; gpioh: gpio@fff33000 { @@ -186,6 +190,7 @@ interrupts = <0 17 4>; clocks = <&pclk>; clock-names = "apb_pclk"; + status = "disabled"; }; timer { -- cgit v1.2.3-18-g5258 From 185bdffb4b2997a2d4ee2e88d52a6539bde59eea Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 18 Sep 2012 21:03:42 -0500 Subject: ARM: highbank: enable coherent DMA for xgmac in dts Enable the xgmac to use the coherent DMA path in highbank.dts Signed-off-by: Rob Herring Acked-by: Arnd Bergmann --- arch/arm/boot/dts/highbank.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot/dts/highbank.dts') diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 28d58727b8c..e39a79a61e0 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -308,12 +308,14 @@ compatible = "calxeda,hb-xgmac"; reg = <0xfff50000 0x1000>; interrupts = <0 77 4 0 78 4 0 79 4>; + dma-coherent; }; ethernet@fff51000 { compatible = "calxeda,hb-xgmac"; reg = <0xfff51000 0x1000>; interrupts = <0 80 4 0 81 4 0 82 4>; + dma-coherent; }; combophy0: combo-phy@fff58000 { -- cgit v1.2.3-18-g5258 From 7d6ab9b8620bbca6718b36242113f4f069840641 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 25 Oct 2012 11:59:09 -0500 Subject: ARM: dts: Add Calxeda ECX-2000 support Separate out common dts pieces from highbank dts and add support for Calxeda ECX-2000 (Midway) SOC. Signed-off-by: Rob Herring Acked-by: Arnd Bergmann --- arch/arm/boot/dts/highbank.dts | 219 +---------------------------------------- 1 file changed, 3 insertions(+), 216 deletions(-) (limited to 'arch/arm/boot/dts/highbank.dts') diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index e39a79a61e0..a9ae5d32e80 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -69,16 +69,8 @@ reg = <0x00000000 0xff900000>; }; - chosen { - bootargs = "console=ttyAMA0"; - }; - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&intc>; - ranges; + ranges = <0x00000000 0x00000000 0xffffffff>; timer@fff10600 { compatible = "arm,cortex-a9-twd-timer"; @@ -117,178 +109,6 @@ interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; }; - sata@ffe08000 { - compatible = "calxeda,hb-ahci"; - reg = <0xffe08000 0x10000>; - interrupts = <0 83 4>; - calxeda,port-phys = <&combophy5 0 &combophy0 0 - &combophy0 1 &combophy0 2 - &combophy0 3>; - dma-coherent; - }; - - sdhci@ffe0e000 { - compatible = "calxeda,hb-sdhci"; - reg = <0xffe0e000 0x1000>; - interrupts = <0 90 4>; - clocks = <&eclk>; - status = "disabled"; - }; - - memory-controller@fff00000 { - compatible = "calxeda,hb-ddr-ctrl"; - reg = <0xfff00000 0x1000>; - interrupts = <0 91 4>; - }; - - ipc@fff20000 { - compatible = "arm,pl320", "arm,primecell"; - reg = <0xfff20000 0x1000>; - interrupts = <0 7 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - gpioe: gpio@fff30000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff30000 0x1000>; - interrupts = <0 14 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpiof: gpio@fff31000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff31000 0x1000>; - interrupts = <0 15 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpiog: gpio@fff32000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff32000 0x1000>; - interrupts = <0 16 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - gpioh: gpio@fff33000 { - #gpio-cells = <2>; - compatible = "arm,pl061", "arm,primecell"; - gpio-controller; - reg = <0xfff33000 0x1000>; - interrupts = <0 17 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - status = "disabled"; - }; - - timer { - compatible = "arm,sp804", "arm,primecell"; - reg = <0xfff34000 0x1000>; - interrupts = <0 18 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - rtc@fff35000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0xfff35000 0x1000>; - interrupts = <0 19 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - serial@fff36000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0xfff36000 0x1000>; - interrupts = <0 20 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - smic@fff3a000 { - compatible = "ipmi-smic"; - device_type = "ipmi"; - reg = <0xfff3a000 0x1000>; - interrupts = <0 24 4>; - reg-size = <4>; - reg-spacing = <4>; - }; - - sregs@fff3c000 { - compatible = "calxeda,hb-sregs"; - reg = <0xfff3c000 0x1000>; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - osc: oscillator { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <33333000>; - }; - - ddrpll: ddrpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x108>; - }; - - a9pll: a9pll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x100>; - }; - - a9periphclk: a9periphclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9periph-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - a9bclk: a9bclk { - #clock-cells = <0>; - compatible = "calxeda,hb-a9bus-clock"; - clocks = <&a9pll>; - reg = <0x104>; - }; - - emmcpll: emmcpll { - #clock-cells = <0>; - compatible = "calxeda,hb-pll-clock"; - clocks = <&osc>; - reg = <0x10C>; - }; - - eclk: eclk { - #clock-cells = <0>; - compatible = "calxeda,hb-emmc-clock"; - clocks = <&emmcpll>; - reg = <0x114>; - }; - - pclk: pclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <150000000>; - }; - }; - }; sregs@fff3c200 { compatible = "calxeda,hb-sregs-l2-ecc"; @@ -296,40 +116,7 @@ interrupts = <0 71 4 0 72 4>; }; - dma@fff3d000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0xfff3d000 0x1000>; - interrupts = <0 92 4>; - clocks = <&pclk>; - clock-names = "apb_pclk"; - }; - - ethernet@fff50000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff50000 0x1000>; - interrupts = <0 77 4 0 78 4 0 79 4>; - dma-coherent; - }; - - ethernet@fff51000 { - compatible = "calxeda,hb-xgmac"; - reg = <0xfff51000 0x1000>; - interrupts = <0 80 4 0 81 4 0 82 4>; - dma-coherent; - }; - - combophy0: combo-phy@fff58000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff58000 0x1000>; - phydev = <5>; - }; - - combophy5: combo-phy@fff5d000 { - compatible = "calxeda,hb-combophy"; - #phy-cells = <1>; - reg = <0xfff5d000 0x1000>; - phydev = <31>; - }; }; }; + +/include/ "ecx-common.dtsi" -- cgit v1.2.3-18-g5258 From 36ff67bc948292065b0f20928d7e96f261b6ddc1 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:02 -0600 Subject: ARM: dts: add device_type prop to cpu nodes on Calxeda platforms While device_type is considered deprecated, it is still needed for tools like lshw to identify cpu nodes. Signed-off-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/boot/dts/highbank.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot/dts/highbank.dts') diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index a9ae5d32e80..81e0bfa6c17 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -32,6 +32,7 @@ cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; clocks = <&a9pll>; @@ -40,6 +41,7 @@ cpu@1 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; clocks = <&a9pll>; @@ -48,6 +50,7 @@ cpu@2 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <2>; next-level-cache = <&L2>; clocks = <&a9pll>; @@ -56,6 +59,7 @@ cpu@3 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <3>; next-level-cache = <&L2>; clocks = <&a9pll>; -- cgit v1.2.3-18-g5258 From 3943deeddac65ab1d19fcc839ab58ef13a653532 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:03 -0600 Subject: ARM: dts: fix highbank cpu mpidr values With the addition of commit a0ae0240 (ARM: kernel: add device tree init map function), the cpu reg values must match the cpu mpidr register or we'll get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg value needs to be 0x90n to quiet the warnings. Signed-off-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/boot/dts/highbank.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'arch/arm/boot/dts/highbank.dts') diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 81e0bfa6c17..5927a8df562 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -30,37 +30,37 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu@900 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <0>; + reg = <0x900>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; }; - cpu@1 { + cpu@901 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <1>; + reg = <0x901>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; }; - cpu@2 { + cpu@902 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <2>; + reg = <0x902>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; }; - cpu@3 { + cpu@903 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <3>; + reg = <0x903>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; -- cgit v1.2.3-18-g5258