From c34e6e8bdd99c746b7844c937c3a2529ef2c4437 Mon Sep 17 00:00:00 2001 From: "Kevin D. Kissell" Date: Tue, 31 Mar 2009 12:59:24 +0200 Subject: MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate. Signed-off-by: Kevin D. Kissell Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mipsregs.h | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 526f327475c..1f798779378 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -1484,14 +1484,15 @@ static inline unsigned int \ set_c0_##name(unsigned int set) \ { \ unsigned int res; \ + unsigned int new; \ unsigned int omt; \ unsigned long flags; \ \ local_irq_save(flags); \ omt = __dmt(); \ res = read_c0_##name(); \ - res |= set; \ - write_c0_##name(res); \ + new = res | set; \ + write_c0_##name(new); \ __emt(omt); \ local_irq_restore(flags); \ \ @@ -1502,14 +1503,15 @@ static inline unsigned int \ clear_c0_##name(unsigned int clear) \ { \ unsigned int res; \ + unsigned int new; \ unsigned int omt; \ unsigned long flags; \ \ local_irq_save(flags); \ omt = __dmt(); \ res = read_c0_##name(); \ - res &= ~clear; \ - write_c0_##name(res); \ + new = res & ~clear; \ + write_c0_##name(new); \ __emt(omt); \ local_irq_restore(flags); \ \ @@ -1517,9 +1519,10 @@ clear_c0_##name(unsigned int clear) \ } \ \ static inline unsigned int \ -change_c0_##name(unsigned int change, unsigned int new) \ +change_c0_##name(unsigned int change, unsigned int newbits) \ { \ unsigned int res; \ + unsigned int new; \ unsigned int omt; \ unsigned long flags; \ \ @@ -1527,9 +1530,9 @@ change_c0_##name(unsigned int change, unsigned int new) \ \ omt = __dmt(); \ res = read_c0_##name(); \ - res &= ~change; \ - res |= (new & change); \ - write_c0_##name(res); \ + new = res & ~change; \ + new |= (newbits & change); \ + write_c0_##name(new); \ __emt(omt); \ local_irq_restore(flags); \ \ -- cgit v1.2.3-18-g5258 From bcf11801e77946533767bbb368130220e241d824 Mon Sep 17 00:00:00 2001 From: "Kevin D. Kissell" Date: Tue, 31 Mar 2009 13:10:32 +0200 Subject: MIPS: SMTC: Fix xxx_clockevent_init() naming conflict for SMTC Commit 779e7d41ad004946603da139da99ba775f74cb1c created a name collision in SMTC builds. The attached patch corrects this in a a not-too-terribly-ugly manner. Note that the SMTC case has to come first, because CEVT_R4K will also be true. Signed-off-by: Kevin D. Kissell Signed-off-by: Ralf Baechle --- arch/mips/include/asm/time.h | 6 +++++- arch/mips/kernel/cevt-smtc.c | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index 38a30d2ee95..e46f23f54a5 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h @@ -57,7 +57,11 @@ extern int r4k_clockevent_init(void); static inline int mips_clockevent_init(void) { -#ifdef CONFIG_CEVT_R4K +#ifdef CONFIG_MIPS_MT_SMTC + extern int smtc_clockevent_init(void); + + return smtc_clockevent_init(); +#elif CONFIG_CEVT_R4K return r4k_clockevent_init(); #else return -ENXIO; diff --git a/arch/mips/kernel/cevt-smtc.c b/arch/mips/kernel/cevt-smtc.c index 6d45e24db5b..df6f5bc6057 100644 --- a/arch/mips/kernel/cevt-smtc.c +++ b/arch/mips/kernel/cevt-smtc.c @@ -245,7 +245,7 @@ irqreturn_t c0_compare_interrupt(int irq, void *dev_id) } -int __cpuinit mips_clockevent_init(void) +int __cpuinit smtc_clockevent_init(void) { uint64_t mips_freq = mips_hpt_frequency; unsigned int cpu = smp_processor_id(); -- cgit v1.2.3-18-g5258 From b7863ee144a99ff54fee90d851e24d73f38af661 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Tue, 31 Mar 2009 18:51:27 +0200 Subject: MIPS: Alchemy: Fix AU1100 interrupt numbers off-by-one Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mach-au1x00/au1000.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h index 62f91f50b5b..87a16598ebc 100644 --- a/arch/mips/include/asm/mach-au1x00/au1000.h +++ b/arch/mips/include/asm/mach-au1x00/au1000.h @@ -715,7 +715,7 @@ enum soc_au1500_ints { #ifdef CONFIG_SOC_AU1100 enum soc_au1100_ints { AU1100_FIRST_INT = MIPS_CPU_IRQ_BASE + 8, - AU1100_UART0_INT, + AU1100_UART0_INT = AU1100_FIRST_INT, AU1100_UART1_INT, AU1100_SD_INT, AU1100_UART3_INT, -- cgit v1.2.3-18-g5258 From d16797b304a4701a7d156f47773c6d2e456b64ee Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Tue, 31 Mar 2009 18:51:28 +0200 Subject: MIPS: Alchemy: Add missing Au1200 GPIO203 interrupt Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mach-au1x00/au1000.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h index 87a16598ebc..854e95f1b07 100644 --- a/arch/mips/include/asm/mach-au1x00/au1000.h +++ b/arch/mips/include/asm/mach-au1x00/au1000.h @@ -902,8 +902,8 @@ enum soc_au1200_ints { AU1000_RTC_MATCH0_INT, AU1000_RTC_MATCH1_INT, AU1000_RTC_MATCH2_INT, - - AU1200_NAND_INT = AU1200_FIRST_INT + 23, + AU1200_GPIO_203, + AU1200_NAND_INT, AU1200_GPIO_204, AU1200_GPIO_205, AU1200_GPIO_206, -- cgit v1.2.3-18-g5258 From 1d9c114dc1702306215439cd608047ab639700db Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Tue, 31 Mar 2009 18:44:36 +0200 Subject: MIPS: au1xxx-ide: Fix build with CONFIG_PM au1xxx_power_dev_t? is never defined; get rid of all PM stuff as well since it is not in the driver source anyway. Signed-off-by: Manuel Lauss Acked-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mach-au1x00/au1xxx_ide.h | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h b/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h index 60638b8969b..5656c72de6d 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_ide.h @@ -46,20 +46,6 @@ #define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 #endif -#ifdef CONFIG_PM -/* - * This will enable the device to be powered up when write() or read() - * is called. If this is not defined, the driver will return -EBUSY. - */ -#define WAKE_ON_ACCESS 1 - -typedef struct { - spinlock_t lock; /* Used to block on state transitions */ - au1xxx_power_dev_t *dev; /* Power Managers device structure */ - unsigned stopped; /* Used to signal device is stopped */ -} pm_state; -#endif - typedef struct { u32 tx_dev_id, rx_dev_id, target_dev_id; u32 tx_chan, rx_chan; @@ -72,9 +58,6 @@ typedef struct { #endif int irq; u32 regbase; -#ifdef CONFIG_PM - pm_state pm; -#endif } _auide_hwif; /******************************************************************************/ -- cgit v1.2.3-18-g5258 From 1291417eb61d1cd3fc69e295c2e9b83c5f6a8ff9 Mon Sep 17 00:00:00 2001 From: Dmitri Vorobiev Date: Mon, 30 Mar 2009 22:53:23 +0300 Subject: MIPS: IP32: Two symbols can become static The file arch/mips/mm/sc-rm7k.c needlessly defines two global symbols: rm7k_sc_ops rm7k_tcache_enabled This patch makes these symbols static. Signed-off-by: Dmitri Vorobiev Signed-off-by: Ralf Baechle --- arch/mips/mm/sc-rm7k.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/mm/sc-rm7k.c b/arch/mips/mm/sc-rm7k.c index e3abfb2d7e8..de69bfbf506 100644 --- a/arch/mips/mm/sc-rm7k.c +++ b/arch/mips/mm/sc-rm7k.c @@ -29,7 +29,7 @@ extern unsigned long icache_way_size, dcache_way_size; #include -int rm7k_tcache_enabled; +static int rm7k_tcache_enabled; /* * Writeback and invalidate the primary cache dcache before DMA. @@ -121,7 +121,7 @@ static void rm7k_sc_disable(void) clear_c0_config(RM7K_CONF_SE); } -struct bcache_ops rm7k_sc_ops = { +static struct bcache_ops rm7k_sc_ops = { .bc_enable = rm7k_sc_enable, .bc_disable = rm7k_sc_disable, .bc_wback_inv = rm7k_sc_wback_inv, -- cgit v1.2.3-18-g5258 From 36a09d7848abf017ea11ea949372f46edc1350da Mon Sep 17 00:00:00 2001 From: Dmitri Vorobiev Date: Mon, 30 Mar 2009 22:53:24 +0300 Subject: MIPS: IP32: ip32_be_handler symbol is needlessly defined global The file arch/mips/sgi-ip32/ip32-berr.c needlessly defines the function ip32_be_handler() as global, and this patch makes it static. Signed-off-by: Dmitri Vorobiev Signed-off-by: Ralf Baechle --- arch/mips/sgi-ip32/ip32-berr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/sgi-ip32/ip32-berr.c b/arch/mips/sgi-ip32/ip32-berr.c index a278e918a01..afc1cadbba3 100644 --- a/arch/mips/sgi-ip32/ip32-berr.c +++ b/arch/mips/sgi-ip32/ip32-berr.c @@ -16,7 +16,7 @@ #include #include -int ip32_be_handler(struct pt_regs *regs, int is_fixup) +static int ip32_be_handler(struct pt_regs *regs, int is_fixup) { int data = regs->cp0_cause & 4; -- cgit v1.2.3-18-g5258 From ae5373874a393d36d0fbc1a21c1b81e52736a4f2 Mon Sep 17 00:00:00 2001 From: Dmitri Vorobiev Date: Mon, 30 Mar 2009 22:53:25 +0300 Subject: MIPS: IP32: Fix needlessly global symbols in arch/mips/sgi-ip32/ip32-irq.c The following symbols are needlessly defined global: cpuerr_irq and memerr_irq. This patch makes the symbols static. Signed-off-by: Dmitri Vorobiev Signed-off-by: Ralf Baechle --- arch/mips/sgi-ip32/ip32-irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 83a0b3c359d..5c2bf111ca6 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -112,13 +112,13 @@ static void inline flush_mace_bus(void) extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); -struct irqaction memerr_irq = { +static struct irqaction memerr_irq = { .handler = crime_memerr_intr, .flags = IRQF_DISABLED, .name = "CRIME memory error", }; -struct irqaction cpuerr_irq = { +static struct irqaction cpuerr_irq = { .handler = crime_cpuerr_intr, .flags = IRQF_DISABLED, .name = "CRIME CPU error", -- cgit v1.2.3-18-g5258 From b6d57ae97af3c38d28f066b5e47b7d58e468728a Mon Sep 17 00:00:00 2001 From: Dmitri Vorobiev Date: Mon, 30 Mar 2009 22:53:26 +0300 Subject: MIPS: gbe: Make needlessly global symbols static in drivers/video/gbefb.c The following symbols are needlessly defined global: default_mode default_var gbe_mem_phys gbe_turn_off gbefb_exit gbefb_init gbefb_setup This error was noticed by namespacecheck when compiling ip32_defconfig. This patch makes the symbols static. Signed-off-by: Dmitri Vorobiev Signed-off-by: Ralf Baechle --- drivers/video/gbefb.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/video/gbefb.c b/drivers/video/gbefb.c index fe5b519860b..1a83709f961 100644 --- a/drivers/video/gbefb.c +++ b/drivers/video/gbefb.c @@ -75,7 +75,7 @@ struct gbefb_par { static unsigned int gbe_mem_size = CONFIG_FB_GBE_MEM * 1024*1024; static void *gbe_mem; static dma_addr_t gbe_dma_addr; -unsigned long gbe_mem_phys; +static unsigned long gbe_mem_phys; static struct { uint16_t *cpu; @@ -185,8 +185,8 @@ static struct fb_videomode default_mode_LCD __initdata = { .vmode = FB_VMODE_NONINTERLACED, }; -struct fb_videomode *default_mode __initdata = &default_mode_CRT; -struct fb_var_screeninfo *default_var __initdata = &default_var_CRT; +static struct fb_videomode *default_mode __initdata = &default_mode_CRT; +static struct fb_var_screeninfo *default_var __initdata = &default_var_CRT; static int flat_panel_enabled = 0; @@ -205,7 +205,7 @@ static void gbe_reset(void) * console. */ -void gbe_turn_off(void) +static void gbe_turn_off(void) { int i; unsigned int val, x, y, vpixen_off; @@ -1097,7 +1097,7 @@ static void gbefb_create_sysfs(struct device *dev) * Initialization */ -int __init gbefb_setup(char *options) +static int __init gbefb_setup(char *options) { char *this_opt; @@ -1283,7 +1283,7 @@ static struct platform_driver gbefb_driver = { static struct platform_device *gbefb_device; -int __init gbefb_init(void) +static int __init gbefb_init(void) { int ret = platform_driver_register(&gbefb_driver); if (!ret) { @@ -1301,7 +1301,7 @@ int __init gbefb_init(void) return ret; } -void __exit gbefb_exit(void) +static void __exit gbefb_exit(void) { platform_device_unregister(gbefb_device); platform_driver_unregister(&gbefb_driver); -- cgit v1.2.3-18-g5258 From 7fc7316aa82fb3874f69689bd36134afea9c8bfd Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 1 Apr 2009 16:11:53 +0200 Subject: MIPS: Print the actual detected I-cache associativity on bootup. Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 58d9075e86f..171951d2305 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1041,7 +1041,7 @@ static void __cpuinit probe_pcache(void) printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n", icache_size >> 10, - cpu_has_vtag_icache ? "VIVT" : "VIPT", + c->icache.flags & MIPS_CACHE_VTAG ? "VIVT" : "VIPT", way_string[c->icache.ways], c->icache.linesz); printk("Primary data cache %ldkB, %s, %s, %s, linesize %d bytes\n", -- cgit v1.2.3-18-g5258 From a575b8453944c5911a2a6f51d0096fffba82dd48 Mon Sep 17 00:00:00 2001 From: Zhang Le Date: Thu, 2 Apr 2009 15:41:45 +0800 Subject: MIPS: Add Loongson cpu-feature-overrides.h I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le Signed-off-by: Ralf Baechle --- .../asm/mach-lemote/cpu-feature-overrides.h | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h diff --git a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h new file mode 100644 index 00000000000..550a10dc9db --- /dev/null +++ b/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h @@ -0,0 +1,59 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2009 Wu Zhangjin + * Copyright (C) 2009 Philippe Vachon + * Copyright (C) 2009 Zhang Le + * + * reference: /proc/cpuinfo, + * arch/mips/kernel/cpu-probe.c(cpu_probe_legacy), + * arch/mips/kernel/proc.c(show_cpuinfo), + * loongson2f user manual. + */ + +#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H +#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H + +#define cpu_dcache_line_size() 32 +#define cpu_icache_line_size() 32 +#define cpu_scache_line_size() 32 + + +#define cpu_has_32fpr 1 +#define cpu_has_3k_cache 0 +#define cpu_has_4k_cache 1 +#define cpu_has_4kex 1 +#define cpu_has_64bits 1 +#define cpu_has_cache_cdex_p 0 +#define cpu_has_cache_cdex_s 0 +#define cpu_has_counter 1 +#define cpu_has_dc_aliases 1 +#define cpu_has_divec 0 +#define cpu_has_dsp 0 +#define cpu_has_ejtag 0 +#define cpu_has_fpu 1 +#define cpu_has_ic_fills_f_dc 0 +#define cpu_has_inclusive_pcaches 1 +#define cpu_has_llsc 1 +#define cpu_has_mcheck 0 +#define cpu_has_mdmx 0 +#define cpu_has_mips16 0 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips3d 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 +#define cpu_has_mipsmt 0 +#define cpu_has_prefetch 0 +#define cpu_has_smartmips 0 +#define cpu_has_tlb 1 +#define cpu_has_tx39_cache 0 +#define cpu_has_userlocal 0 +#define cpu_has_vce 0 +#define cpu_has_vtag_icache 0 +#define cpu_has_watch 1 +#define cpu_icache_snoops_remote_store 1 + +#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */ -- cgit v1.2.3-18-g5258 From 592e527f5b7c17e9be8fc58a63c3f918827b4b92 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 6 Apr 2009 00:31:22 +0200 Subject: MIPS: Fix build error if CONFIG_CEVT_R4K is undefined. Introduced by 99aa5029937ee926e3b249369e208d7013cd381b. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/time.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index e46f23f54a5..df6a430de5e 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h @@ -61,7 +61,7 @@ static inline int mips_clockevent_init(void) extern int smtc_clockevent_init(void); return smtc_clockevent_init(); -#elif CONFIG_CEVT_R4K +#elif defined(CONFIG_CEVT_R4K) return r4k_clockevent_init(); #else return -ENXIO; -- cgit v1.2.3-18-g5258 From c7d16736b8759f45a49d318bf3a8ca7fed7b6962 Mon Sep 17 00:00:00 2001 From: David Daney Date: Thu, 16 Apr 2009 09:20:17 -0700 Subject: MIPS: Compat: Use generic 32-bit wrapers for sys_timerfd_{g,s}ettime The LTP timerfd01 test is failing (blocking forever) on the 32-bit ABIs. We need to use the compat_* wrappers for these system calls. Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/kernel/scall64-n32.S | 4 ++-- arch/mips/kernel/scall64-o32.S | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index c2c16ef9218..93cc672f452 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -405,8 +405,8 @@ EXPORT(sysn32_call_table) PTR sys_eventfd PTR sys_fallocate PTR sys_timerfd_create - PTR sys_timerfd_gettime /* 5285 */ - PTR sys_timerfd_settime + PTR compat_sys_timerfd_gettime /* 5285 */ + PTR compat_sys_timerfd_settime PTR sys_signalfd4 PTR sys_eventfd2 PTR sys_epoll_create1 diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 002fac27021..a5598b2339d 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -525,8 +525,8 @@ sys_call_table: PTR sys_eventfd PTR sys32_fallocate /* 4320 */ PTR sys_timerfd_create - PTR sys_timerfd_gettime - PTR sys_timerfd_settime + PTR compat_sys_timerfd_gettime + PTR compat_sys_timerfd_settime PTR compat_sys_signalfd4 PTR sys_eventfd2 /* 4325 */ PTR sys_epoll_create1 -- cgit v1.2.3-18-g5258 From dfe99b9c4ef62fa6ea20fa06b6f5c9819039c52d Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 16 Apr 2009 02:22:21 +0900 Subject: MIPS: RBTX4939: Fix typo in system name Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/rbtx4939/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/txx9/rbtx4939/setup.c b/arch/mips/txx9/rbtx4939/setup.c index 011e1e332f4..4199c6fd4d1 100644 --- a/arch/mips/txx9/rbtx4939/setup.c +++ b/arch/mips/txx9/rbtx4939/setup.c @@ -536,7 +536,7 @@ static void __init rbtx4939_setup(void) } struct txx9_board_vec rbtx4939_vec __initdata = { - .system = "Tothiba RBTX4939", + .system = "Toshiba RBTX4939", .prom_init = rbtx4939_prom_init, .mem_setup = rbtx4939_setup, .irq_setup = rbtx4939_irq_setup, -- cgit v1.2.3-18-g5258 From 6cec2a0ac57d2ebef495a46d7866ae86e8d0e508 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Sat, 11 Apr 2009 23:31:50 +0900 Subject: MIPS: Do not include seccomp.h from compat.h The compat.h does not need seccomp.h since TIF_32BIT was moved to thread_info.h This fixes a build error of 64-bit kernel without CONFIG_SECCOMP. Signed-off-by: Atsushi Nemoto Acked-by: : David Daney Signed-off-by: Ralf Baechle --- arch/mips/include/asm/compat.h | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h index 6c5b40905dd..f58aed354bf 100644 --- a/arch/mips/include/asm/compat.h +++ b/arch/mips/include/asm/compat.h @@ -3,7 +3,6 @@ /* * Architecture specific compatibility types */ -#include #include #include #include -- cgit v1.2.3-18-g5258 From 5d57c31e5790d44905af0459a21086dbad167d26 Mon Sep 17 00:00:00 2001 From: Zhang Le Date: Wed, 15 Apr 2009 17:01:52 +0800 Subject: MIPS: Loongson 2 needs no hazard barriers. Quoting from Loongson2FUserGuide.pdf: 5.22.1 Hazards The processor detects most of the pipeline hazards in hardware, including CP0 hazards and load hazards. No NOP instructions are required to correct instruction sequences. Signed-off-by: Zhang Le Signed-off-by: Ralf Baechle --- arch/mips/include/asm/hazards.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h index a12d971db4f..0eaf77ffbc4 100644 --- a/arch/mips/include/asm/hazards.h +++ b/arch/mips/include/asm/hazards.h @@ -138,8 +138,9 @@ do { \ __instruction_hazard(); \ } while (0) -#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ - defined(CONFIG_CPU_R5500) || defined(CONFIG_MACH_ALCHEMY) +#elif defined(CONFIG_MACH_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \ + defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \ + defined(CONFIG_CPU_R5500) /* * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer. -- cgit v1.2.3-18-g5258 From 47740eb887796608fb4c629aa6b8507a2fb6c0eb Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 19 Apr 2009 03:21:22 +0200 Subject: MIPS: Enable CLO / CLZ instructions via separate CPU property This is useful for IDT RC32332, RC32334 and NEC VR5500 processors which do not implement the full MIPS32 / MIPS64 architecture. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/bitops.h | 4 ++-- arch/mips/include/asm/cpu-features.h | 9 +++++++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index bac4a960b24..b1e9e97a9c7 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -567,7 +567,7 @@ static inline unsigned long __fls(unsigned long word) int num; if (BITS_PER_LONG == 32 && - __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) { + __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { __asm__( " .set push \n" " .set mips32 \n" @@ -644,7 +644,7 @@ static inline int fls(int x) { int r; - if (__builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r) { + if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { __asm__("clz %0, %1" : "=r" (x) : "r" (x)); return 32 - x; diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index a0d14f85b78..c0047f86133 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -147,6 +147,15 @@ #define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \ cpu_has_mips64r1 | cpu_has_mips64r2) +/* + * MIPS32, MIPS64, VR5500, IDT32332, IDT32334 and maybe a few other + * pre-MIPS32/MIPS53 processors have CLO, CLZ. For 64-bit kernels + * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ. + */ +# ifndef cpu_has_clo_clz +# define cpu_has_clo_clz cpu_has_mips_r +# endif + #ifndef cpu_has_dsp #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) #endif -- cgit v1.2.3-18-g5258 From 4f29c057aa81c5440f06b716f768ba9f8a041fe9 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 23 Jan 2009 00:42:11 +0900 Subject: MIPS: Synchronize dma_map_page and dma_map_single Synchronize dma_map_page/dma_unmap_page and dma_map_single/dma_unmap_single. This will reduce unnecessary writebacks and invalidates. [Ralf: make dma_unmap_page an inline function.] Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/include/asm/dma-mapping.h | 9 +++++++-- arch/mips/mm/dma-default.c | 19 +------------------ 2 files changed, 8 insertions(+), 20 deletions(-) diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h index c64afb40cd0..d16afddb09a 100644 --- a/arch/mips/include/asm/dma-mapping.h +++ b/arch/mips/include/asm/dma-mapping.h @@ -24,8 +24,13 @@ extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction); extern dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset, size_t size, enum dma_data_direction direction); -extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, enum dma_data_direction direction); + +static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, + size_t size, enum dma_data_direction direction) +{ + dma_unmap_single(dev, dma_address, size, direction); +} + extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction); extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index bed56f1ac83..4fdb7f5216b 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -209,7 +209,7 @@ dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long addr; addr = (unsigned long) page_address(page) + offset; - dma_cache_wback_inv(addr, size); + __dma_sync(addr, size, direction); } return plat_map_dma_mem_page(dev, page) + offset; @@ -217,23 +217,6 @@ dma_addr_t dma_map_page(struct device *dev, struct page *page, EXPORT_SYMBOL(dma_map_page); -void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - - if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) { - unsigned long addr; - - addr = dma_addr_to_virt(dma_address); - dma_cache_wback_inv(addr, size); - } - - plat_unmap_dma_mem(dev, dma_address); -} - -EXPORT_SYMBOL(dma_unmap_page); - void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, enum dma_data_direction direction) { -- cgit v1.2.3-18-g5258 From 740ebe4a54fae1705705ec87ce511b16ffb50659 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 3 Apr 2009 01:01:21 +0900 Subject: MIPS: TXx9: Fix possible overflow in clock calculations Addition of -fwrapv option in 2.6.29 discloses possible overflow with signed arithmetics. For example, result of "a * 6 / 12" (int a = 400000000) is 200000000 without -fwrapv but -157913941 with -fwrapv. Change some variable to unsigned to avoid such overflows. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/txx9/generic/setup_tx4927.c | 2 +- arch/mips/txx9/generic/setup_tx4938.c | 2 +- arch/mips/txx9/generic/setup_tx4939.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/mips/txx9/generic/setup_tx4927.c b/arch/mips/txx9/generic/setup_tx4927.c index 914e93c6263..1093549df1a 100644 --- a/arch/mips/txx9/generic/setup_tx4927.c +++ b/arch/mips/txx9/generic/setup_tx4927.c @@ -88,7 +88,7 @@ void __init tx4927_setup(void) { int i; __u32 divmode; - int cpuclk = 0; + unsigned int cpuclk = 0; u64 ccfg; txx9_reg_res_init(TX4927_REV_PCODE(), TX4927_REG_BASE, diff --git a/arch/mips/txx9/generic/setup_tx4938.c b/arch/mips/txx9/generic/setup_tx4938.c index f0844f891f0..3925219b897 100644 --- a/arch/mips/txx9/generic/setup_tx4938.c +++ b/arch/mips/txx9/generic/setup_tx4938.c @@ -93,7 +93,7 @@ void __init tx4938_setup(void) { int i; __u32 divmode; - int cpuclk = 0; + unsigned int cpuclk = 0; u64 ccfg; txx9_reg_res_init(TX4938_REV_PCODE(), TX4938_REG_BASE, diff --git a/arch/mips/txx9/generic/setup_tx4939.c b/arch/mips/txx9/generic/setup_tx4939.c index 7a25b573e9b..c2bf150c883 100644 --- a/arch/mips/txx9/generic/setup_tx4939.c +++ b/arch/mips/txx9/generic/setup_tx4939.c @@ -114,7 +114,7 @@ void __init tx4939_setup(void) int i; __u32 divmode; __u64 pcfg; - int cpuclk = 0; + unsigned int cpuclk = 0; txx9_reg_res_init(TX4939_REV_PCODE(), TX4939_REG_BASE, TX4939_REG_SIZE); -- cgit v1.2.3-18-g5258 From c52399bece85cd4b157dd772e9f20551f9f18d2f Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 2 Apr 2009 14:07:10 +0200 Subject: MIPS: Cavium: Add support for 8k and 32k page sizes. Beyond the requirements of the architecture standard Cavium also supports 8k and 32k pages. Signed-off-by: Ralf Baechle Acked-by: David Daney --- arch/mips/Kconfig | 16 ++++++++++++---- arch/mips/include/asm/mipsregs.h | 11 +++++++++++ arch/mips/include/asm/page.h | 3 +++ arch/mips/include/asm/pgtable-64.h | 6 ++++++ arch/mips/include/asm/thread_info.h | 3 +++ arch/mips/lib/dump_tlb.c | 9 +++++++++ 6 files changed, 44 insertions(+), 4 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 998e5db8cc0..023aa2d4650 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1411,13 +1411,12 @@ config PAGE_SIZE_4KB config PAGE_SIZE_8KB bool "8kB" - depends on EXPERIMENTAL && CPU_R8000 + depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON help Using 8kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available - only on the R8000 processor. Not that at the time of this writing - this option is still high experimental; there are also issues with - compatibility of user applications. + only on R8000 and cnMIPS processors. Note that you will need a + suitable Linux distribution to support this. config PAGE_SIZE_16KB bool "16kB" @@ -1428,6 +1427,15 @@ config PAGE_SIZE_16KB all non-R3000 family processors. Note that you will need a suitable Linux distribution to support this. +config PAGE_SIZE_32KB + bool "32kB" + depends on CPU_CAVIUM_OCTEON + help + Using 32kB page size will result in higher performance kernel at + the price of higher memory consumption. This option is available + only on cnMIPS cores. Note that you will need a suitable Linux + distribution to support this. + config PAGE_SIZE_64KB bool "64kB" depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 1f798779378..0ef30c81fea 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -184,12 +184,19 @@ #else #define PM_4K 0x00000000 +#define PM_8K 0x00002000 #define PM_16K 0x00006000 +#define PM_32K 0x0000e000 #define PM_64K 0x0001e000 +#define PM_128K 0x0003e000 #define PM_256K 0x0007e000 +#define PM_512K 0x000fe000 #define PM_1M 0x001fe000 +#define PM_2M 0x003fe000 #define PM_4M 0x007fe000 +#define PM_8M 0x00ffe000 #define PM_16M 0x01ffe000 +#define PM_32M 0x03ffe000 #define PM_64M 0x07ffe000 #define PM_256M 0x1fffe000 #define PM_1G 0x7fffe000 @@ -201,8 +208,12 @@ */ #ifdef CONFIG_PAGE_SIZE_4KB #define PM_DEFAULT_MASK PM_4K +#elif defined(CONFIG_PAGE_SIZE_8KB) +#define PM_DEFAULT_MASK PM_8K #elif defined(CONFIG_PAGE_SIZE_16KB) #define PM_DEFAULT_MASK PM_16K +#elif defined(CONFIG_PAGE_SIZE_32KB) +#define PM_DEFAULT_MASK PM_32K #elif defined(CONFIG_PAGE_SIZE_64KB) #define PM_DEFAULT_MASK PM_64K #else diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index fe7a88ea066..9f946e4ca05 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h @@ -23,6 +23,9 @@ #ifdef CONFIG_PAGE_SIZE_16KB #define PAGE_SHIFT 14 #endif +#ifdef CONFIG_PAGE_SIZE_32KB +#define PAGE_SHIFT 15 +#endif #ifdef CONFIG_PAGE_SIZE_64KB #define PAGE_SHIFT 16 #endif diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h index 943515f0ef8..4ed9d1bba2b 100644 --- a/arch/mips/include/asm/pgtable-64.h +++ b/arch/mips/include/asm/pgtable-64.h @@ -83,6 +83,12 @@ #define PMD_ORDER 0 #define PTE_ORDER 0 #endif +#ifdef CONFIG_PAGE_SIZE_32KB +#define PGD_ORDER 0 +#define PUD_ORDER aieeee_attempt_to_allocate_pud +#define PMD_ORDER 0 +#define PTE_ORDER 0 +#endif #ifdef CONFIG_PAGE_SIZE_64KB #define PGD_ORDER 0 #define PUD_ORDER aieeee_attempt_to_allocate_pud diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index 676aa2ae191..143a48136a4 100644 --- a/arch/mips/include/asm/thread_info.h +++ b/arch/mips/include/asm/thread_info.h @@ -75,6 +75,9 @@ register struct thread_info *__current_thread_info __asm__("$28"); #ifdef CONFIG_PAGE_SIZE_16KB #define THREAD_SIZE_ORDER (0) #endif +#ifdef CONFIG_PAGE_SIZE_32KB +#define THREAD_SIZE_ORDER (0) +#endif #ifdef CONFIG_PAGE_SIZE_64KB #define THREAD_SIZE_ORDER (0) #endif diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index 779821cd54a..3f69725556a 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -19,6 +19,15 @@ static inline const char *msk2str(unsigned int mask) case PM_16K: return "16kb"; case PM_64K: return "64kb"; case PM_256K: return "256kb"; +#ifdef CONFIG_CPU_CAVIUM_OCTEON + case PM_8K: return "8kb"; + case PM_32K: return "32kb"; + case PM_128K: return "128kb"; + case PM_512K: return "512kb"; + case PM_2M: return "2Mb"; + case PM_8M: return "8Mb"; + case PM_32M: return "32Mb"; +#endif #ifndef CONFIG_CPU_VR41XX case PM_1M: return "1Mb"; case PM_4M: return "4Mb"; -- cgit v1.2.3-18-g5258 From 237e5a3443e5531336b880bbaf3e7bac110330f7 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 20 Apr 2009 13:43:05 +0200 Subject: MIPS: Kconfig: Delete duplicate definition of RWSEM_GENERIC_SPINLOCK. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 023aa2d4650..09b1287a92c 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1966,10 +1966,6 @@ config SECCOMP endmenu -config RWSEM_GENERIC_SPINLOCK - bool - default y - config LOCKDEP_SUPPORT bool default y -- cgit v1.2.3-18-g5258 From ad058e95f943e26205aa916b83b85ccb21bd4812 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Wed, 22 Apr 2009 08:01:48 +0200 Subject: MIPS: Alchemy: Timer build fix Fix breakage introduced by 8e19608e8b5c001e4a66ce482edc474f05fb7355. Signed-off-by: Manuel Lauss Signed-off-by: Ralf Baechle --- arch/mips/alchemy/common/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index f58d4ffb894..33fbae79af5 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c @@ -44,7 +44,7 @@ extern int allow_au1k_wait; /* default off for CP0 Counter */ -static cycle_t au1x_counter1_read(void) +static cycle_t au1x_counter1_read(struct clocksource *cs) { return au_readl(SYS_RTCREAD); } -- cgit v1.2.3-18-g5258 From 1699e5c9c414f0e3b393eb87c4acfc319fe7a1c4 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Tue, 21 Apr 2009 23:31:12 +0200 Subject: MIPS: IP27: Fix clash with NMI_OFFSET from hardirq.h There was already a define for NMI_OFFSET in asm/sn/addr.h, which now clashes with linux/hardirq.h. Rename the one in sn/addr.h to fix IP27 builds.. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- arch/mips/include/asm/sn/addrs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/sn/addrs.h b/arch/mips/include/asm/sn/addrs.h index fec9bdd3491..3a56d90abfa 100644 --- a/arch/mips/include/asm/sn/addrs.h +++ b/arch/mips/include/asm/sn/addrs.h @@ -359,11 +359,11 @@ TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice)) #define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size -#define NMI_OFFSET(nasid, slice) \ +#define SN_NMI_OFFSET(nasid, slice) \ (KLD_NMI(nasid)->offset + \ KLD_NMI(nasid)->stride * (slice)) #define NMI_ADDR(nasid, slice) \ - TO_NODE_UNCAC((nasid), NMI_OFFSET(nasid, slice)) + TO_NODE_UNCAC((nasid), SN_NMI_OFFSET(nasid, slice)) #define NMI_SIZE(nasid) KLD_NMI(nasid)->size #define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset -- cgit v1.2.3-18-g5258 From d0aab922b19aaaef13c946236cc71ab9b7f895ee Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 27 Apr 2009 15:31:34 +0200 Subject: MIPS: Make access_ok() sideeffect proof. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/uaccess.h | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h index 09ff5bb1744..42b9cec2ee9 100644 --- a/arch/mips/include/asm/uaccess.h +++ b/arch/mips/include/asm/uaccess.h @@ -104,11 +104,21 @@ #define __access_mask get_fs().seg -#define __access_ok(addr, size, mask) \ - (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0) +#define __access_ok(addr, size, mask) \ +({ \ + const volatile void __user *__up = addr; \ + unsigned long __addr = (unsigned long) __up; \ + unsigned long __size = size; \ + unsigned long __mask = mask; \ + unsigned long __ok; \ + \ + __ok = (signed long)(__mask & (__addr | (__addr + __size) | \ + __ua_size(__size))); \ + __ok == 0; \ +}) #define access_ok(type, addr, size) \ - likely(__access_ok((unsigned long)(addr), (size), __access_mask)) + likely(__access_ok((addr), (size), __access_mask)) /* * put_user: - Write a simple value into user space. -- cgit v1.2.3-18-g5258 From ed01b3d240b76dc1b93d08833832f9ce51a11f02 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 27 Apr 2009 16:46:21 +0200 Subject: MIPS: Make uaccess.h slightly more sparse friendly. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/uaccess.h | 39 +++++++++++++++++++++++++++------------ 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h index 42b9cec2ee9..5c0876073f1 100644 --- a/arch/mips/include/asm/uaccess.h +++ b/arch/mips/include/asm/uaccess.h @@ -104,17 +104,17 @@ #define __access_mask get_fs().seg -#define __access_ok(addr, size, mask) \ -({ \ - const volatile void __user *__up = addr; \ - unsigned long __addr = (unsigned long) __up; \ - unsigned long __size = size; \ - unsigned long __mask = mask; \ - unsigned long __ok; \ - \ - __ok = (signed long)(__mask & (__addr | (__addr + __size) | \ - __ua_size(__size))); \ - __ok == 0; \ +#define __access_ok(addr, size, mask) \ +({ \ + unsigned long __addr = (unsigned long) (addr); \ + unsigned long __size = size; \ + unsigned long __mask = mask; \ + unsigned long __ok; \ + \ + __chk_user_ptr(addr); \ + __ok = (signed long)(__mask & (__addr | (__addr + __size) | \ + __ua_size(__size))); \ + __ok == 0; \ }) #define access_ok(type, addr, size) \ @@ -235,6 +235,7 @@ do { \ ({ \ int __gu_err; \ \ + __chk_user_ptr(ptr); \ __get_user_common((x), size, ptr); \ __gu_err; \ }) @@ -315,6 +316,7 @@ do { \ __typeof__(*(ptr)) __pu_val; \ int __pu_err = 0; \ \ + __chk_user_ptr(ptr); \ __pu_val = (x); \ switch (size) { \ case 1: __put_user_asm("sb", ptr); break; \ @@ -882,7 +884,20 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); __cu_len; \ }) -#define __copy_in_user(to, from, n) __copy_from_user(to, from, n) +#define __copy_in_user(to, from, n) \ +({ \ + void __user *__cu_to; \ + const void __user *__cu_from; \ + long __cu_len; \ + \ + might_sleep(); \ + __cu_to = (to); \ + __cu_from = (from); \ + __cu_len = (n); \ + __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ + __cu_len); \ + __cu_len; \ +}) #define copy_in_user(to, from, n) \ ({ \ -- cgit v1.2.3-18-g5258 From 01caec8396eff7d519e6d85c5a1c860e7d4714e5 Mon Sep 17 00:00:00 2001 From: Shane McDonald Date: Mon, 27 Apr 2009 23:50:21 -0600 Subject: MIPS: MSP71xx: Resolve multiple definition of plat_timer_setup There have been a number of compile problems with the msp71xx configuration ever since it was included in the linux-mips.org repository. This patch resolves the "multiple definition of plat_timer_setup" problem, and creates the required get_c0_compare_int function. This patch has been compile-tested against the current HEAD. Signed-off-by: Shane McDonald Signed-off-by: Ralf Baechle --- arch/mips/pmc-sierra/msp71xx/msp_time.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/mips/pmc-sierra/msp71xx/msp_time.c b/arch/mips/pmc-sierra/msp71xx/msp_time.c index 7cfeda5a651..cca64e15f57 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_time.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_time.c @@ -81,10 +81,7 @@ void __init plat_time_init(void) mips_hpt_frequency = cpu_rate/2; } -void __init plat_timer_setup(struct irqaction *irq) +unsigned int __init get_c0_compare_int(void) { -#ifdef CONFIG_IRQ_MSP_CIC - /* we are using the vpe0 counter for timer interrupts */ - setup_irq(MSP_INT_VPE0_TIMER, irq); -#endif + return MSP_INT_VPE0_TIMER; } -- cgit v1.2.3-18-g5258 From 005076a16bd4c5ea60905ff475e8af57d60578f1 Mon Sep 17 00:00:00 2001 From: Shane McDonald Date: Mon, 27 Apr 2009 23:52:25 -0600 Subject: MIPS: MSP71xx: Resolve use of non-existent GPIO routines in msp71xx reset There have been a number of compile problems with the msp71xx configuration ever since it was included in the linux-mips.org repository. This patch resolves compilation problems with attempting to reset the board using non-existent GPIO routines. This patch has been compile-tested against the current HEAD. Signed-off-by: Shane McDonald Signed-off-by: Ralf Baechle --- arch/mips/pmc-sierra/msp71xx/msp_setup.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/mips/pmc-sierra/msp71xx/msp_setup.c b/arch/mips/pmc-sierra/msp71xx/msp_setup.c index c93675615f5..a54e85b3cf2 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_setup.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_setup.c @@ -21,7 +21,6 @@ #if defined(CONFIG_PMC_MSP7120_GW) #include -#include #define MSP_BOARD_RESET_GPIO 9 #endif @@ -88,11 +87,8 @@ void msp7120_reset(void) * as GPIO char driver may not be enabled and it would look up * data inRAM! */ - set_value_reg32(GPIO_CFG3_REG, - basic_mode_mask(MSP_BOARD_RESET_GPIO), - basic_mode(MSP_GPIO_OUTPUT, MSP_BOARD_RESET_GPIO)); - set_reg32(GPIO_DATA3_REG, - basic_data_mask(MSP_BOARD_RESET_GPIO)); + set_value_reg32(GPIO_CFG3_REG, 0xf000, 0x8000); + set_reg32(GPIO_DATA3_REG, 8); /* * In case GPIO9 doesn't reset the board (jumper configurable!) -- cgit v1.2.3-18-g5258 From ef41f4600f05a4e973c3ac72869c18269567b319 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 28 Apr 2009 14:17:54 +0200 Subject: MIPS: uaccess: Switch lock annotations to might_fault(). Signed-off-by: Ralf Baechle --- arch/mips/include/asm/checksum.h | 4 ++-- arch/mips/include/asm/uaccess.h | 37 +++++++++++++++++++++---------------- 2 files changed, 23 insertions(+), 18 deletions(-) diff --git a/arch/mips/include/asm/checksum.h b/arch/mips/include/asm/checksum.h index 290485ac540..f2f7c6c264d 100644 --- a/arch/mips/include/asm/checksum.h +++ b/arch/mips/include/asm/checksum.h @@ -40,7 +40,7 @@ static inline __wsum csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *err_ptr) { - might_sleep(); + might_fault(); return __csum_partial_copy_user((__force void *)src, dst, len, sum, err_ptr); } @@ -53,7 +53,7 @@ static inline __wsum csum_and_copy_to_user(const void *src, void __user *dst, int len, __wsum sum, int *err_ptr) { - might_sleep(); + might_fault(); if (access_ok(VERIFY_WRITE, dst, len)) return __csum_partial_copy_user(src, (__force void *)dst, len, sum, err_ptr); diff --git a/arch/mips/include/asm/uaccess.h b/arch/mips/include/asm/uaccess.h index 5c0876073f1..8de858f5449 100644 --- a/arch/mips/include/asm/uaccess.h +++ b/arch/mips/include/asm/uaccess.h @@ -245,6 +245,7 @@ do { \ int __gu_err = -EFAULT; \ const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); \ \ + might_fault(); \ if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ __get_user_common((x), size, __gu_ptr); \ \ @@ -334,6 +335,7 @@ do { \ __typeof__(*(ptr)) __pu_val = (x); \ int __pu_err = -EFAULT; \ \ + might_fault(); \ if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { \ switch (size) { \ case 1: __put_user_asm("sb", __pu_addr); break; \ @@ -708,10 +710,10 @@ extern size_t __copy_user(void *__to, const void *__from, size_t __n); const void *__cu_from; \ long __cu_len; \ \ - might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ + might_fault(); \ __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); \ __cu_len; \ }) @@ -764,13 +766,14 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void *__cu_from; \ long __cu_len; \ \ - might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ - if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) \ + if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) { \ + might_fault(); \ __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, \ __cu_len); \ + } \ __cu_len; \ }) @@ -843,10 +846,10 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void __user *__cu_from; \ long __cu_len; \ \ - might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ + might_fault(); \ __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ __cu_len); \ __cu_len; \ @@ -874,13 +877,14 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void __user *__cu_from; \ long __cu_len; \ \ - might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ - if (access_ok(VERIFY_READ, __cu_from, __cu_len)) \ + if (access_ok(VERIFY_READ, __cu_from, __cu_len)) { \ + might_fault(); \ __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ __cu_len); \ + } \ __cu_len; \ }) @@ -890,10 +894,10 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void __user *__cu_from; \ long __cu_len; \ \ - might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ + might_fault(); \ __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ __cu_len); \ __cu_len; \ @@ -905,14 +909,15 @@ extern size_t __copy_user_inatomic(void *__to, const void *__from, size_t __n); const void __user *__cu_from; \ long __cu_len; \ \ - might_sleep(); \ __cu_to = (to); \ __cu_from = (from); \ __cu_len = (n); \ if (likely(access_ok(VERIFY_READ, __cu_from, __cu_len) && \ - access_ok(VERIFY_WRITE, __cu_to, __cu_len))) \ + access_ok(VERIFY_WRITE, __cu_to, __cu_len))) { \ + might_fault(); \ __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, \ __cu_len); \ + } \ __cu_len; \ }) @@ -932,7 +937,7 @@ __clear_user(void __user *addr, __kernel_size_t size) { __kernel_size_t res; - might_sleep(); + might_fault(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, $0\n\t" @@ -981,7 +986,7 @@ __strncpy_from_user(char *__to, const char __user *__from, long __len) { long res; - might_sleep(); + might_fault(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" @@ -1018,7 +1023,7 @@ strncpy_from_user(char *__to, const char __user *__from, long __len) { long res; - might_sleep(); + might_fault(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" @@ -1037,7 +1042,7 @@ static inline long __strlen_user(const char __user *s) { long res; - might_sleep(); + might_fault(); __asm__ __volatile__( "move\t$4, %1\n\t" __MODULE_JAL(__strlen_user_nocheck_asm) @@ -1067,7 +1072,7 @@ static inline long strlen_user(const char __user *s) { long res; - might_sleep(); + might_fault(); __asm__ __volatile__( "move\t$4, %1\n\t" __MODULE_JAL(__strlen_user_asm) @@ -1084,7 +1089,7 @@ static inline long __strnlen_user(const char __user *s, long n) { long res; - might_sleep(); + might_fault(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" @@ -1115,7 +1120,7 @@ static inline long strnlen_user(const char __user *s, long n) { long res; - might_sleep(); + might_fault(); __asm__ __volatile__( "move\t$4, %1\n\t" "move\t$5, %2\n\t" -- cgit v1.2.3-18-g5258 From 165533c3bd750042e7e140dff5bc2406a5104efe Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 28 Apr 2009 17:31:50 +0200 Subject: MIPS: IP27: Get rid of #ident. Gcc 4.4.0 doesn't like it. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/sn/nmi.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/include/asm/sn/nmi.h b/arch/mips/include/asm/sn/nmi.h index 6b7b0b5f372..1af49897d4e 100644 --- a/arch/mips/include/asm/sn/nmi.h +++ b/arch/mips/include/asm/sn/nmi.h @@ -3,13 +3,13 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * + * Derived from IRIX , Revision 1.5. + * * Copyright (C) 1992 - 1997 Silicon Graphics, Inc. */ #ifndef __ASM_SN_NMI_H #define __ASM_SN_NMI_H -#ident "$Revision: 1.5 $" - #include /* -- cgit v1.2.3-18-g5258 From 05e41404470662a17699af9e6d91fc80ed91e757 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 28 Apr 2009 19:38:35 +0200 Subject: MIPS: Set compiler options only after the compiler prefix has ben set. Otherwise indigestable options might be passed to the host compiler. Signed-off-by: Ralf Baechle --- arch/mips/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 8d544c7c9fe..3d5626ee0a5 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -14,8 +14,6 @@ KBUILD_DEFCONFIG := ip22_defconfig -cflags-y := -ffunction-sections - # # Select the object file format to substitute into the linker script. # @@ -50,6 +48,8 @@ ifneq ($(SUBARCH),$(ARCH)) endif endif +cflags-y := -ffunction-sections + ifdef CONFIG_32BIT ld-emul = $(32bit-emul) vmlinux-32 = vmlinux -- cgit v1.2.3-18-g5258 From 1a4ba061b3c93804027b4cc4c588cfad748d9fc2 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 28 Apr 2009 19:28:33 +0200 Subject: MIPS: Use -mno-check-zero-division I don't think that in 15 years of Linux/MIPS the zero division checking code generated by gcc by default has ever caught anything. Signed-off-by: Ralf Baechle --- arch/mips/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 3d5626ee0a5..26947ab8526 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -49,6 +49,7 @@ ifneq ($(SUBARCH),$(ARCH)) endif cflags-y := -ffunction-sections +cflags-y += $(call cc-option, -mno-check-zero-division) ifdef CONFIG_32BIT ld-emul = $(32bit-emul) -- cgit v1.2.3-18-g5258 From 5c5dd1d29120affb127955277bfba9f60e27a3fe Mon Sep 17 00:00:00 2001 From: Shane McDonald Date: Tue, 28 Apr 2009 17:00:27 -0600 Subject: MIPS: MSP71xx: Remove the RAMROOT functions The RAMROOT function was a successful but non-portable attempt to append the root filesystem to the end of the kernel image. The preferred and portable solution is to use an initramfs instead. Signed-off-by: Shane McDonald Signed-off-by: Ralf Baechle --- arch/mips/pmc-sierra/Kconfig | 12 ------- arch/mips/pmc-sierra/msp71xx/msp_prom.c | 60 +-------------------------------- 2 files changed, 1 insertion(+), 71 deletions(-) diff --git a/arch/mips/pmc-sierra/Kconfig b/arch/mips/pmc-sierra/Kconfig index 90261b83db0..c139988bb85 100644 --- a/arch/mips/pmc-sierra/Kconfig +++ b/arch/mips/pmc-sierra/Kconfig @@ -36,18 +36,6 @@ config PMC_MSP7120_FPGA endchoice -menu "Options for PMC-Sierra MSP chipsets" - depends on PMC_MSP - -config PMC_MSP_EMBEDDED_ROOTFS - bool "Root filesystem embedded in kernel image" - select MTD - select MTD_BLOCK - select MTD_PMC_MSP_RAMROOT - select MTD_RAM - -endmenu - config HYPERTRANSPORT bool "Hypertransport Support for PMC-Sierra Yosemite" depends on PMC_YOSEMITE diff --git a/arch/mips/pmc-sierra/msp71xx/msp_prom.c b/arch/mips/pmc-sierra/msp71xx/msp_prom.c index e5bd5481d8d..c317a3623ce 100644 --- a/arch/mips/pmc-sierra/msp71xx/msp_prom.c +++ b/arch/mips/pmc-sierra/msp71xx/msp_prom.c @@ -40,12 +40,6 @@ #include #include #include -#ifdef CONFIG_CRAMFS -#include -#endif -#ifdef CONFIG_SQUASHFS -#include -#endif #include #include @@ -435,10 +429,6 @@ struct prom_pmemblock *__init prom_getmdesc(void) char *str; unsigned int memsize; unsigned int heaptop; -#ifdef CONFIG_MTD_PMC_MSP_RAMROOT - void *ramroot_start; - unsigned long ramroot_size; -#endif int i; str = prom_getenv(memsz_env); @@ -506,19 +496,7 @@ struct prom_pmemblock *__init prom_getmdesc(void) i++; /* 3 */ mdesc[i].type = BOOT_MEM_RESERVED; mdesc[i].base = CPHYSADDR((u32)_text); -#ifdef CONFIG_MTD_PMC_MSP_RAMROOT - if (get_ramroot(&ramroot_start, &ramroot_size)) { - /* - * Rootfs in RAM -- follows kernel - * Combine rootfs image with kernel block so a - * page (4k) isn't wasted between memory blocks - */ - mdesc[i].size = CPHYSADDR(PAGE_ALIGN( - (u32)ramroot_start + ramroot_size)) - mdesc[i].base; - } else -#endif - mdesc[i].size = CPHYSADDR(PAGE_ALIGN( - (u32)_end)) - mdesc[i].base; + mdesc[i].size = CPHYSADDR(PAGE_ALIGN((u32)_end)) - mdesc[i].base; /* Remainder of RAM -- under memsize */ i++; /* 5 */ @@ -528,39 +506,3 @@ struct prom_pmemblock *__init prom_getmdesc(void) return &mdesc[0]; } - -/* rootfs functions */ -#ifdef CONFIG_MTD_PMC_MSP_RAMROOT -bool get_ramroot(void **start, unsigned long *size) -{ - extern char _end[]; - - /* Check for start following the end of the kernel */ - void *check_start = (void *)_end; - - /* Check for supported rootfs types */ -#ifdef CONFIG_CRAMFS - if (*(__u32 *)check_start == CRAMFS_MAGIC) { - /* Get CRAMFS size */ - *start = check_start; - *size = PAGE_ALIGN(((struct cramfs_super *) - check_start)->size); - - return true; - } -#endif -#ifdef CONFIG_SQUASHFS - if (*((unsigned int *)check_start) == SQUASHFS_MAGIC) { - /* Get SQUASHFS size */ - *start = check_start; - *size = PAGE_ALIGN(((struct squashfs_super_block *) - check_start)->bytes_used); - - return true; - } -#endif - - return false; -} -EXPORT_SYMBOL(get_ramroot); -#endif -- cgit v1.2.3-18-g5258 From 0b54352600b820a6d25f151cbd8975ed9b2aeb09 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 30 Apr 2009 02:16:19 +0200 Subject: MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware. Probably nobody does arithmetic on cp0 register values so this has never bitten. Signed-off-by: Ralf Baechle --- arch/mips/include/asm/mipsregs.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 0ef30c81fea..32ef8bec5c8 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -728,8 +728,8 @@ do { \ ".set\tmips64\n\t" \ "dmfc0\t%M0, " #source "\n\t" \ "dsll\t%L0, %M0, 32\n\t" \ - "dsrl\t%M0, %M0, 32\n\t" \ - "dsrl\t%L0, %L0, 32\n\t" \ + "dsra\t%M0, %M0, 32\n\t" \ + "dsra\t%L0, %L0, 32\n\t" \ ".set\tmips0" \ : "=r" (__val)); \ else \ @@ -737,8 +737,8 @@ do { \ ".set\tmips64\n\t" \ "dmfc0\t%M0, " #source ", " #sel "\n\t" \ "dsll\t%L0, %M0, 32\n\t" \ - "dsrl\t%M0, %M0, 32\n\t" \ - "dsrl\t%L0, %L0, 32\n\t" \ + "dsra\t%M0, %M0, 32\n\t" \ + "dsra\t%L0, %L0, 32\n\t" \ ".set\tmips0" \ : "=r" (__val)); \ local_irq_restore(__flags); \ -- cgit v1.2.3-18-g5258 From bb86bf28aec6d0a207ae09f38a43e94133d4d6db Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 25 Apr 2009 11:25:34 +0200 Subject: MIPS: Fix highmem. Commit 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) rsp. b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (linux-mips.org): > From: Chris Dearman > Date: Wed, 19 Sep 2007 00:58:24 +0100 > Subject: [PATCH] [MIPS] Allow setting of the cache attribute at run time. > > Slightly tacky, but there is a precedent in the sparc archirecture code. introduces the variable _page_cachable_default, which defaults to zero and. is used to create the prototype PTE for __kmap_atomic in arch/mips/mm/init.c:kmap_init before initialization in arch/mips/mm/c-r4k.c:coherency_setup, so the default value of 0 will be used as the CCA of kmap atomic pages which on many processors is not a defined CCA value and may result in writes to kmap_atomic pages getting corrupted. Debugged by Jon Fraser (jfraser@broadcom.com). Signed-off-by: Ralf Baechle --- arch/mips/include/asm/fixmap.h | 3 +++ arch/mips/include/asm/highmem.h | 6 ++++-- arch/mips/mm/highmem.c | 25 +++++++++++++++++++------ arch/mips/mm/init.c | 26 -------------------------- 4 files changed, 26 insertions(+), 34 deletions(-) diff --git a/arch/mips/include/asm/fixmap.h b/arch/mips/include/asm/fixmap.h index 9cc8522a394..0f5caa1307f 100644 --- a/arch/mips/include/asm/fixmap.h +++ b/arch/mips/include/asm/fixmap.h @@ -108,6 +108,9 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr) return __virt_to_fix(vaddr); } +#define kmap_get_fixmap_pte(vaddr) \ + pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr)) + /* * Called from pgtable_init() */ diff --git a/arch/mips/include/asm/highmem.h b/arch/mips/include/asm/highmem.h index 4374ab2adc7..25adfb02923 100644 --- a/arch/mips/include/asm/highmem.h +++ b/arch/mips/include/asm/highmem.h @@ -30,8 +30,6 @@ /* declarations for highmem.c */ extern unsigned long highstart_pfn, highend_pfn; -extern pte_t *kmap_pte; -extern pgprot_t kmap_prot; extern pte_t *pkmap_page_table; /* @@ -62,6 +60,10 @@ extern struct page *__kmap_atomic_to_page(void *ptr); #define flush_cache_kmaps() flush_cache_all() +extern void kmap_init(void); + +#define kmap_prot PAGE_KERNEL + #endif /* __KERNEL__ */ #endif /* _ASM_HIGHMEM_H */ diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c index 4481656d106..2b1309b2580 100644 --- a/arch/mips/mm/highmem.c +++ b/arch/mips/mm/highmem.c @@ -1,7 +1,12 @@ #include #include +#include #include +static pte_t *kmap_pte; + +unsigned long highstart_pfn, highend_pfn; + void *__kmap(struct page *page) { void *addr; @@ -14,6 +19,7 @@ void *__kmap(struct page *page) return addr; } +EXPORT_SYMBOL(__kmap); void __kunmap(struct page *page) { @@ -22,6 +28,7 @@ void __kunmap(struct page *page) return; kunmap_high(page); } +EXPORT_SYMBOL(__kunmap); /* * kmap_atomic/kunmap_atomic is significantly faster than kmap/kunmap because @@ -48,11 +55,12 @@ void *__kmap_atomic(struct page *page, enum km_type type) #ifdef CONFIG_DEBUG_HIGHMEM BUG_ON(!pte_none(*(kmap_pte - idx))); #endif - set_pte(kmap_pte-idx, mk_pte(page, kmap_prot)); + set_pte(kmap_pte-idx, mk_pte(page, PAGE_KERNEL)); local_flush_tlb_one((unsigned long)vaddr); return (void*) vaddr; } +EXPORT_SYMBOL(__kmap_atomic); void __kunmap_atomic(void *kvaddr, enum km_type type) { @@ -77,6 +85,7 @@ void __kunmap_atomic(void *kvaddr, enum km_type type) pagefault_enable(); } +EXPORT_SYMBOL(__kunmap_atomic); /* * This is the same as kmap_atomic() but can map memory that doesn't @@ -92,7 +101,7 @@ void *kmap_atomic_pfn(unsigned long pfn, enum km_type type) debug_kmap_atomic(type); idx = type + KM_TYPE_NR*smp_processor_id(); vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); - set_pte(kmap_pte-idx, pfn_pte(pfn, kmap_prot)); + set_pte(kmap_pte-idx, pfn_pte(pfn, PAGE_KERNEL)); flush_tlb_one(vaddr); return (void*) vaddr; @@ -111,7 +120,11 @@ struct page *__kmap_atomic_to_page(void *ptr) return pte_page(*pte); } -EXPORT_SYMBOL(__kmap); -EXPORT_SYMBOL(__kunmap); -EXPORT_SYMBOL(__kmap_atomic); -EXPORT_SYMBOL(__kunmap_atomic); +void __init kmap_init(void) +{ + unsigned long kmap_vstart; + + /* cache the first kmap pte */ + kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); + kmap_pte = kmap_get_fixmap_pte(kmap_vstart); +} diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index d9348946a19..c5511294a9e 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -104,14 +104,6 @@ unsigned long setup_zero_pages(void) return 1UL << order; } -/* - * These are almost like kmap_atomic / kunmap_atmic except they take an - * additional address argument as the hint. - */ - -#define kmap_get_fixmap_pte(vaddr) \ - pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr), (vaddr)), (vaddr)), (vaddr)) - #ifdef CONFIG_MIPS_MT_SMTC static pte_t *kmap_coherent_pte; static void __init kmap_coherent_init(void) @@ -264,24 +256,6 @@ void copy_from_user_page(struct vm_area_struct *vma, } } -#ifdef CONFIG_HIGHMEM -unsigned long highstart_pfn, highend_pfn; - -pte_t *kmap_pte; -pgprot_t kmap_prot; - -static void __init kmap_init(void) -{ - unsigned long kmap_vstart; - - /* cache the first kmap pte */ - kmap_vstart = __fix_to_virt(FIX_KMAP_BEGIN); - kmap_pte = kmap_get_fixmap_pte(kmap_vstart); - - kmap_prot = PAGE_KERNEL; -} -#endif /* CONFIG_HIGHMEM */ - void __init fixrange_init(unsigned long s