From 33c9907535cef6cb5de1269540c04664c393d09c Mon Sep 17 00:00:00 2001 From: Juha Yrjola Date: Wed, 6 Dec 2006 17:13:46 -0800 Subject: ARM: OMAP2: Place SMS and SDRC into smart idle mode Place SMS and SDRC into smart idle mode Signed-off-by: Juha Yrjola Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/io.c | 2 ++ arch/arm/mach-omap2/memory.c | 48 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 82dc70f6b77..a57a4295ce2 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -26,6 +26,7 @@ extern void omap_sram_init(void); extern int omap2_clk_init(void); extern void omap2_check_revision(void); +extern void omap2_init_memory(void); extern void gpmc_init(void); extern void omapfb_reserve_sdram(void); @@ -80,5 +81,6 @@ void __init omap2_init_common_hw(void) { omap2_mux_init(); omap2_clk_init(); + omap2_init_memory(); gpmc_init(); } diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c index 85cbc2a2e66..f173aa8d896 100644 --- a/arch/arm/mach-omap2/memory.c +++ b/arch/arm/mach-omap2/memory.c @@ -30,6 +30,38 @@ #include "prcm-regs.h" #include "memory.h" +#define SMS_BASE 0x68008000 +#define SMS_SYSCONFIG 0x010 + +#define SDRC_BASE 0x68009000 +#define SDRC_SYSCONFIG 0x010 +#define SDRC_SYSSTATUS 0x014 + +static const u32 sms_base = IO_ADDRESS(SMS_BASE); +static const u32 sdrc_base = IO_ADDRESS(SDRC_BASE); + + +static inline void sms_write_reg(int idx, u32 val) +{ + __raw_writel(val, sms_base + idx); +} + +static inline u32 sms_read_reg(int idx) +{ + return __raw_readl(sms_base + idx); +} + +static inline void sdrc_write_reg(int idx, u32 val) +{ + __raw_writel(val, sdrc_base + idx); +} + +static inline u32 sdrc_read_reg(int idx) +{ + return __raw_readl(sdrc_base + idx); +} + + static struct memory_timings mem_timings; u32 omap2_memory_get_slow_dll_ctrl(void) @@ -99,3 +131,19 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode) /* 90 degree phase for anything below 133Mhz + disable DLL filter */ mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8)); } + +void __init omap2_init_memory(void) +{ + u32 l; + + l = sms_read_reg(SMS_SYSCONFIG); + l &= ~(0x3 << 3); + l |= (0x2 << 3); + sms_write_reg(SMS_SYSCONFIG, l); + + l = sdrc_read_reg(SDRC_SYSCONFIG); + l &= ~(0x3 << 3); + l |= (0x2 << 3); + sdrc_write_reg(SDRC_SYSCONFIG, l); + +} -- cgit v1.2.3-18-g5258 From 375e12abceac4e8e20ea54ff6a9e7be58729ac70 Mon Sep 17 00:00:00 2001 From: Juha Yrjola Date: Wed, 6 Dec 2006 17:13:50 -0800 Subject: ARM: OMAP: Optimize INTC register accesses and enable autoidling Use virtual addresses directly instead of physical addresses to avoid having to recalculate the virtual address with every register access. Signed-off-by: Juha Yrjola Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/irq.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index a39d3068030..f064f725e72 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -37,7 +37,7 @@ static struct omap_irq_bank { } __attribute__ ((aligned(4))) irq_banks[] = { { /* MPU INTC */ - .base_reg = OMAP24XX_IC_BASE, + .base_reg = IO_ADDRESS(OMAP24XX_IC_BASE), .nr_irqs = 96, }, { /* XXX: DSP INTC */ @@ -47,7 +47,7 @@ static struct omap_irq_bank { /* XXX: FIQ and additional INTC support (only MPU at the moment) */ static void omap_ack_irq(unsigned int irq) { - omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); + __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL); } static void omap_mask_irq(unsigned int irq) @@ -60,7 +60,7 @@ static void omap_mask_irq(unsigned int irq) irq %= 32; } - omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); + __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset); } static void omap_unmask_irq(unsigned int irq) @@ -73,7 +73,7 @@ static void omap_unmask_irq(unsigned int irq) irq %= 32; } - omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); + __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset); } static void omap_mask_ack_irq(unsigned int irq) @@ -93,17 +93,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) { unsigned long tmp; - tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff; + tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff; printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx " "(revision %ld.%ld) with %d interrupts\n", bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs); - tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG); + tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG); tmp |= 1 << 1; /* soft reset */ - omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG); + __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG); - while (!(omap_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) + while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1)) /* Wait for reset to complete */; + + /* Enable autoidle */ + __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG); } void __init omap_init_irq(void) -- cgit v1.2.3-18-g5258 From f024840872e76b1fdef324aee8c9176ed7aa0ba4 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 6 Dec 2006 17:13:53 -0800 Subject: ARM: OMAP: Board Apollon update, fix boot Update Apollon board init to initialize NAND, USB, and LEDs. Also configure GPMC memory for smc91x Ethernet. Signed-off-by: Kyungmin Park Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-apollon.c | 99 +++++++++++++++++++++++++++++++++---- 1 file changed, 90 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 878ff9181d0..3bb49c17c85 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include #include #include @@ -32,10 +34,12 @@ #include #include +#include #include #include #include #include +#include #include "prcm-regs.h" /* LED & Switch macros */ @@ -46,6 +50,9 @@ #define SW_UP_GPIO17 17 #define SW_DOWN_GPIO58 58 +#define APOLLON_FLASH_CS 0 +#define APOLLON_ETH_CS 1 + static struct mtd_partition apollon_partitions[] = { { .name = "X-Loader + U-Boot", @@ -85,10 +92,10 @@ static struct flash_platform_data apollon_flash_data = { .nr_parts = ARRAY_SIZE(apollon_partitions), }; -static struct resource apollon_flash_resource = { - .start = APOLLON_CS0_BASE, - .end = APOLLON_CS0_BASE + SZ_128K, - .flags = IORESOURCE_MEM, +static struct resource apollon_flash_resource[] = { + [0] = { + .flags = IORESOURCE_MEM, + }, }; static struct platform_device apollon_onenand_device = { @@ -97,14 +104,24 @@ static struct platform_device apollon_onenand_device = { .dev = { .platform_data = &apollon_flash_data, }, - .num_resources = ARRAY_SIZE(&apollon_flash_resource), - .resource = &apollon_flash_resource, + .num_resources = ARRAY_SIZE(apollon_flash_resource), + .resource = apollon_flash_resource, }; +static void __init apollon_flash_init(void) +{ + unsigned long base; + + if (gpmc_cs_request(APOLLON_FLASH_CS, SZ_128K, &base) < 0) { + printk(KERN_ERR "Cannot request OneNAND GPMC CS\n"); + return; + } + apollon_flash_resource[0].start = base; + apollon_flash_resource[0].end = base + SZ_128K - 1; +} + static struct resource apollon_smc91x_resources[] = { [0] = { - .start = APOLLON_ETHR_START, /* Physical */ - .end = APOLLON_ETHR_START + 0xf, .flags = IORESOURCE_MEM, }, [1] = { @@ -126,14 +143,51 @@ static struct platform_device apollon_lcd_device = { .id = -1, }; +static struct omap_led_config apollon_led_config[] = { + { + .cdev = { + .name = "apollon:led0", + }, + .gpio = LED0_GPIO13, + }, + { + .cdev = { + .name = "apollon:led1", + }, + .gpio = LED1_GPIO14, + }, + { + .cdev = { + .name = "apollon:led2", + }, + .gpio = LED2_GPIO15, + }, +}; + +static struct omap_led_platform_data apollon_led_data = { + .nr_leds = ARRAY_SIZE(apollon_led_config), + .leds = apollon_led_config, +}; + +static struct platform_device apollon_led_device = { + .name = "omap-led", + .id = -1, + .dev = { + .platform_data = &apollon_led_data, + }, +}; + static struct platform_device *apollon_devices[] __initdata = { &apollon_onenand_device, &apollon_smc91x_device, &apollon_lcd_device, + &apollon_led_device, }; static inline void __init apollon_init_smc91x(void) { + unsigned long base; + /* Make sure CS1 timings are correct */ GPMC_CONFIG1_1 = 0x00011203; GPMC_CONFIG2_1 = 0x001f1f01; @@ -141,13 +195,20 @@ static inline void __init apollon_init_smc91x(void) GPMC_CONFIG4_1 = 0x1c091c09; GPMC_CONFIG5_1 = 0x041f1f1f; GPMC_CONFIG6_1 = 0x000004c4; - GPMC_CONFIG7_1 = 0x00000f40 | (APOLLON_CS1_BASE >> 24); + + if (gpmc_cs_request(APOLLON_ETH_CS, SZ_16M, &base) < 0) { + printk(KERN_ERR "Failed to request GPMC CS for smc91x\n"); + return; + } + apollon_smc91x_resources[0].start = base + 0x300; + apollon_smc91x_resources[0].end = base + 0x30f; udelay(100); omap_cfg_reg(W4__24XX_GPIO74); if (omap_request_gpio(APOLLON_ETHR_GPIO_IRQ) < 0) { printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", APOLLON_ETHR_GPIO_IRQ); + gpmc_cs_free(APOLLON_ETH_CS); return; } omap_set_gpio_direction(APOLLON_ETHR_GPIO_IRQ, 1); @@ -175,6 +236,13 @@ static struct omap_mmc_config apollon_mmc_config __initdata = { }, }; +static struct omap_usb_config apollon_usb_config __initdata = { + .register_dev = 1, + .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ + + .pins[0] = 6, +}; + static struct omap_lcd_config apollon_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -182,6 +250,7 @@ static struct omap_lcd_config apollon_lcd_config __initdata = { static struct omap_board_config_kernel apollon_config[] = { { OMAP_TAG_UART, &apollon_uart_config }, { OMAP_TAG_MMC, &apollon_mmc_config }, + { OMAP_TAG_USB, &apollon_usb_config }, { OMAP_TAG_LCD, &apollon_lcd_config }, }; @@ -250,10 +319,22 @@ static void __init apollon_sw_init(void) return; } +static void __init apollon_usb_init(void) +{ + /* USB device */ + /* DEVICE_SUSPEND */ + omap_cfg_reg(P21_242X_GPIO12); + omap_request_gpio(12); + omap_set_gpio_direction(12, 0); /* OUT */ + omap_set_gpio_dataout(12, 0); +} + static void __init omap_apollon_init(void) { apollon_led_init(); apollon_sw_init(); + apollon_flash_init(); + apollon_usb_init(); /* REVISIT: where's the correct place */ omap_cfg_reg(W19_24XX_SYS_NIRQ); -- cgit v1.2.3-18-g5258 From 742c53e48e5f8e05ec9f0818281fada9c6061023 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Wed, 6 Dec 2006 17:13:54 -0800 Subject: ARM: OMAP: omap2/memory.c compile fixes Remove some conflicting declarations in omap2/memory.c so that the file builds again. Signed-off-by: David Brownell Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/memory.c | 40 +++++----------------------------------- 1 file changed, 5 insertions(+), 35 deletions(-) diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c index f173aa8d896..3e5d8cd4ea4 100644 --- a/arch/arm/mach-omap2/memory.c +++ b/arch/arm/mach-omap2/memory.c @@ -30,37 +30,6 @@ #include "prcm-regs.h" #include "memory.h" -#define SMS_BASE 0x68008000 -#define SMS_SYSCONFIG 0x010 - -#define SDRC_BASE 0x68009000 -#define SDRC_SYSCONFIG 0x010 -#define SDRC_SYSSTATUS 0x014 - -static const u32 sms_base = IO_ADDRESS(SMS_BASE); -static const u32 sdrc_base = IO_ADDRESS(SDRC_BASE); - - -static inline void sms_write_reg(int idx, u32 val) -{ - __raw_writel(val, sms_base + idx); -} - -static inline u32 sms_read_reg(int idx) -{ - return __raw_readl(sms_base + idx); -} - -static inline void sdrc_write_reg(int idx, u32 val) -{ - __raw_writel(val, sdrc_base + idx); -} - -static inline u32 sdrc_read_reg(int idx) -{ - return __raw_readl(sdrc_base + idx); -} - static struct memory_timings mem_timings; @@ -132,18 +101,19 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode) mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8)); } +/* turn on smart idle modes for SDRAM scheduler and controller */ void __init omap2_init_memory(void) { u32 l; - l = sms_read_reg(SMS_SYSCONFIG); + l = SMS_SYSCONFIG; l &= ~(0x3 << 3); l |= (0x2 << 3); - sms_write_reg(SMS_SYSCONFIG, l); + SMS_SYSCONFIG = l; - l = sdrc_read_reg(SDRC_SYSCONFIG); + l = SDRC_SYSCONFIG; l &= ~(0x3 << 3); l |= (0x2 << 3); - sdrc_write_reg(SDRC_SYSCONFIG, l); + SDRC_SYSCONFIG = l; } -- cgit v1.2.3-18-g5258 From 1c22cc13256046162bb8e7b44763f6c39790af74 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Wed, 6 Dec 2006 17:13:55 -0800 Subject: ARM: OMAP: omap2/gpmc updates GPMC updates: - bugfixes: wrong/missing flags, omitted write, wrong test - don't map memory segments starting at zero - improve debug messaging - export gpmc_get_fclk_perio]d() since it's needed to calc timings - expect gpmc_cs_set_timings() caller to have initialized sync vs async Note that this API is glitchy; likely the best fix would be to add a member to "struct gpmc_timings" to hold GPMC_CONFIG1, since that holds one key aspect of the GPMC timings (the gpmc_fclk divisor, and sync vs. async == whether that divisor matters). Signed-off-by: David Brownell Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 33 ++++++++++++++++++++++----------- include/asm-arm/arch-omap/gpmc.h | 3 ++- 2 files changed, 24 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index e290b989aa9..6d6b25c46b1 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -88,7 +88,7 @@ u32 gpmc_cs_read_reg(int cs, int idx) } /* TODO: Add support for gpmc_fck to clock framework and use it */ -static unsigned long gpmc_get_fclk_period(void) +unsigned long gpmc_get_fclk_period(void) { /* In picoseconds */ return 1000000000 / ((clk_get_rate(gpmc_l3_clk)) / 1000); @@ -120,15 +120,21 @@ static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, else ticks = gpmc_ns_to_ticks(time); nr_bits = end_bit - st_bit + 1; - if (ticks >= 1 << nr_bits) + if (ticks >= 1 << nr_bits) { +#ifdef DEBUG + printk(KERN_INFO "GPMC CS%d: %-10s* %3d ns, %3d ticks >= %d\n", + cs, name, time, ticks, 1 << nr_bits); +#endif return -1; + } mask = (1 << nr_bits) - 1; l = gpmc_cs_read_reg(cs, reg); #ifdef DEBUG - printk(KERN_INFO "GPMC CS%d: %-10s: %d ticks, %3lu ns (was %i ticks)\n", + printk(KERN_INFO + "GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000, - (l >> st_bit) & mask); + (l >> st_bit) & mask, time); #endif l &= ~(mask << st_bit); l |= ticks << st_bit; @@ -157,7 +163,7 @@ int gpmc_cs_calc_divider(int cs, unsigned int sync_clk) div = l / gpmc_get_fclk_period(); if (div > 4) return -1; - if (div < 0) + if (div <= 0) div = 1; return div; @@ -191,14 +197,19 @@ int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); + /* caller is expected to have initialized CONFIG1 to cover + * at least sync vs async + */ + l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); + if (l & (GPMC_CONFIG1_READTYPE_SYNC | GPMC_CONFIG1_WRITETYPE_SYNC)) { #ifdef DEBUG - printk(KERN_INFO "GPMC CS%d CLK period is %lu (div %d)\n", - cs, gpmc_get_fclk_period(), div); + printk(KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n", + cs, (div * gpmc_get_fclk_period()) / 1000, div); #endif - - l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); - l &= ~0x03; - l |= (div - 1); + l &= ~0x03; + l |= (div - 1); + gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); + } return 0; } diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h index 995cc83482e..434672df702 100644 --- a/include/asm-arm/arch-omap/gpmc.h +++ b/include/asm-arm/arch-omap/gpmc.h @@ -23,9 +23,10 @@ #define GPMC_CS_NAND_DATA 0x24 #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) -#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 20) +#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) +#define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28) #define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) -- cgit v1.2.3-18-g5258 From f604931238dff7b44ef52ac2ad1f557e45b25b38 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Wed, 6 Dec 2006 17:14:03 -0800 Subject: ARM: OMAP: abstract debug card setup (smc, leds) Additional cleanup for debug boards on H2/P2/H3/H4: move the init code that's not board-specific into a new file where it can be easily shared between all the different boards (avoiding code duplication, and making it easier to support more devices). Make H4 use that. This should be easy to drop in to the OMAP1 boards using these debug cards; the only difference seems to be that the p2 does an extra reset of the smc using the fpga (probably all boards could do that, if it's necessary) and doesn't use the gpio mux or request APIs. Signed-off-by: David Brownell Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 2 +- arch/arm/mach-omap2/board-h4.c | 46 ++------------------ arch/arm/plat-omap/Kconfig | 9 +++- arch/arm/plat-omap/Makefile | 1 + arch/arm/plat-omap/debug-devices.c | 86 ++++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-omap/board.h | 4 ++ 6 files changed, 102 insertions(+), 46 deletions(-) create mode 100644 arch/arm/plat-omap/debug-devices.c diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 7393109f5c3..cf4268e46b0 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -21,7 +21,7 @@ config MACH_OMAP_GENERIC config MACH_OMAP_H4 bool "OMAP 2420 H4 board" depends on ARCH_OMAP2 && ARCH_OMAP24XX - select OMAP_DEBUG_LEDS if LEDS || LEDS_OMAP_DEBUG + select OMAP_DEBUG_DEVICES config MACH_OMAP_APOLLON bool "OMAP 2420 Apollon board" diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index 452193f0153..f125f432cc3 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c @@ -131,26 +131,6 @@ static struct platform_device h4_flash_device = { .resource = &h4_flash_resource, }; -static struct resource h4_smc91x_resources[] = { - [0] = { - .start = OMAP24XX_ETHR_START, /* Physical */ - .end = OMAP24XX_ETHR_START + 0xf, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), - .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device h4_smc91x_device = { - .name = "smc91x", - .id = -1, - .num_resources = ARRAY_SIZE(h4_smc91x_resources), - .resource = h4_smc91x_resources, -}; - /* Select between the IrDA and aGPS module */ static int h4_select_irda(struct device *dev, int state) @@ -266,29 +246,14 @@ static struct platform_device h4_lcd_device = { .id = -1, }; -static struct resource h4_led_resources[] = { - [0] = { - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device h4_led_device = { - .name = "omap_dbg_led", - .id = -1, - .num_resources = ARRAY_SIZE(h4_led_resources), - .resource = h4_led_resources, -}; - static struct platform_device *h4_devices[] __initdata = { - &h4_smc91x_device, &h4_flash_device, &h4_irda_device, &h4_kp_device, &h4_lcd_device, - &h4_led_device, }; -static inline void __init h4_init_smc91x(void) +static inline void __init h4_init_debug(void) { /* Make sure CS1 timings are correct */ GPMC_CONFIG1_1 = 0x00011200; @@ -301,12 +266,8 @@ static inline void __init h4_init_smc91x(void) udelay(100); omap_cfg_reg(M15_24XX_GPIO92); - if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) { - printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", - OMAP24XX_ETHR_GPIO_IRQ); - return; - } - omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1); + if (debug_card_init(cs_mem_base, OMAP24XX_ETHR_GPIO_IRQ) < 0) + gpmc_cs_free(eth_cs); } static void __init omap_h4_init_irq(void) @@ -314,7 +275,6 @@ static void __init omap_h4_init_irq(void) omap2_init_common_hw(); omap_init_irq(); omap_gpio_init(); - h4_init_smc91x(); } static struct omap_uart_config h4_uart_config __initdata = { diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index cfc69f3842f..c1f7e5a819a 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -20,10 +20,15 @@ endchoice comment "OMAP Feature Selections" -config OMAP_DEBUG_LEDS +config OMAP_DEBUG_DEVICES bool help - For debug card leds on TI reference boards. + For debug cards on TI reference boards. + +config OMAP_DEBUG_LEDS + bool + depends on OMAP_DEBUG_DEVICES + default y if LEDS || LEDS_OMAP_DEBUG config OMAP_RESET_CLOCKS bool "Reset unused clocks during boot" diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile index 41a3c1cf3bd..2549129aabc 100644 --- a/arch/arm/plat-omap/Makefile +++ b/arch/arm/plat-omap/Makefile @@ -17,4 +17,5 @@ obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o obj-$(CONFIG_CPU_FREQ) += cpu-omap.o obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o +obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c new file mode 100644 index 00000000000..83a5f8b9185 --- /dev/null +++ b/arch/arm/plat-omap/debug-devices.c @@ -0,0 +1,86 @@ +/* + * linux/arch/arm/plat-omap/debug-devices.c + * + * Copyright (C) 2005 Nokia Corporation + * Modified from mach-omap2/board-h4.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +#include +#include + +#include +#include + + +/* Many OMAP development platforms reuse the same "debug board"; these + * platforms include H2, H3, H4, and Perseus2. + */ + +static struct resource smc91x_resources[] = { + [0] = { + .flags = IORESOURCE_MEM, + }, + [1] = { + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc91x_device = { + .name = "smc91x", + .id = -1, + .num_resources = ARRAY_SIZE(smc91x_resources), + .resource = smc91x_resources, +}; + +static struct resource led_resources[] = { + [0] = { + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device led_device = { + .name = "omap_dbg_led", + .id = -1, + .num_resources = ARRAY_SIZE(led_resources), + .resource = led_resources, +}; + +static struct platform_device *debug_devices[] __initdata = { + &smc91x_device, + &led_device, + /* ps2 kbd + mouse ports */ + /* 4 extra uarts */ + /* 6 input dip switches */ + /* 8 output pins */ +}; + +int __init debug_card_init(u32 addr, unsigned gpio) +{ + int status; + + smc91x_resources[0].start = addr + 0x300; + smc91x_resources[0].end = addr + 0x30f; + + smc91x_resources[1].start = OMAP_GPIO_IRQ(gpio); + smc91x_resources[1].end = OMAP_GPIO_IRQ(gpio); + + status = omap_request_gpio(gpio); + if (status < 0) { + printk(KERN_ERR "GPIO%d unavailable for smc91x IRQ\n", gpio); + return status; + } + omap_set_gpio_direction(gpio, 1); + + led_resources[0].start = addr; + led_resources[0].end = addr + SZ_4K - 1; + + return platform_add_devices(debug_devices, ARRAY_SIZE(debug_devices)); +} diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index 031672c5637..db44c5d1f1a 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h @@ -179,4 +179,8 @@ extern const void *omap_get_var_config(u16 tag, size_t *len); extern struct omap_board_config_kernel *omap_board_config; extern int omap_board_config_size; + +/* for TI reference platforms sharing the same debug card */ +extern int debug_card_init(u32 addr, unsigned gpio); + #endif -- cgit v1.2.3-18-g5258 From 72d0f1c3cdc7c456e1e357359ec6f566d0a5f264 Mon Sep 17 00:00:00 2001 From: Syed Mohammed Khasim Date: Wed, 6 Dec 2006 17:14:05 -0800 Subject: ARM: OMAP: Add minimal OMAP2430 support This patch adds minimal OMAP2430 support to get the kernel booting on 2430SDP. Signed-off-by: Syed Mohammed Khasim Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 9 ++ arch/arm/mach-omap2/Makefile | 1 + arch/arm/mach-omap2/board-2430sdp.c | 218 ++++++++++++++++++++++++++++++ arch/arm/mach-omap2/devices.c | 6 +- arch/arm/mach-omap2/gpmc.c | 7 + arch/arm/mach-omap2/id.c | 6 + arch/arm/mach-omap2/io.c | 20 +++ include/asm-arm/arch-omap/board-2430sdp.h | 44 ++++++ include/asm-arm/arch-omap/hardware.h | 4 + include/asm-arm/arch-omap/io.h | 10 ++ include/asm-arm/arch-omap/omap24xx.h | 12 ++ 11 files changed, 335 insertions(+), 2 deletions(-) create mode 100644 arch/arm/mach-omap2/board-2430sdp.c create mode 100644 include/asm-arm/arch-omap/board-2430sdp.h diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index cf4268e46b0..7069c9d536f 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -11,6 +11,10 @@ config ARCH_OMAP2420 select OMAP_DM_TIMER select ARCH_OMAP_OTG +config ARCH_OMAP2430 + bool "OMAP2430 support" + depends on ARCH_OMAP24XX + comment "OMAP Board Type" depends on ARCH_OMAP2 @@ -26,3 +30,8 @@ config MACH_OMAP_H4 config MACH_OMAP_APOLLON bool "OMAP 2420 Apollon board" depends on ARCH_OMAP2 && ARCH_OMAP24XX + +config MACH_OMAP_2430SDP + bool "OMAP 2430 SDP board" + depends on ARCH_OMAP2 && ARCH_OMAP24XX + diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 266d88e77bd..b05b738d31e 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -14,5 +14,6 @@ obj-$(CONFIG_PM) += pm.o pm-domain.o sleep.o # Specific board support obj-$(CONFIG_MACH_OMAP_GENERIC) += board-generic.o obj-$(CONFIG_MACH_OMAP_H4) += board-h4.o +obj-$(CONFIG_MACH_OMAP_2430SDP) += board-2430sdp.o obj-$(CONFIG_MACH_OMAP_APOLLON) += board-apollon.o diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c new file mode 100644 index 00000000000..7e76fbf19b5 --- /dev/null +++ b/arch/arm/mach-omap2/board-2430sdp.c @@ -0,0 +1,218 @@ +/* + * linux/arch/arm/mach-omap2/board-2430sdp.c + * + * Copyright (C) 2006 Texas Instruments + * + * Modified from mach-omap2/board-generic.c + * + * Initial Code : Based on a patch from Komal Shah and Richard Woodruff + * Updated the Code for 2430 SDP : Syed Mohammed Khasim + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include "prcm-regs.h" + +#include + + +#define SDP2430_FLASH_CS 0 +#define SDP2430_SMC91X_CS 5 + +static struct mtd_partition sdp2430_partitions[] = { + /* bootloader (U-Boot, etc) in first sector */ + { + .name = "bootloader", + .offset = 0, + .size = SZ_256K, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* bootloader params in the next sector */ + { + .name = "params", + .offset = MTDPART_OFS_APPEND, + .size = SZ_128K, + .mask_flags = 0, + }, + /* kernel */ + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M, + .mask_flags = 0 + }, + /* file system */ + { + .name = "filesystem", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0 + } +}; + +static struct flash_platform_data sdp2430_flash_data = { + .map_name = "cfi_probe", + .width = 2, + .parts = sdp2430_partitions, + .nr_parts = ARRAY_SIZE(sdp2430_partitions), +}; + +static struct resource sdp2430_flash_resource = { + .start = SDP2430_CS0_BASE, + .end = SDP2430_CS0_BASE + SZ_64M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device sdp2430_flash_device = { + .name = "omapflash", + .id = 0, + .dev = { + .platform_data = &sdp2430_flash_data, + }, + .num_resources = 1, + .resource = &sdp2430_flash_resource, +}; + +static struct resource sdp2430_smc91x_resources[] = { + [0] = { + .start = SDP2430_CS0_BASE, + .end = SDP2430_CS0_BASE + SZ_64M - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), + .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sdp2430_smc91x_device = { + .name = "smc91x", + .id = -1, + .num_resources = ARRAY_SIZE(sdp2430_smc91x_resources), + .resource = sdp2430_smc91x_resources, +}; + +static struct platform_device *sdp2430_devices[] __initdata = { + &sdp2430_smc91x_device, + &sdp2430_flash_device, +}; + +static inline void __init sdp2430_init_smc91x(void) +{ + int eth_cs; + unsigned long cs_mem_base; + unsigned int rate; + struct clk *l3ck; + + eth_cs = SDP2430_SMC91X_CS; + + l3ck = clk_get(NULL, "core_l3_ck"); + if (IS_ERR(l3ck)) + rate = 100000000; + else + rate = clk_get_rate(l3ck); + + /* Make sure CS1 timings are correct, for 2430 always muxed */ + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200); + + if (rate >= 160000000) { + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); + } else if (rate >= 130000000) { + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); + } else { /* rate = 100000000 */ + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F); + gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2); + } + + if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { + printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); + return; + } + + sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300; + sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f; + udelay(100); + + if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) { + printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", + OMAP24XX_ETHR_GPIO_IRQ); + gpmc_cs_free(eth_cs); + return; + } + omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1); + +} + +static void __init omap_2430sdp_init_irq(void) +{ + omap2_init_common_hw(); + omap_init_irq(); + omap_gpio_init(); + sdp2430_init_smc91x(); +} + +static struct omap_uart_config sdp2430_uart_config __initdata = { + .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), +}; + +static struct omap_board_config_kernel sdp2430_config[] = { + {OMAP_TAG_UART, &sdp2430_uart_config}, +}; + +static void __init omap_2430sdp_init(void) +{ + platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); + omap_board_config = sdp2430_config; + omap_board_config_size = ARRAY_SIZE(sdp2430_config); + omap_serial_init(); +} + +static void __init omap_2430sdp_map_io(void) +{ + omap2_map_common_io(); +} + +MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") + /* Maintainer: Syed Khasim - Texas Instruments Inc */ + .phys_io = 0x48000000, + .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, + .boot_params = 0x80000100, + .map_io = omap_2430sdp_map_io, + .init_irq = omap_2430sdp_init_irq, + .init_machine = omap_2430sdp_init, + .timer = &omap_timer, +MACHINE_END diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 52ec2f2d636..b603bc5f8e5 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -55,8 +55,10 @@ static void omap_init_i2c(void) if (machine_is_omap_h4()) return; - omap_cfg_reg(J15_24XX_I2C2_SCL); - omap_cfg_reg(H19_24XX_I2C2_SDA); + if (!cpu_is_omap2430()) { + omap_cfg_reg(J15_24XX_I2C2_SCL); + omap_cfg_reg(H19_24XX_I2C2_SDA); + } (void) platform_device_register(&omap_i2c_device2); } diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 6d6b25c46b1..03595ee72ed 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -22,7 +22,14 @@ #undef DEBUG +#ifdef CONFIG_ARCH_OMAP2420 #define GPMC_BASE 0x6800a000 +#endif + +#ifdef CONFIG_ARCH_OMAP2430 +#define GPMC_BASE 0x6E000000 +#endif + #define GPMC_REVISION 0x00 #define GPMC_SYSCONFIG 0x10 #define GPMC_SYSSTATUS 0x14 diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 871ace4fccb..4dfd878d796 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -17,7 +17,13 @@ #include +#if defined(CONFIG_ARCH_OMAP2420) #define OMAP24XX_TAP_BASE io_p2v(0x48014000) +#endif + +#if defined(CONFIG_ARCH_OMAP2430) +#define OMAP24XX_TAP_BASE io_p2v(0x4900A000) +#endif #define OMAP_TAP_IDCODE 0x0204 #define OMAP_TAP_PROD_ID 0x0208 diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index a57a4295ce2..5a4091f582e 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -5,6 +5,7 @@ * * Copyright (C) 2005 Nokia Corporation * Author: Juha Yrjölä + * Updated map desc to add 2430 support : * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -41,6 +42,20 @@ static struct map_desc omap2_io_desc[] __initdata = { .length = L3_24XX_SIZE, .type = MT_DEVICE }, +#ifdef CONFIG_ARCH_OMAP2430 + { + .virtual = L4_WK_243X_VIRT, + .pfn = __phys_to_pfn(L4_WK_243X_PHYS), + .length = L4_WK_243X_SIZE, + .type = MT_DEVICE + }, + { + .virtual = OMAP243X_GPMC_VIRT, + .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS), + .length = OMAP243X_GPMC_SIZE, + .type = MT_DEVICE + }, +#endif { .virtual = DSP_MEM_24XX_VIRT, .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), @@ -81,6 +96,11 @@ void __init omap2_init_common_hw(void) { omap2_mux_init(); omap2_clk_init(); +/* + * Need to Fix this for 2430 + */ +#ifndef CONFIG_ARCH_OMAP2430 omap2_init_memory(); +#endif gpmc_init(); } diff --git a/include/asm-arm/arch-omap/board-2430sdp.h b/include/asm-arm/arch-omap/board-2430sdp.h new file mode 100644 index 00000000000..e9c65ce3cb1 --- /dev/null +++ b/include/asm-arm/arch-omap/board-2430sdp.h @@ -0,0 +1,44 @@ +/* + * linux/include/asm-arm/arch-omap/board-2430sdp.h + * + * Hardware definitions for TI OMAP2430 SDP board. + * + * Based on board-h4.h by Dirk Behme + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_OMAP_2430SDP_H +#define __ASM_ARCH_OMAP_2430SDP_H + +/* Placeholder for 2430SDP specific defines */ +#define OMAP24XX_ETHR_START 0x08000300 +#define OMAP24XX_ETHR_GPIO_IRQ 149 +#define SDP2430_CS0_BASE 0x04000000 + +#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ + +/* TWL4030 Primary Interrupt Handler (PIH) interrupts */ +#define IH_TWL4030_BASE IH_BOARD_BASE +#define IH_TWL4030_END (IH_TWL4030_BASE+8) +#define NR_IRQS (IH_TWL4030_END) + +#endif /* __ASM_ARCH_OMAP_2430SDP_H */ diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index e225f4f39b3..98a8eb8481a 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h @@ -318,6 +318,10 @@ #include "board-h4.h" #endif +#ifdef CONFIG_MACH_OMAP_2430SDP +#include "board-2430sdp.h" +#endif + #ifdef CONFIG_MACH_OMAP_APOLLON #include "board-apollon.h" #endif diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 4aca7e3d756..289082d07f1 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -72,6 +72,16 @@ #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ #define L4_24XX_VIRT 0xd8000000 #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ + +#ifdef CONFIG_ARCH_OMAP2430 +#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ +#define L4_WK_243X_VIRT 0xd9000000 +#define L4_WK_243X_SIZE SZ_1M +#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ +#define OMAP243X_GPMC_VIRT 0xFE000000 +#define OMAP243X_GPMC_SIZE SZ_1M +#endif + #define IO_OFFSET 0x90000000 #define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ #define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h index 708b2fac77f..14c0f949657 100644 --- a/include/asm-arm/arch-omap/omap24xx.h +++ b/include/asm-arm/arch-omap/omap24xx.h @@ -8,6 +8,7 @@ */ #define L4_24XX_BASE 0x48000000 +#define L4_WK_243X_BASE 0x49000000 #define L3_24XX_BASE 0x68000000 /* interrupt controller */ @@ -16,9 +17,20 @@ #define OMAP24XX_IVA_INTC_BASE 0x40000000 #define IRQ_SIR_IRQ 0x0040 +#ifdef CONFIG_ARCH_OMAP2420 #define OMAP24XX_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) #define OMAP24XX_PRCM_BASE (L4_24XX_BASE + 0x8000) #define OMAP24XX_SDRC_BASE (L3_24XX_BASE + 0x9000) +#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) +#endif + +#ifdef CONFIG_ARCH_OMAP2430 +#define OMAP24XX_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) +#define OMAP24XX_PRCM_BASE (L4_WK_243X_BASE + 0x6000) +#define OMAP24XX_SDRC_BASE (0x6D000000) +#define OMAP242X_CONTROL_STATUS (L4_24XX_BASE + 0x2f8) +#define OMAP243X_GPMC_BASE 0x6E000000 +#endif /* DSP SS */ #define OMAP24XX_DSP_BASE 0x58000000 -- cgit v1.2.3-18-g5258 From 7d34f3b3901cf31611183f158b949d8a823a9762 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 7 Dec 2006 14:01:29 -0800 Subject: ARM: OMAP: Tabify mux.c Tabify mux.c, no functional changes. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index 0439906d5da..05750975d74 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -53,8 +53,8 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) /* 24xx GPMC chipselects, wait pin monitoring */ -MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) -MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) +MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) +MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) @@ -67,18 +67,18 @@ MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1) MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) /* 24xx GPIO */ -MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) -MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) -MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) -MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) -MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) -MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) -MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) -MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) +MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) +MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) +MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) +MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) +MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) +MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) +MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) +MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) -MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) +MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) -MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) +MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1) @@ -95,17 +95,17 @@ MUX_CFG_24XX("T3_242X_GPIO55", 0xd9, 3, 0, 0, 1) MUX_CFG_24XX("U2_242X_GPIO56", 0xda, 3, 0, 0, 1) /* 24xx external DMA requests */ -MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) -MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) -MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) -MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) -MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) -MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) +MUX_CFG_24XX("AA10_242X_DMAREQ0", 0x0e5, 2, 0, 0, 1) +MUX_CFG_24XX("AA6_242X_DMAREQ1", 0x0e6, 2, 0, 0, 1) +MUX_CFG_24XX("E4_242X_DMAREQ2", 0x074, 2, 0, 0, 1) +MUX_CFG_24XX("G4_242X_DMAREQ3", 0x073, 2, 0, 0, 1) +MUX_CFG_24XX("D3_242X_DMAREQ4", 0x072, 2, 0, 0, 1) +MUX_CFG_24XX("E3_242X_DMAREQ5", 0x071, 2, 0, 0, 1) /* TSC IRQ */ MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1) -/* UART3 */ +/* UART3 */ MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1) MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1) -- cgit v1.2.3-18-g5258 From c1ed6407cddbd87206b860f6207731d51c1d57bf Mon Sep 17 00:00:00 2001 From: David Brownell Date: Thu, 7 Dec 2006 14:03:49 -0800 Subject: ARM: OMAP: TUSB EVM init Add init support for the TUSB6010 EVM board, as connected to H4. Signed-off-by: David Brownell Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/usb-tusb6010.c | 349 +++++++++++++++++++++++++++++++++++++ 1 file changed, 349 insertions(+) create mode 100644 arch/arm/mach-omap2/usb-tusb6010.c diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c new file mode 100644 index 00000000000..80bb42eb508 --- /dev/null +++ b/arch/arm/mach-omap2/usb-tusb6010.c @@ -0,0 +1,349 @@ +/* + * linux/arch/arm/mach-omap2/usb-tusb6010.c + * + * Copyright (C) 2006 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include + +#include +#include +#include + + +static u8 async_cs, sync_cs; +static unsigned refclk_psec; + + +/* t2_ps, when quantized to fclk units, must happen no earlier than + * the clock after after t1_NS. + * + * Return a possibly updated value of t2_ps, converted to nsec. + */ +static unsigned +next_clk(unsigned t1_NS, unsigned t2_ps, unsigned fclk_ps) +{ + unsigned t1_ps = t1_NS * 1000; + unsigned t1_f, t2_f; + + if ((t1_ps + fclk_ps) < t2_ps) + return t2_ps / 1000; + + t1_f = (t1_ps + fclk_ps - 1) / fclk_ps; + t2_f = (t2_ps + fclk_ps - 1) / fclk_ps; + + if (t1_f >= t2_f) + t2_f = t1_f + 1; + + return (t2_f * fclk_ps) / 1000; +} + +/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */ + +static int tusb_set_async_mode(unsigned sysclk_ps, unsigned fclk_ps) +{ + struct gpmc_timings t; + unsigned t_acsnh_advnh = sysclk_ps + 3000; + unsigned tmp; + + memset(&t, 0, sizeof(t)); + + /* CS_ON = t_acsnh_acsnl */ + t.cs_on = 8; + /* ADV_ON = t_acsnh_advnh - t_advn */ + t.adv_on = next_clk(t.cs_on, t_acsnh_advnh - 7000, fclk_ps); + + /* + * READ ... from omap2420 TRM fig 12-13 + */ + + /* ADV_RD_OFF = t_acsnh_advnh */ + t.adv_rd_off = next_clk(t.adv_on, t_acsnh_advnh, fclk_ps); + + /* OE_ON = t_acsnh_advnh + t_advn_oen (then wait for nRDY) */ + t.oe_on = next_clk(t.adv_on, t_acsnh_advnh + 1000, fclk_ps); + + /* ACCESS = counters continue only after nRDY */ + tmp = t.oe_on * 1000 + 300; + t.access = next_clk(t.oe_on, tmp, fclk_ps); + + /* OE_OFF = after data gets sampled */ + tmp = t.access * 1000; + t.oe_off = next_clk(t.access, tmp, fclk_ps); + + t.cs_rd_off = t.oe_off; + + tmp = t.cs_rd_off * 1000 + 7000 /* t_acsn_rdy_z */; + t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps); + + /* + * WRITE ... from omap2420 TRM fig 12-15 + */ + + /* ADV_WR_OFF = t_acsnh_advnh */ + t.adv_wr_off = t.adv_rd_off; + + /* WE_ON = t_acsnh_advnh + t_advn_wen (then wait for nRDY) */ + t.we_on = next_clk(t.adv_wr_off, t_acsnh_advnh + 1000, fclk_ps); + + /* WE_OFF = after data gets sampled */ + tmp = t.we_on * 1000 + 300; + t.we_off = next_clk(t.we_on, tmp, fclk_ps); + + t.cs_wr_off = t.we_off; + + tmp = t.cs_wr_off * 1000 + 7000 /* t_acsn_rdy_z */; + t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps); + + return gpmc_cs_set_timings(async_cs, &t); +} + +static int tusb_set_sync_mode(unsigned sysclk_ps, unsigned fclk_ps) +{ + struct gpmc_timings t; + unsigned t_scsnh_advnh = sysclk_ps + 3000; + unsigned tmp; + + memset(&t, 0, sizeof(t)); + t.cs_on = 8; + + /* ADV_ON = t_acsnh_advnh - t_advn */ + t.adv_on = next_clk(t.cs_on, t_scsnh_advnh - 7000, fclk_ps); + + /* GPMC_CLK rate = fclk rate / div */ + t.sync_clk = 12 /* 11.1 nsec */; + tmp = (t.sync_clk * 1000 + fclk_ps - 1) / fclk_ps; + if (tmp > 4) + return -ERANGE; + if (tmp <= 0) + tmp = 1; + t.page_burst_access = (fclk_ps * tmp) / 1000; + + /* + * READ ... based on omap2420 TRM fig 12-19, 12-20 + */ + + /* ADV_RD_OFF = t_scsnh_advnh */ + t.adv_rd_off = next_clk(t.adv_on, t_scsnh_advnh, fclk_ps); + + /* OE_ON = t_scsnh_advnh + t_advn_oen * fclk_ps (then wait for nRDY) */ + tmp = (t.adv_rd_off * 1000) + (3 * fclk_ps); + t.oe_on = next_clk(t.adv_on, tmp, fclk_ps); + + /* ACCESS = number of clock cycles after t_adv_eon */ + tmp = (t.oe_on * 1000) + (5 * fclk_ps); + t.access = next_clk(t.oe_on, tmp, fclk_ps); + + /* OE_OFF = after data gets sampled */ + tmp = (t.access * 1000) + (1 * fclk_ps); + t.oe_off = next_clk(t.access, tmp, fclk_ps); + + t.cs_rd_off = t.oe_off; + + tmp = t.cs_rd_off * 1000 + 7000 /* t_scsn_rdy_z */; + t.rd_cycle = next_clk(t.cs_rd_off, tmp, fclk_ps); + + /* + * WRITE ... based on omap2420 TRM fig 12-21 + */ + + /* ADV_WR_OFF = t_scsnh_advnh */ + t.adv_wr_off = t.adv_rd_off; + + /* WE_ON = t_scsnh_advnh + t_advn_wen * fclk_ps (then wait for nRDY) */ + tmp = (t.adv_wr_off * 1000) + (3 * fclk_ps); + t.we_on = next_clk(t.adv_wr_off, tmp, fclk_ps); + + /* WE_OFF = number of clock cycles after t_adv_wen */ + tmp = (t.we_on * 1000) + (6 * fclk_ps); + t.we_off = next_clk(t.we_on, tmp, fclk_ps); + + t.cs_wr_off = t.we_off; + + tmp = t.cs_wr_off * 1000 + 7000 /* t_scsn_rdy_z */; + t.wr_cycle = next_clk(t.cs_wr_off, tmp, fclk_ps); + + return gpmc_cs_set_timings(sync_cs, &t); +} + +extern unsigned long gpmc_get_fclk_period(void); + +/* tusb driver calls this when it changes the chip's clocking */ +int tusb6010_platform_retime(unsigned is_refclk) +{ + static const char error[] = + KERN_ERR "tusb6010 %s retime error %d\n"; + + unsigned fclk_ps = gpmc_get_fclk_period(); + unsigned sysclk_ps; + int status; + + if (!refclk_psec) + return -ENODEV; + + sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; + + status = tusb_set_async_mode(sysclk_ps, fclk_ps); + if (status < 0) { + printk(error, "async", status); + goto done; + } + status = tusb_set_sync_mode(sysclk_ps, fclk_ps); + if (status < 0) + printk(error, "sync", status); +done: + return status; +} +EXPORT_SYMBOL_GPL(tusb6010_platform_retime); + +static struct resource tusb_resources[] = { + /* Order is significant! The start/end fields + * are updated during setup.. + */ + { /* Asynchronous access */ + .flags = IORESOURCE_MEM, + }, + { /* Synchronous access */ + .flags = IORESOURCE_MEM, + }, + { /* IRQ */ + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 tusb_dmamask = ~(u32)0; + +static struct platform_device tusb_device = { + .name = "musb_hdrc", + .id = -1, + .dev = { + .dma_mask = &tusb_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(tusb_resources), + .resource = tusb_resources, +}; + + +/* this may be called only from board-*.c setup code */ +int __init +tusb6010_setup_interface(struct musb_hdrc_platform_data *data, + unsigned ps_refclk, unsigned waitpin, + unsigned async, unsigned sync, + unsigned irq, unsigned dmachan) +{ + int status; + static char error[] __initdata = + KERN_ERR "tusb6010 init error %d, %d\n"; + + /* ASYNC region, primarily for PIO */ + status = gpmc_cs_request(async, SZ_16M, (unsigned long *) + &tusb_resources[0].start); + if (status < 0) { + printk(error, 1, status); + return status; + } + tusb_resources[0].end = tusb_resources[0].start + 0x9ff; + async_cs = async; + gpmc_cs_write_reg(async, GPMC_CS_CONFIG1, + GPMC_CONFIG1_PAGE_LEN(2) + | GPMC_CONFIG1_WAIT_READ_MON + | GPMC_CONFIG1_WAIT_WRITE_MON + | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) + | GPMC_CONFIG1_READTYPE_ASYNC + | GPMC_CONFIG1_WRITETYPE_ASYNC + | GPMC_CONFIG1_DEVICESIZE_16 + | GPMC_CONFIG1_DEVICETYPE_NOR + | GPMC_CONFIG1_MUXADDDATA); + + + /* SYNC region, primarily for DMA */ + status = gpmc_cs_request(sync, SZ_16M, (unsigned long *) + &tusb_resources[1].start); + if (status < 0) { + printk(error, 2, status); + return status; + } + tusb_resources[1].end = tusb_resources[1].start + 0x9ff; + sync_cs = sync; + gpmc_cs_write_reg(sync, GPMC_CS_CONFIG1, + GPMC_CONFIG1_READMULTIPLE_SUPP + | GPMC_CONFIG1_READTYPE_SYNC + | GPMC_CONFIG1_WRITEMULTIPLE_SUPP + | GPMC_CONFIG1_WRITETYPE_SYNC + | GPMC_CONFIG1_CLKACTIVATIONTIME(1) + | GPMC_CONFIG1_PAGE_LEN(2) + | GPMC_CONFIG1_WAIT_READ_MON + | GPMC_CONFIG1_WAIT_WRITE_MON + | GPMC_CONFIG1_WAIT_PIN_SEL(waitpin) + | GPMC_CONFIG1_DEVICESIZE_16 + | GPMC_CONFIG1_DEVICETYPE_NOR + | GPMC_CONFIG1_MUXADDDATA + /* fclk divider gets set later */ + ); + + /* IRQ */ + status = omap_request_gpio(irq); + if (status < 0) { + printk(error, 3, status); + return status; + } + omap_set_gpio_direction(irq, 1); + tusb_resources[2].start = irq + IH_GPIO_BASE; + + /* set up memory timings ... can speed them up later */ + if (!ps_refclk) { + printk(error, 4, status); + return -ENODEV; + } + refclk_psec = ps_refclk; + status = tusb6010_platform_retime(1); + if (status < 0) { + printk(error, 5, status); + return status; + } + + /* finish device setup ... */ + if (!data) { + printk(error, 6, status); + return -ENODEV; + } + data->multipoint = 1; + tusb_device.dev.platform_data = data; + + /* REVISIT let the driver know what DMA channels work */ + if (!dmachan) + tusb_device.dev.dma_mask = NULL; + else { + /* assume OMAP 2420 ES2.0 and later */ + if (dmachan & (1 << 0)) + omap_cfg_reg(AA10_242X_DMAREQ0); + if (dmachan & (1 << 1)) + omap_cfg_reg(AA6_242X_DMAREQ1); + if (dmachan & (1 << 2)) + omap_cfg_reg(E4_242X_DMAREQ2); + if (dmachan & (1 << 3)) + omap_cfg_reg(G4_242X_DMAREQ3); + if (dmachan & (1 << 4)) + omap_cfg_reg(D3_242X_DMAREQ4); + if (dmachan & (1 << 5)) + omap_cfg_reg(E3_242X_DMAREQ5); + } + + /* so far so good ... register the device */ + status = platform_device_register(&tusb_device); + if (status < 0) { + printk(error, 7, status); + return status; + } + return 0; +} -- cgit v1.2.3-18-g5258 From 23300597948131d07eebeb1308c2ba0a1c147494 Mon Sep 17 00:00:00 2001 From: Kai Svahn Date: Fri, 26 Jan 2007 12:29:40 -0800 Subject: ARM: OMAP: Merge gpmc changes from N800 tree This patch merges gpmc changes from N800 tree and adds gpmc_get_fclk_period() to gpmc.h. Signed-off-by: Kai Svahn Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 7 +++++++ include/asm-arm/arch-omap/gpmc.h | 2 ++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 03595ee72ed..5a4cc2076a7 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -111,6 +111,13 @@ unsigned int gpmc_ns_to_ticks(unsigned int time_ns) return (time_ns * 1000 + tick_ps - 1) / tick_ps; } +unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns) +{ + unsigned long ticks = gpmc_ns_to_ticks(time_ns); + + return ticks * gpmc_get_fclk_period() / 1000; +} + #ifdef DEBUG static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, int time, const char *name) diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h index 434672df702..6a8e07ffc2d 100644 --- a/include/asm-arm/arch-omap/gpmc.h +++ b/include/asm-arm/arch-omap/gpmc.h @@ -81,6 +81,8 @@ struct gpmc_timings { }; extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); +extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); +extern unsigned long gpmc_get_fclk_period(void); extern void gpmc_cs_write_reg(int cs, int idx, u32 val); extern u32 gpmc_cs_read_reg(int cs, int idx); -- cgit v1.2.3-18-g5258 From 8777297b5e5fb7f908b51b56548b7cf7dbbf2022 Mon Sep 17 00:00:00 2001 From: Kai Svahn Date: Fri, 26 Jan 2007 13:14:34 -0800 Subject: ARM: OMAP: Merge driver headers from N800 tree This patch merges omap specific driver headers from N800 tree. Signed-off-by: Kai Svahn Signed-off-by: Tony Lindgren --- include/asm-arm/arch-omap/blizzard.h | 12 +++++ include/asm-arm/arch-omap/eac.h | 101 +++++++++++++++++++++++++++++++++++ include/asm-arm/arch-omap/menelaus.h | 20 ++++++- include/asm-arm/arch-omap/mmc.h | 66 +++++++++++++++++++++++ include/asm-arm/arch-omap/onenand.h | 21 ++++++++ 5 files changed, 219 insertions(+), 1 deletion(-) create mode 100644 include/asm-arm/arch-omap/blizzard.h create mode 100644 include/asm-arm/arch-omap/eac.h create mode 100644 include/asm-arm/arch-omap/mmc.h create mode 100644 include/asm-arm/arch-omap/onenand.h diff --git a/include/asm-arm/arch-omap/blizzard.h b/include/asm-arm/arch-omap/blizzard.h new file mode 100644 index 00000000000..8d160f17137 --- /dev/null +++ b/include/asm-arm/arch-omap/blizzard.h @@ -0,0 +1,12 @@ +#ifndef _BLIZZARD_H +#define _BLIZZARD_H + +struct blizzard_platform_data { + void (*power_up)(struct device *dev); + void (*power_down)(struct device *dev); + unsigned long (*get_clock_rate)(struct device *dev); + + unsigned te_connected : 1; +}; + +#endif diff --git a/include/asm-arm/arch-omap/eac.h b/include/asm-arm/arch-omap/eac.h new file mode 100644 index 00000000000..6662cb02baf --- /dev/null +++ b/include/asm-arm/arch-omap/eac.h @@ -0,0 +1,101 @@ +/* + * linux/include/asm-arm/arch-omap2/eac.h + * + * Defines for Enhanced Audio Controller + * + * Contact: Jarkko Nikula + * + * Copyright (C) 2006 Nokia Corporation + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __ASM_ARM_ARCH_OMAP2_EAC_H +#define __ASM_ARM_ARCH_OMAP2_EAC_H + +#include +#include +#include + +#include +#include + +/* master codec clock source */ +#define EAC_MCLK_EXT_MASK 0x100 +enum eac_mclk_src { + EAC_MCLK_INT_11290000, /* internal 96 MHz / 8.5 = 11.29 Mhz */ + EAC_MCLK_EXT_11289600 = EAC_MCLK_EXT_MASK, + EAC_MCLK_EXT_12288000, + EAC_MCLK_EXT_2x11289600, + EAC_MCLK_EXT_2x12288000, +}; + +/* codec port interface mode */ +enum eac_codec_mode { + EAC_CODEC_PCM, + EAC_CODEC_AC97, + EAC_CODEC_I2S_MASTER, /* codec port, I.e. EAC is the master */ + EAC_CODEC_I2S_SLAVE, +}; + +/* configuration structure for I2S mode */ +struct eac_i2s_conf { + /* if enabled, then first data slot (left channel) is signaled as + * positive level of frame sync EAC.AC_FS */ + unsigned polarity_changed_mode:1; + /* if enabled, then serial data starts one clock cycle after the + * of EAC.AC_FS for first audio slot */ + unsigned sync_delay_enable:1; +}; + +/* configuration structure for EAC codec port */ +struct eac_codec { + enum eac_mclk_src mclk_src; + + enum eac_codec_mode codec_mode; + union { + struct eac_i2s_conf i2s; + } codec_conf; + + int default_rate; /* audio sampling rate */ + + int (* set_power)(void *private_data, int dac, int adc); + int (* register_controls)(void *private_data, + struct snd_card *card); + const char *short_name; + + void *private_data; +}; + +/* structure for passing platform dependent data to the EAC driver */ +struct eac_platform_data { + int (* init)(struct device *eac_dev); + void (* cleanup)(struct device *eac_dev); + /* these callbacks are used to configure & control external MCLK + * source. NULL if not used */ + int (* enable_ext_clocks)(struct device *eac_dev); + void (* disable_ext_clocks)(struct device *eac_dev); +}; + +extern void omap_init_eac(struct eac_platform_data *pdata); + +extern int eac_register_codec(struct device *eac_dev, struct eac_codec *codec); +extern void eac_unregister_codec(struct device *eac_dev); + +extern int eac_set_mode(struct device *eac_dev, int play, int rec); + +#endif /* __ASM_ARM_ARCH_OMAP2_EAC_H */ diff --git a/include/asm-arm/arch-omap/menelaus.h b/include/asm-arm/arch-omap/menelaus.h index 82d276a6bd9..69ed7ee4017 100644 --- a/include/asm-arm/arch-omap/menelaus.h +++ b/include/asm-arm/arch-omap/menelaus.h @@ -7,6 +7,12 @@ #ifndef __ASM_ARCH_MENELAUS_H #define __ASM_ARCH_MENELAUS_H +struct device; + +struct menelaus_platform_data { + int (* late_init)(struct device *dev); +}; + extern int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), void *data); extern void menelaus_unregister_mmc_callback(void); @@ -20,6 +26,19 @@ extern int menelaus_set_vaux(unsigned int mV); extern int menelaus_set_vdcdc(int dcdc, unsigned int mV); extern int menelaus_set_slot_sel(int enable); extern int menelaus_get_slot_pin_states(void); +extern int menelaus_set_vcore_sw(unsigned int mV); +extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV); + +#define EN_VPLL_SLEEP (1 << 7) +#define EN_VMMC_SLEEP (1 << 6) +#define EN_VAUX_SLEEP (1 << 5) +#define EN_VIO_SLEEP (1 << 4) +#define EN_VMEM_SLEEP (1 << 3) +#define EN_DC3_SLEEP (1 << 2) +#define EN_DC2_SLEEP (1 << 1) +#define EN_VC_SLEEP (1 << 0) + +extern int menelaus_set_regulator_sleep(int enable, u32 val); #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS) #define omap_has_menelaus() 1 @@ -28,4 +47,3 @@ extern int menelaus_get_slot_pin_states(void); #endif #endif - diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h new file mode 100644 index 00000000000..b70e37b6124 --- /dev/null +++ b/include/asm-arm/arch-omap/mmc.h @@ -0,0 +1,66 @@ +/* + * MMC definitions for OMAP2 + * + * Copyright (C) 2006 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __OMAP2_MMC_H +#define __OMAP2_MMC_H + +#include +#include +#include + +#define OMAP_MMC_MAX_SLOTS 2 + +struct omap_mmc_platform_data { + unsigned enabled:1; + /* number of slots on board */ + unsigned nr_slots:2; + /* nomux means "standard" muxing is wrong on this board, and that + * board-specific code handled it before common init logic. + */ + unsigned nomux:1; + /* 4 wire signaling is optional, and is only used for SD/SDIO and + * MMCv4 */ + unsigned wire4:1; + /* set if your board has components or wiring that limits the + * maximum frequency on the MMC bus */ + unsigned int max_freq; + + /* switch the bus to a new slot */ + int (* switch_slot)(struct device *dev, int slot); + /* initialize board-specific MMC functionality, can be NULL if + * not supported */ + int (* init)(struct device *dev); + void (* cleanup)(struct device *dev); + + struct omap_mmc_slot_data { + int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); + int (* set_power)(struct device *dev, int slot, int power_on, int vdd); + int (* get_ro)(struct device *dev, int slot); + + /* return MMC cover switch state, can be NULL if not supported. + * + * possible return values: + * 0 - open + * 1 - closed + */ + int (* get_cover_state)(struct device *dev, int slot); + + const char *name; + u32 ocr_mask; + } slots[OMAP_MMC_MAX_SLOTS]; +}; + +extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); + +/* called from board-specific card detection service routine */ +extern void omap_mmc_notify_card_detect(struct device *dev, int slot, int detected); +extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); + +#endif diff --git a/include/asm-arm/arch-omap/onenand.h b/include/asm-arm/arch-omap/onenand.h new file mode 100644 index 00000000000..6c959d0ce47 --- /dev/null +++ b/include/asm-arm/arch-omap/onenand.h @@ -0,0 +1,21 @@ +/* + * include/asm-arm/arch-omap/onenand.h + * + * Copyright (C) 2006 Nokia Corporation + * Author: Juha Yrjola + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +struct omap_onenand_platform_data { + int cs; + int gpio_irq; + struct mtd_partition *parts; + int nr_parts; + int (*onenand_setup)(void __iomem *); + int dma_channel; +}; -- cgit v1