From 0edd5b44913cd0aba6f23b626b407f70bb3fb018 Mon Sep 17 00:00:00 2001
From: Jeff Garzik <jgarzik@pobox.com>
Date: Wed, 7 Sep 2005 00:48:31 -0400
Subject: [wireless ieee80211,ipw2200] Lindent source code

No code changes, just Lindent + manual fixups.

This prepares us for updating to the latest Intel driver code, plus
gives the source code a nice facelift.
---
 drivers/net/wireless/ipw2200.c       | 2270 +++++++++++++++++-----------------
 drivers/net/wireless/ipw2200.h       |  406 +++---
 net/ieee80211/ieee80211_crypt.c      |   27 +-
 net/ieee80211/ieee80211_crypt_ccmp.c |   47 +-
 net/ieee80211/ieee80211_crypt_tkip.c |  133 +-
 net/ieee80211/ieee80211_crypt_wep.c  |   30 +-
 net/ieee80211/ieee80211_module.c     |   40 +-
 net/ieee80211/ieee80211_rx.c         |  310 ++---
 net/ieee80211/ieee80211_tx.c         |   66 +-
 net/ieee80211/ieee80211_wx.c         |   68 +-
 10 files changed, 1648 insertions(+), 1749 deletions(-)

diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c
index 2a3bd607a5c..b7f275c00de 100644
--- a/drivers/net/wireless/ipw2200.c
+++ b/drivers/net/wireless/ipw2200.c
@@ -72,7 +72,8 @@ static void ipw_rx_queue_replenish(void *);
 static int ipw_up(struct ipw_priv *);
 static void ipw_down(struct ipw_priv *);
 static int ipw_config(struct ipw_priv *);
-static int init_supported_rates(struct ipw_priv *priv, struct ipw_supported_rates *prates);
+static int init_supported_rates(struct ipw_priv *priv,
+				struct ipw_supported_rates *prates);
 
 static u8 band_b_active_channel[MAX_B_CHANNELS] = {
 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0
@@ -102,7 +103,7 @@ static int is_valid_channel(int mode_mask, int channel)
 }
 
 static char *snprint_line(char *buf, size_t count,
-			  const u8 *data, u32 len, u32 ofs)
+			  const u8 * data, u32 len, u32 ofs)
 {
 	int out, i, j, l;
 	char c;
@@ -136,7 +137,7 @@ static char *snprint_line(char *buf, size_t count,
 	return buf;
 }
 
-static void printk_buf(int level, const u8 *data, u32 len)
+static void printk_buf(int level, const u8 * data, u32 len)
 {
 	char line[81];
 	u32 ofs = 0;
@@ -161,21 +162,24 @@ static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg);
 static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value);
 static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c)
 {
-	IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
+	IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__,
+		     __LINE__, (u32) (b), (u32) (c));
 	_ipw_write_reg8(a, b, c);
 }
 
 static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value);
 static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c)
 {
-	IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
+	IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__,
+		     __LINE__, (u32) (b), (u32) (c));
 	_ipw_write_reg16(a, b, c);
 }
 
 static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value);
 static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
 {
-	IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
+	IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__,
+		     __LINE__, (u32) (b), (u32) (c));
 	_ipw_write_reg32(a, b, c);
 }
 
@@ -195,24 +199,30 @@ static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
  _ipw_write32(ipw, ofs, val)
 
 #define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs))
-static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
-	IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32)(ofs));
+static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
+{
+	IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32) (ofs));
 	return _ipw_read8(ipw, ofs);
 }
+
 #define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs)
 
 #define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs))
-static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
-	IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32)(ofs));
+static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
+{
+	IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32) (ofs));
 	return _ipw_read16(ipw, ofs);
 }
+
 #define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs)
 
 #define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs))
-static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
-	IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32)(ofs));
+static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
+{
+	IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32) (ofs));
 	return _ipw_read32(ipw, ofs);
 }
+
 #define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs)
 
 static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int);
@@ -220,34 +230,30 @@ static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int);
 	IPW_DEBUG_IO("%s %d: read_inddirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
 	_ipw_read_indirect(a, b, c, d)
 
-static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *data, int num);
+static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * data,
+				int num);
 #define ipw_write_indirect(a, b, c, d) \
 	IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
         _ipw_write_indirect(a, b, c, d)
 
 /* indirect write s */
-static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg,
-			     u32 value)
+static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value)
 {
-	IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n",
-		     priv, reg, value);
+	IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n", priv, reg, value);
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg);
 	_ipw_write32(priv, CX2_INDIRECT_DATA, value);
 }
 
-
 static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value)
 {
 	IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
 	_ipw_write8(priv, CX2_INDIRECT_DATA, value);
 	IPW_DEBUG_IO(" reg = 0x%8lX : value = 0x%8X\n",
-		     (unsigned long)(priv->hw_base + CX2_INDIRECT_DATA),
-		     value);
+		     (unsigned long)(priv->hw_base + CX2_INDIRECT_DATA), value);
 }
 
-static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg,
-			     u16 value)
+static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value)
 {
 	IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
@@ -262,7 +268,7 @@ static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg)
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
 	IPW_DEBUG_IO(" reg = 0x%8X : \n", reg);
 	word = _ipw_read32(priv, CX2_INDIRECT_DATA);
-	return (word >> ((reg & 0x3)*8)) & 0xff;
+	return (word >> ((reg & 0x3) * 8)) & 0xff;
 }
 
 static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg)
@@ -302,7 +308,7 @@ static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
 	_ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr);
 	aligned_len = num & CX2_INDIRECT_ADDR_MASK;
 	for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
-		*(u32*)buf = ipw_read32(priv, CX2_AUTOINC_DATA);
+		*(u32 *) buf = ipw_read32(priv, CX2_AUTOINC_DATA);
 
 	/* Copy the last nibble */
 	dif_len = num - aligned_len;
@@ -311,7 +317,7 @@ static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
 		*buf = ipw_read8(priv, CX2_INDIRECT_DATA + i);
 }
 
-static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf,
+static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
 				int num)
 {
 	u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK;
@@ -335,7 +341,7 @@ static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf,
 	_ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr);
 	aligned_len = num & CX2_INDIRECT_ADDR_MASK;
 	for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
-		_ipw_write32(priv, CX2_AUTOINC_DATA, *(u32*)buf);
+		_ipw_write32(priv, CX2_AUTOINC_DATA, *(u32 *) buf);
 
 	/* Copy the last nibble */
 	dif_len = num - aligned_len;
@@ -428,20 +434,18 @@ static void ipw_dump_nic_error_log(struct ipw_priv *priv)
 	}
 
 	for (i = ERROR_START_OFFSET;
-	     i <= count * ERROR_ELEM_SIZE;
-	     i += ERROR_ELEM_SIZE) {
-		desc   = ipw_read_reg32(priv, base + i);
-		time   = ipw_read_reg32(priv, base + i + 1*sizeof(u32));
-		blink1 = ipw_read_reg32(priv, base + i + 2*sizeof(u32));
-		blink2 = ipw_read_reg32(priv, base + i + 3*sizeof(u32));
-		ilink1 = ipw_read_reg32(priv, base + i + 4*sizeof(u32));
-		ilink2 = ipw_read_reg32(priv, base + i + 5*sizeof(u32));
-		idata =  ipw_read_reg32(priv, base + i + 6*sizeof(u32));
+	     i <= count * ERROR_ELEM_SIZE; i += ERROR_ELEM_SIZE) {
+		desc = ipw_read_reg32(priv, base + i);
+		time = ipw_read_reg32(priv, base + i + 1 * sizeof(u32));
+		blink1 = ipw_read_reg32(priv, base + i + 2 * sizeof(u32));
+		blink2 = ipw_read_reg32(priv, base + i + 3 * sizeof(u32));
+		ilink1 = ipw_read_reg32(priv, base + i + 4 * sizeof(u32));
+		ilink2 = ipw_read_reg32(priv, base + i + 5 * sizeof(u32));
+		idata = ipw_read_reg32(priv, base + i + 6 * sizeof(u32));
 
-		IPW_ERROR(
-			"%s %i 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x\n",
-			ipw_error_desc(desc), time, blink1, blink2,
-			ilink1, ilink2, idata);
+		IPW_ERROR("%s %i 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x\n",
+			  ipw_error_desc(desc), time, blink1, blink2,
+			  ilink1, ilink2, idata);
 	}
 }
 
@@ -456,11 +460,10 @@ static void ipw_dump_nic_event_log(struct ipw_priv *priv)
 		IPW_ERROR("Start IPW Event Log Dump:\n");
 
 	for (i = EVENT_START_OFFSET;
-	     i <= count * EVENT_ELEM_SIZE;
-	     i += EVENT_ELEM_SIZE) {
+	     i <= count * EVENT_ELEM_SIZE; i += EVENT_ELEM_SIZE) {
 		ev = ipw_read_reg32(priv, base + i);
-		time  = ipw_read_reg32(priv, base + i + 1*sizeof(u32));
-		data  = ipw_read_reg32(priv, base + i + 2*sizeof(u32));
+		time = ipw_read_reg32(priv, base + i + 1 * sizeof(u32));
+		data = ipw_read_reg32(priv, base + i + 2 * sizeof(u32));
 
 #ifdef CONFIG_IPW_DEBUG
 		IPW_ERROR("%i\t0x%08x\t%i\n", time, data, ev);
@@ -468,8 +471,7 @@ static void ipw_dump_nic_event_log(struct ipw_priv *priv)
 	}
 }
 
-static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
-			   u32 *len)
+static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, u32 * len)
 {
 	u32 addr, field_info, field_len, field_count, total_len;
 
@@ -513,11 +515,11 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 		}
 
 		IPW_DEBUG_ORD("Reading TABLE0[%i] from offset 0x%08x\n",
-			      ord, priv->table0_addr + (ord  << 2));
+			      ord, priv->table0_addr + (ord << 2));
 
 		*len = sizeof(u32);
 		ord <<= 2;
-		*((u32 *)val) = ipw_read32(priv, priv->table0_addr + ord);
+		*((u32 *) val) = ipw_read32(priv, priv->table0_addr + ord);
 		break;
 
 	case IPW_ORD_TABLE_1_MASK:
@@ -545,7 +547,8 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 			return -EINVAL;
 		}
 
-		*((u32 *)val) = ipw_read_reg32(priv, (priv->table1_addr + (ord << 2)));
+		*((u32 *) val) =
+		    ipw_read_reg32(priv, (priv->table1_addr + (ord << 2)));
 		*len = sizeof(u32);
 		break;
 
@@ -573,13 +576,16 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 
 		/* get the second DW of statistics ;
 		 * two 16-bit words - first is length, second is count */
-		field_info = ipw_read_reg32(priv, priv->table2_addr + (ord << 3) + sizeof(u32));
+		field_info =
+		    ipw_read_reg32(priv,
+				   priv->table2_addr + (ord << 3) +
+				   sizeof(u32));
 
 		/* get each entry length */
-		field_len = *((u16 *)&field_info);
+		field_len = *((u16 *) & field_info);
 
 		/* get number of entries */
-		field_count = *(((u16 *)&field_info) + 1);
+		field_count = *(((u16 *) & field_info) + 1);
 
 		/* abort if not enought memory */
 		total_len = field_len * field_count;
@@ -604,7 +610,6 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 
 	}
 
-
 	return 0;
 }
 
@@ -624,7 +629,7 @@ static void ipw_init_ordinals(struct ipw_priv *priv)
 
 	priv->table2_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_2);
 	priv->table2_len = ipw_read_reg32(priv, priv->table2_addr);
-	priv->table2_len &= 0x0000ffff; /* use first two bytes */
+	priv->table2_len &= 0x0000ffff;	/* use first two bytes */
 
 	IPW_DEBUG_ORD("table 2 offset at 0x%08x, len = %i\n",
 		      priv->table2_addr, priv->table2_len);
@@ -643,7 +648,7 @@ static ssize_t show_debug_level(struct device_driver *d, char *buf)
 	return sprintf(buf, "0x%08X\n", ipw_debug_level);
 }
 static ssize_t store_debug_level(struct device_driver *d,
-				const char *buf, size_t count)
+				 const char *buf, size_t count)
 {
 	char *p = (char *)buf;
 	u32 val;
@@ -668,11 +673,12 @@ static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
 		   show_debug_level, store_debug_level);
 
 static ssize_t show_status(struct device *d,
-			struct device_attribute *attr, char *buf)
+			   struct device_attribute *attr, char *buf)
 {
 	struct ipw_priv *p = d->driver_data;
 	return sprintf(buf, "0x%08x\n", (int)p->status);
 }
+
 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
 
 static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
@@ -681,10 +687,11 @@ static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
 	struct ipw_priv *p = d->driver_data;
 	return sprintf(buf, "0x%08x\n", (int)p->config);
 }
+
 static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL);
 
 static ssize_t show_nic_type(struct device *d,
-			struct device_attribute *attr, char *buf)
+			     struct device_attribute *attr, char *buf)
 {
 	struct ipw_priv *p = d->driver_data;
 	u8 type = p->eeprom[EEPROM_NIC_TYPE];
@@ -704,44 +711,50 @@ static ssize_t show_nic_type(struct device *d,
 
 	return sprintf(buf, "UNKNOWN\n");
 }
+
 static DEVICE_ATTR(nic_type, S_IRUGO, show_nic_type, NULL);
 
 static ssize_t dump_error_log(struct device *d,
-		struct device_attribute *attr, const char *buf, size_t count)
+			      struct device_attribute *attr, const char *buf,
+			      size_t count)
 {
 	char *p = (char *)buf;
 
 	if (p[0] == '1')
-		ipw_dump_nic_error_log((struct ipw_priv*)d->driver_data);
+		ipw_dump_nic_error_log((struct ipw_priv *)d->driver_data);
 
 	return strnlen(buf, count);
 }
+
 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
 
 static ssize_t dump_event_log(struct device *d,
-		struct device_attribute *attr, const char *buf, size_t count)
+			      struct device_attribute *attr, const char *buf,
+			      size_t count)
 {
 	char *p = (char *)buf;
 
 	if (p[0] == '1')
-		ipw_dump_nic_event_log((struct ipw_priv*)d->driver_data);
+		ipw_dump_nic_event_log((struct ipw_priv *)d->driver_data);
 
 	return strnlen(buf, count);
 }
+
 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
 
 static ssize_t show_ucode_version(struct device *d,
-			struct device_attribute *attr, char *buf)
+				  struct device_attribute *attr, char *buf)
 {
 	u32 len = sizeof(u32), tmp = 0;
 	struct ipw_priv *p = d->driver_data;
 
-	if(ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len))
+	if (ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len))
 		return 0;
 
 	return sprintf(buf, "0x%08x\n", tmp);
 }
-static DEVICE_ATTR(ucode_version, S_IWUSR|S_IRUGO, show_ucode_version, NULL);
+
+static DEVICE_ATTR(ucode_version, S_IWUSR | S_IRUGO, show_ucode_version, NULL);
 
 static ssize_t show_rtc(struct device *d, struct device_attribute *attr,
 			char *buf)
@@ -749,36 +762,38 @@ static ssize_t show_rtc(struct device *d, struct device_attribute *attr,
 	u32 len = sizeof(u32), tmp = 0;
 	struct ipw_priv *p = d->driver_data;
 
-	if(ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len))
+	if (ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len))
 		return 0;
 
 	return sprintf(buf, "0x%08x\n", tmp);
 }
-static DEVICE_ATTR(rtc, S_IWUSR|S_IRUGO, show_rtc, NULL);
+
+static DEVICE_ATTR(rtc, S_IWUSR | S_IRUGO, show_rtc, NULL);
 
 /*
  * Add a device attribute to view/control the delay between eeprom
  * operations.
  */
 static ssize_t show_eeprom_delay(struct device *d,
-			struct device_attribute *attr, char *buf)
+				 struct device_attribute *attr, char *buf)
 {
-	int n = ((struct ipw_priv*)d->driver_data)->eeprom_delay;
+	int n = ((struct ipw_priv *)d->driver_data)->eeprom_delay;
 	return sprintf(buf, "%i\n", n);
 }
 static ssize_t store_eeprom_delay(struct device *d,
-			struct device_attribute *attr, const char *buf,
-			size_t count)
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
 {
 	struct ipw_priv *p = d->driver_data;
 	sscanf(buf, "%i", &p->eeprom_delay);
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(eeprom_delay, S_IWUSR|S_IRUGO,
-		   show_eeprom_delay,store_eeprom_delay);
+
+static DEVICE_ATTR(eeprom_delay, S_IWUSR | S_IRUGO,
+		   show_eeprom_delay, store_eeprom_delay);
 
 static ssize_t show_command_event_reg(struct device *d,
-			struct device_attribute *attr, char *buf)
+				      struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *p = d->driver_data;
@@ -787,8 +802,8 @@ static ssize_t show_command_event_reg(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_command_event_reg(struct device *d,
-				struct device_attribute *attr, const char *buf,
-				size_t count)
+				       struct device_attribute *attr,
+				       const char *buf, size_t count)
 {
 	u32 reg;
 	struct ipw_priv *p = d->driver_data;
@@ -797,11 +812,12 @@ static ssize_t store_command_event_reg(struct device *d,
 	ipw_write_reg32(p, CX2_INTERNAL_CMD_EVENT, reg);
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(command_event_reg, S_IWUSR|S_IRUGO,
-		   show_command_event_reg,store_command_event_reg);
+
+static DEVICE_ATTR(command_event_reg, S_IWUSR | S_IRUGO,
+		   show_command_event_reg, store_command_event_reg);
 
 static ssize_t show_mem_gpio_reg(struct device *d,
-				struct device_attribute *attr, char *buf)
+				 struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *p = d->driver_data;
@@ -810,8 +826,8 @@ static ssize_t show_mem_gpio_reg(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_mem_gpio_reg(struct device *d,
-			struct device_attribute *attr, const char *buf,
-			size_t count)
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
 {
 	u32 reg;
 	struct ipw_priv *p = d->driver_data;
@@ -820,11 +836,12 @@ static ssize_t store_mem_gpio_reg(struct device *d,
 	ipw_write_reg32(p, 0x301100, reg);
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(mem_gpio_reg, S_IWUSR|S_IRUGO,
-		   show_mem_gpio_reg,store_mem_gpio_reg);
+
+static DEVICE_ATTR(mem_gpio_reg, S_IWUSR | S_IRUGO,
+		   show_mem_gpio_reg, store_mem_gpio_reg);
 
 static ssize_t show_indirect_dword(struct device *d,
-				struct device_attribute *attr, char *buf)
+				   struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *priv = d->driver_data;
@@ -836,8 +853,8 @@ static ssize_t show_indirect_dword(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_indirect_dword(struct device *d,
-				struct device_attribute *attr, const char *buf,
-				size_t count)
+				    struct device_attribute *attr,
+				    const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -845,11 +862,12 @@ static ssize_t store_indirect_dword(struct device *d,
 	priv->status |= STATUS_INDIRECT_DWORD;
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(indirect_dword, S_IWUSR|S_IRUGO,
-		   show_indirect_dword,store_indirect_dword);
+
+static DEVICE_ATTR(indirect_dword, S_IWUSR | S_IRUGO,
+		   show_indirect_dword, store_indirect_dword);
 
 static ssize_t show_indirect_byte(struct device *d,
-			struct device_attribute *attr, char *buf)
+				  struct device_attribute *attr, char *buf)
 {
 	u8 reg = 0;
 	struct ipw_priv *priv = d->driver_data;
@@ -861,8 +879,8 @@ static ssize_t show_indirect_byte(struct device *d,
 	return sprintf(buf, "0x%02x\n", reg);
 }
 static ssize_t store_indirect_byte(struct device *d,
-				struct device_attribute *attr, const char *buf,
-				size_t count)
+				   struct device_attribute *attr,
+				   const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -870,11 +888,12 @@ static ssize_t store_indirect_byte(struct device *d,
 	priv->status |= STATUS_INDIRECT_BYTE;
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(indirect_byte, S_IWUSR|S_IRUGO,
+
+static DEVICE_ATTR(indirect_byte, S_IWUSR | S_IRUGO,
 		   show_indirect_byte, store_indirect_byte);
 
 static ssize_t show_direct_dword(struct device *d,
-				struct device_attribute *attr, char *buf)
+				 struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *priv = d->driver_data;
@@ -887,8 +906,8 @@ static ssize_t show_direct_dword(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_direct_dword(struct device *d,
-			struct device_attribute *attr, const char *buf,
-			size_t count)
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -896,9 +915,9 @@ static ssize_t store_direct_dword(struct device *d,
 	priv->status |= STATUS_DIRECT_DWORD;
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(direct_dword, S_IWUSR|S_IRUGO,
-		   show_direct_dword,store_direct_dword);
 
+static DEVICE_ATTR(direct_dword, S_IWUSR | S_IRUGO,
+		   show_direct_dword, store_direct_dword);
 
 static inline int rf_kill_active(struct ipw_priv *priv)
 {
@@ -911,7 +930,7 @@ static inline int rf_kill_active(struct ipw_priv *priv)
 }
 
 static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
-				char *buf)
+			    char *buf)
 {
 	/* 0 - RF kill not enabled
 	   1 - SW based RF kill active (sysfs)
@@ -919,7 +938,7 @@ static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
 	   3 - Both HW and SW baed RF kill active */
 	struct ipw_priv *priv = d->driver_data;
 	int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) |
-		(rf_kill_active(priv) ? 0x2 : 0x0);
+	    (rf_kill_active(priv) ? 0x2 : 0x0);
 	return sprintf(buf, "%i\n", val);
 }
 
@@ -927,7 +946,7 @@ static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio)
 {
 	if ((disable_radio ? 1 : 0) ==
 	    (priv->status & STATUS_RF_KILL_SW ? 1 : 0))
-		return 0 ;
+		return 0;
 
 	IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO  %s\n",
 			  disable_radio ? "OFF" : "ON");
@@ -956,8 +975,8 @@ static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio)
 	return 1;
 }
 
-static ssize_t store_rf_kill(struct device *d,  struct device_attribute *attr,
-				const char *buf, size_t count)
+static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr,
+			     const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -965,7 +984,8 @@ static ssize_t store_rf_kill(struct device *d,  struct device_attribute *attr,
 
 	return count;
 }
-static DEVICE_ATTR(rf_kill, S_IWUSR|S_IRUGO, show_rf_kill, store_rf_kill);
+
+static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
 
 static void ipw_irq_tasklet(struct ipw_priv *priv)
 {
@@ -990,7 +1010,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
 
 	if (inta & CX2_INTA_BIT_TX_CMD_QUEUE) {
 		IPW_DEBUG_HC("Command completed.\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq_cmd, -1);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq_cmd, -1);
 		priv->status &= ~STATUS_HCMD_ACTIVE;
 		wake_up_interruptible(&priv->wait_command_queue);
 		handled |= CX2_INTA_BIT_TX_CMD_QUEUE;
@@ -998,25 +1018,25 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_1) {
 		IPW_DEBUG_TX("TX_QUEUE_1\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[0], 0);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[0], 0);
 		handled |= CX2_INTA_BIT_TX_QUEUE_1;
 	}
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_2) {
 		IPW_DEBUG_TX("TX_QUEUE_2\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[1], 1);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[1], 1);
 		handled |= CX2_INTA_BIT_TX_QUEUE_2;
 	}
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_3) {
 		IPW_DEBUG_TX("TX_QUEUE_3\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[2], 2);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[2], 2);
 		handled |= CX2_INTA_BIT_TX_QUEUE_3;
 	}
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_4) {
 		IPW_DEBUG_TX("TX_QUEUE_4\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[3], 3);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[3], 3);
 		handled |= CX2_INTA_BIT_TX_QUEUE_4;
 	}
 
@@ -1074,8 +1094,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
 	}
 
 	if (handled != inta) {
-		IPW_ERROR("Unhandled INTA bits 0x%08x\n",
-				inta & ~handled);
+		IPW_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
 	}
 
 	/* enable all interrupts */
@@ -1143,7 +1162,7 @@ static char *get_cmd_string(u8 cmd)
 		return "UNKNOWN";
 	}
 }
-#endif /* CONFIG_IPW_DEBUG */
+#endif				/* CONFIG_IPW_DEBUG */
 
 #define HOST_COMPLETE_TIMEOUT HZ
 static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)
@@ -1159,15 +1178,16 @@ static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)
 
 	IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n",
 		     get_cmd_string(cmd->cmd), cmd->cmd, cmd->len);
-	printk_buf(IPW_DL_HOST_COMMAND, (u8*)cmd->param, cmd->len);
+	printk_buf(IPW_DL_HOST_COMMAND, (u8 *) cmd->param, cmd->len);
 
 	rc = ipw_queue_tx_hcmd(priv, cmd->cmd, &cmd->param, cmd->len, 0);
 	if (rc)
 		return rc;
 
-	rc = wait_event_interruptible_timeout(
-		priv->wait_command_queue, !(priv->status & STATUS_HCMD_ACTIVE),
-		HOST_COMPLETE_TIMEOUT);
+	rc = wait_event_interruptible_timeout(priv->wait_command_queue,
+					      !(priv->
+						status & STATUS_HCMD_ACTIVE),
+					      HOST_COMPLETE_TIMEOUT);
 	if (rc == 0) {
 		IPW_DEBUG_INFO("Command completion failed out after %dms.\n",
 			       jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
@@ -1215,7 +1235,7 @@ static int ipw_send_system_config(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,config,sizeof(*config));
+	memcpy(&cmd.param, config, sizeof(*config));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SYSTEM_CONFIG command\n");
 		return -1;
@@ -1224,7 +1244,7 @@ static int ipw_send_system_config(struct ipw_priv *priv,
 	return 0;
 }
 
-static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len)
+static int ipw_send_ssid(struct ipw_priv *priv, u8 * ssid, int len)
 {
 	struct host_cmd cmd = {
 		.cmd = IPW_CMD_SSID,
@@ -1245,7 +1265,7 @@ static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len)
 	return 0;
 }
 
-static int ipw_send_adapter_address(struct ipw_priv *priv, u8 *mac)
+static int ipw_send_adapter_address(struct ipw_priv *priv, u8 * mac)
 {
 	struct host_cmd cmd = {
 		.cmd = IPW_CMD_ADAPTER_ADDRESS,
@@ -1284,9 +1304,6 @@ static void ipw_adapter_restart(void *adapter)
 	}
 }
 
-
-
-
 #define IPW_SCAN_CHECK_WATCHDOG (5 * HZ)
 
 static void ipw_scan_check(void *data)
@@ -1313,7 +1330,7 @@ static int ipw_send_scan_request_ext(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,request,sizeof(*request));
+	memcpy(&cmd.param, request, sizeof(*request));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SCAN_REQUEST_EXT command\n");
 		return -1;
@@ -1351,7 +1368,7 @@ static int ipw_set_sensitivity(struct ipw_priv *priv, u16 sens)
 		.len = sizeof(struct ipw_sensitivity_calib)
 	};
 	struct ipw_sensitivity_calib *calib = (struct ipw_sensitivity_calib *)
-		&cmd.param;
+	    &cmd.param;
 	calib->beacon_rssi_raw = sens;
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SENSITIVITY CALIB command\n");
@@ -1374,7 +1391,7 @@ static int ipw_send_associate(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,associate,sizeof(*associate));
+	memcpy(&cmd.param, associate, sizeof(*associate));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send ASSOCIATE command\n");
 		return -1;
@@ -1396,7 +1413,7 @@ static int ipw_send_supported_rates(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,rates,sizeof(*rates));
+	memcpy(&cmd.param, rates, sizeof(*rates));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SUPPORTED_RATES command\n");
 		return -1;
@@ -1440,7 +1457,7 @@ static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off)
 		return -1;
 	}
 
-	*((u32*)&cmd.param) = phy_off;
+	*((u32 *) & cmd.param) = phy_off;
 
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send CARD_DISABLE command\n");
@@ -1451,8 +1468,7 @@ static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off)
 }
 #endif
 
-static int ipw_send_tx_power(struct ipw_priv *priv,
-			     struct ipw_tx_power *power)
+static int ipw_send_tx_power(struct ipw_priv *priv, struct ipw_tx_power *power)
 {
 	struct host_cmd cmd = {
 		.cmd = IPW_CMD_TX_POWER,
@@ -1464,7 +1480,7 @@ static int ipw_send_tx_power(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,power,sizeof(*power));
+	memcpy(&cmd.param, power, sizeof(*power));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send TX_POWER command\n");
 		return -1;
@@ -1527,7 +1543,7 @@ static int ipw_send_power_mode(struct ipw_priv *priv, u32 mode)
 		.cmd = IPW_CMD_POWER_MODE,
 		.len = sizeof(u32)
 	};
-	u32 *param = (u32*)(&cmd.param);
+	u32 *param = (u32 *) (&cmd.param);
 
 	if (!priv) {
 		IPW_ERROR("Invalid args\n");
@@ -1585,67 +1601,67 @@ static inline void eeprom_write_reg(struct ipw_priv *p, u32 data)
 }
 
 /* perform a chip select operation */
-static inline void eeprom_cs(struct ipw_priv* priv)
+static inline void eeprom_cs(struct ipw_priv *priv)
 {
-	eeprom_write_reg(priv,0);
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
-	eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK);
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
+	eeprom_write_reg(priv, 0);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
+	eeprom_write_reg(priv, EEPROM_BIT_CS | EEPROM_BIT_SK);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
 }
 
 /* perform a chip select operation */
-static inline void eeprom_disable_cs(struct ipw_priv* priv)
+static inline void eeprom_disable_cs(struct ipw_priv *priv)
 {
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
-	eeprom_write_reg(priv,0);
-	eeprom_write_reg(priv,EEPROM_BIT_SK);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
+	eeprom_write_reg(priv, 0);
+	eeprom_write_reg(priv, EEPROM_BIT_SK);
 }
 
 /* push a single bit down to the eeprom */
-static inline void eeprom_write_bit(struct ipw_priv *p,u8 bit)
+static inline void eeprom_write_bit(struct ipw_priv *p, u8 bit)
 {
-	int d = ( bit ? EEPROM_BIT_DI : 0);
-	eeprom_write_reg(p,EEPROM_BIT_CS|d);
-	eeprom_write_reg(p,EEPROM_BIT_CS|d|EEPROM_BIT_SK);
+	int d = (bit ? EEPROM_BIT_DI : 0);
+	eeprom_write_reg(p, EEPROM_BIT_CS | d);
+	eeprom_write_reg(p, EEPROM_BIT_CS | d | EEPROM_BIT_SK);
 }
 
 /* push an opcode followed by an address down to the eeprom */
-static void eeprom_op(struct ipw_priv* priv, u8 op, u8 addr)
+static void eeprom_op(struct ipw_priv *priv, u8 op, u8 addr)
 {
 	int i;
 
 	eeprom_cs(priv);
-	eeprom_write_bit(priv,1);
-	eeprom_write_bit(priv,op&2);
-	eeprom_write_bit(priv,op&1);
-	for ( i=7; i>=0; i-- ) {
-		eeprom_write_bit(priv,addr&(1<<i));
+	eeprom_write_bit(priv, 1);
+	eeprom_write_bit(priv, op & 2);
+	eeprom_write_bit(priv, op & 1);
+	for (i = 7; i >= 0; i--) {
+		eeprom_write_bit(priv, addr & (1 << i));
 	}
 }
 
 /* pull 16 bits off the eeprom, one bit at a time */
-static u16 eeprom_read_u16(struct ipw_priv* priv, u8 addr)
+static u16 eeprom_read_u16(struct ipw_priv *priv, u8 addr)
 {
 	int i;
-	u16 r=0;
+	u16 r = 0;
 
 	/* Send READ Opcode */
-	eeprom_op(priv,EEPROM_CMD_READ,addr);
+	eeprom_op(priv, EEPROM_CMD_READ, addr);
 
 	/* Send dummy bit */
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
 
 	/* Read the byte off the eeprom one bit at a time */
-	for ( i=0; i<16; i++ ) {
+	for (i = 0; i < 16; i++) {
 		u32 data = 0;
-		eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK);
-		eeprom_write_reg(priv,EEPROM_BIT_CS);
-		data = ipw_read_reg32(priv,FW_MEM_REG_EEPROM_ACCESS);
-		r = (r<<1) | ((data & EEPROM_BIT_DO)?1:0);
+		eeprom_write_reg(priv, EEPROM_BIT_CS | EEPROM_BIT_SK);
+		eeprom_write_reg(priv, EEPROM_BIT_CS);
+		data = ipw_read_reg32(priv, FW_MEM_REG_EEPROM_ACCESS);
+		r = (r << 1) | ((data & EEPROM_BIT_DO) ? 1 : 0);
 	}
 
 	/* Send another dummy bit */
-	eeprom_write_reg(priv,0);
+	eeprom_write_reg(priv, 0);
 	eeprom_disable_cs(priv);
 
 	return r;
@@ -1653,9 +1669,9 @@ static u16 eeprom_read_u16(struct ipw_priv* priv, u8 addr)
 
 /* helper function for pulling the mac address out of the private */
 /* data's copy of the eeprom data                                 */
-static void eeprom_parse_mac(struct ipw_priv* priv, u8* mac)
+static void eeprom_parse_mac(struct ipw_priv *priv, u8 * mac)
 {
-	u8* ee = (u8*)priv->eeprom;
+	u8 *ee = (u8 *) priv->eeprom;
 	memcpy(mac, &ee[EEPROM_MAC_ADDRESS], 6);
 }
 
@@ -1670,26 +1686,25 @@ static void eeprom_parse_mac(struct ipw_priv* priv, u8* mac)
 static void ipw_eeprom_init_sram(struct ipw_priv *priv)
 {
 	int i;
-	u16 *eeprom = (u16 *)priv->eeprom;
+	u16 *eeprom = (u16 *) priv->eeprom;
 
 	IPW_DEBUG_TRACE(">>\n");
 
 	/* read entire contents of eeprom into private buffer */
-	for ( i=0; i<128; i++ )
-		eeprom[i] = eeprom_read_u16(priv,(u8)i);
+	for (i = 0; i < 128; i++)
+		eeprom[i] = eeprom_read_u16(priv, (u8) i);
 
 	/*
 	   If the data looks correct, then copy it to our private
 	   copy.  Otherwise let the firmware know to perform the operation
 	   on it's own
-	*/
+	 */
 	if ((priv->eeprom + EEPROM_VERSION) != 0) {
 		IPW_DEBUG_INFO("Writing EEPROM data into SRAM\n");
 
 		/* write the eeprom data to sram */
-		for( i=0; i<CX2_EEPROM_IMAGE_SIZE; i++ )
-			ipw_write8(priv, IPW_EEPROM_DATA + i,
-				   priv->eeprom[i]);
+		for (i = 0; i < CX2_EEPROM_IMAGE_SIZE; i++)
+			ipw_write8(priv, IPW_EEPROM_DATA + i, priv->eeprom[i]);
 
 		/* Do not load eeprom data on fatal error or suspend */
 		ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0);
@@ -1703,11 +1718,11 @@ static void ipw_eeprom_init_sram(struct ipw_priv *priv)
 	IPW_DEBUG_TRACE("<<\n");
 }
 
-
 static inline void ipw_zero_memory(struct ipw_priv *priv, u32 start, u32 count)
 {
 	count >>= 2;
-	if (!count) return;
+	if (!count)
+		return;
 	_ipw_write32(priv, CX2_AUTOINC_ADDR, start);
 	while (count--)
 		_ipw_write32(priv, CX2_AUTOINC_DATA, 0);
@@ -1721,7 +1736,7 @@ static inline void ipw_fw_dma_reset_command_blocks(struct ipw_priv *priv)
 }
 
 static int ipw_fw_dma_enable(struct ipw_priv *priv)
-{ /* start dma engine but no transfers yet*/
+{				/* start dma engine but no transfers yet */
 
 	IPW_DEBUG_FW(">> : \n");
 
@@ -1749,12 +1764,16 @@ static void ipw_fw_dma_abort(struct ipw_priv *priv)
 	IPW_DEBUG_FW("<< \n");
 }
 
-static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, struct command_block *cb)
+static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index,
+					  struct command_block *cb)
 {
-	u32 address = CX2_SHARED_SRAM_DMA_CONTROL + (sizeof(struct command_block) * index);
+	u32 address =
+	    CX2_SHARED_SRAM_DMA_CONTROL +
+	    (sizeof(struct command_block) * index);
 	IPW_DEBUG_FW(">> :\n");
 
-	ipw_write_indirect(priv, address, (u8*)cb, (int)sizeof(struct command_block));
+	ipw_write_indirect(priv, address, (u8 *) cb,
+			   (int)sizeof(struct command_block));
 
 	IPW_DEBUG_FW("<< :\n");
 	return 0;
@@ -1764,17 +1783,20 @@ static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, stru
 static int ipw_fw_dma_kick(struct ipw_priv *priv)
 {
 	u32 control = 0;
-	u32 index=0;
+	u32 index = 0;
 
 	IPW_DEBUG_FW(">> :\n");
 
 	for (index = 0; index < priv->sram_desc.last_cb_index; index++)
-		ipw_fw_dma_write_command_block(priv, index, &priv->sram_desc.cb_list[index]);
+		ipw_fw_dma_write_command_block(priv, index,
+					       &priv->sram_desc.cb_list[index]);
 
 	/* Enable the DMA in the CSR register */
-	ipw_clear_bit(priv, CX2_RESET_REG,CX2_RESET_REG_MASTER_DISABLED | CX2_RESET_REG_STOP_MASTER);
+	ipw_clear_bit(priv, CX2_RESET_REG,
+		      CX2_RESET_REG_MASTER_DISABLED |
+		      CX2_RESET_REG_STOP_MASTER);
 
-        /* Set the Start bit. */
+	/* Set the Start bit. */
 	control = DMA_CONTROL_SMALL_CB_CONST_VALUE | DMA_CB_START;
 	ipw_write_reg32(priv, CX2_DMA_I_DMA_CONTROL, control);
 
@@ -1785,25 +1807,25 @@ static int ipw_fw_dma_kick(struct ipw_priv *priv)
 static void ipw_fw_dma_dump_command_block(struct ipw_priv *priv)
 {
 	u32 address;
-	u32 register_value=0;
-	u32 cb_fields_address=0;
+	u32 register_value = 0;
+	u32 cb_fields_address = 0;
 
 	IPW_DEBUG_FW(">> :\n");
-	address = ipw_read_reg32(priv,CX2_DMA_I_CURRENT_CB);
-	IPW_DEBUG_FW_INFO("Current CB is 0x%x \n",address);
+	address = ipw_read_reg32(priv, CX2_DMA_I_CURRENT_CB);
+	IPW_DEBUG_FW_INFO("Current CB is 0x%x \n", address);
 
 	/* Read the DMA Controlor register */
 	register_value = ipw_read_reg32(priv, CX2_DMA_I_DMA_CONTROL);
-	IPW_DEBUG_FW_INFO("CX2_DMA_I_DMA_CONTROL is 0x%x \n",register_value);
+	IPW_DEBUG_FW_INFO("CX2_DMA_I_DMA_CONTROL is 0x%x \n", register_value);
 
-	/* Print the CB values*/
+	/* Print the CB values */
 	cb_fields_address = address;
 	register_value = ipw_read_reg32(priv, cb_fields_address);
-	IPW_DEBUG_FW_INFO("Current CB ControlField is 0x%x \n",register_value);
+	IPW_DEBUG_FW_INFO("Current CB ControlField is 0x%x \n", register_value);
 
 	cb_fields_address += sizeof(u32);
 	register_value = ipw_read_reg32(priv, cb_fields_address);
-	IPW_DEBUG_FW_INFO("Current CB Source Field is 0x%x \n",register_value);
+	IPW_DEBUG_FW_INFO("Current CB Source Field is 0x%x \n", register_value);
 
 	cb_fields_address += sizeof(u32);
 	register_value = ipw_read_reg32(priv, cb_fields_address);
@@ -1812,7 +1834,7 @@ static void ipw_fw_dma_dump_command_block(struct ipw_priv *priv)
 
 	cb_fields_address += sizeof(u32);
 	register_value = ipw_read_reg32(priv, cb_fields_address);
-	IPW_DEBUG_FW_INFO("Current CB Status Field is 0x%x \n",register_value);
+	IPW_DEBUG_FW_INFO("Current CB Status Field is 0x%x \n", register_value);
 
 	IPW_DEBUG_FW(">> :\n");
 }
@@ -1823,13 +1845,13 @@ static int ipw_fw_dma_command_block_index(struct ipw_priv *priv)
 	u32 current_cb_index = 0;
 
 	IPW_DEBUG_FW("<< :\n");
-	current_cb_address= ipw_read_reg32(priv, CX2_DMA_I_CURRENT_CB);
+	current_cb_address = ipw_read_reg32(priv, CX2_DMA_I_CURRENT_CB);
 
-	current_cb_index = (current_cb_address - CX2_SHARED_SRAM_DMA_CONTROL )/
-		sizeof (struct command_block);
+	current_cb_index = (current_cb_address - CX2_SHARED_SRAM_DMA_CONTROL) /
+	    sizeof(struct command_block);
 
 	IPW_DEBUG_FW_INFO("Current CB index 0x%x address = 0x%X \n",
-			  current_cb_index, current_cb_address );
+			  current_cb_index, current_cb_address);
 
 	IPW_DEBUG_FW(">> :\n");
 	return current_cb_index;
@@ -1840,15 +1862,14 @@ static int ipw_fw_dma_add_command_block(struct ipw_priv *priv,
 					u32 src_address,
 					u32 dest_address,
 					u32 length,
-					int interrupt_enabled,
-					int is_last)
+					int interrupt_enabled, int is_last)
 {
 
 	u32 control = CB_VALID | CB_SRC_LE | CB_DEST_LE | CB_SRC_AUTOINC |
-		CB_SRC_IO_GATED | CB_DEST_AUTOINC | CB_SRC_SIZE_LONG |
-		CB_DEST_SIZE_LONG;
+	    CB_SRC_IO_GATED | CB_DEST_AUTOINC | CB_SRC_SIZE_LONG |
+	    CB_DEST_SIZE_LONG;
 	struct command_block *cb;
-	u32 last_cb_element=0;
+	u32 last_cb_element = 0;
 
 	IPW_DEBUG_FW_INFO("src_address=0x%x dest_address=0x%x length=0x%x\n",
 			  src_address, dest_address, length);
@@ -1861,7 +1882,7 @@ static int ipw_fw_dma_add_command_block(struct ipw_priv *priv,
 	priv->sram_desc.last_cb_index++;
 
 	/* Calculate the new CB control word */
-	if (interrupt_enabled )
+	if (interrupt_enabled)
 		control |= CB_INT_ENABLED;
 
 	if (is_last)
@@ -1870,7 +1891,7 @@ static int ipw_fw_dma_add_command_block(struct ipw_priv *priv,
 	control |= length;
 
 	/* Calculate the CB Element's checksum value */
-	cb->status = control ^src_address ^dest_address;
+	cb->status = control ^ src_address ^ dest_address;
 
 	/* Copy the Source and Destination addresses */
 	cb->dest_addr = dest_address;
@@ -1883,22 +1904,21 @@ static int ipw_fw_dma_add_command_block(struct ipw_priv *priv,
 }
 
 static int ipw_fw_dma_add_buffer(struct ipw_priv *priv,
-				 u32 src_phys,
-				 u32 dest_address,
-				 u32 length)
+				 u32 src_phys, u32 dest_address, u32 length)
 {
 	u32 bytes_left = length;
-	u32 src_offset=0;
-	u32 dest_offset=0;
+	u32 src_offset = 0;
+	u32 dest_offset = 0;
 	int status = 0;
 	IPW_DEBUG_FW(">> \n");
 	IPW_DEBUG_FW_INFO("src_phys=0x%x dest_address=0x%x length=0x%x\n",
 			  src_phys, dest_address, length);
 	while (bytes_left > CB_MAX_LENGTH) {
-		status = ipw_fw_dma_add_command_block( priv,
-						       src_phys + src_offset,
-						       dest_address + dest_offset,
-						       CB_MAX_LENGTH, 0, 0);
+		status = ipw_fw_dma_add_command_block(priv,
+						      src_phys + src_offset,
+						      dest_address +
+						      dest_offset,
+						      CB_MAX_LENGTH, 0, 0);
 		if (status) {
 			IPW_DEBUG_FW_INFO(": Failed\n");
 			return -1;
@@ -1912,18 +1932,18 @@ static int ipw_fw_dma_add_buffer(struct ipw_priv *priv,
 
 	/* add the buffer tail */
 	if (bytes_left > 0) {
-		status = ipw_fw_dma_add_command_block(
-			priv, src_phys + src_offset,
-			dest_address + dest_offset,
-			bytes_left, 0, 0);
+		status =
+		    ipw_fw_dma_add_command_block(priv, src_phys + src_offset,
+						 dest_address + dest_offset,
+						 bytes_left, 0, 0);
 		if (status) {
 			IPW_DEBUG_FW_INFO(": Failed on the buffer tail\n");
 			return -1;
 		} else
-			IPW_DEBUG_FW_INFO(": Adding new cb - the buffer tail\n");
+			IPW_DEBUG_FW_INFO
+			    (": Adding new cb - the buffer tail\n");
 	}
 
-
 	IPW_DEBUG_FW("<< \n");
 	return 0;
 }
@@ -1937,7 +1957,7 @@ static int ipw_fw_dma_wait(struct ipw_priv *priv)
 
 	current_index = ipw_fw_dma_command_block_index(priv);
 	IPW_DEBUG_FW_INFO("sram_desc.last_cb_index:0x%8X\n",
-			  (int) priv->sram_desc.last_cb_index);
+			  (int)priv->sram_desc.last_cb_index);
 
 	while (current_index < priv->sram_desc.last_cb_index) {
 		udelay(50);
@@ -1955,8 +1975,8 @@ static int ipw_fw_dma_wait(struct ipw_priv *priv)
 
 	ipw_fw_dma_abort(priv);
 
-	/*Disable the DMA in the CSR register*/
- 	ipw_set_bit(priv, CX2_RESET_REG,
+	/*Disable the DMA in the CSR register */
+	ipw_set_bit(priv, CX2_RESET_REG,
 		    CX2_RESET_REG_MASTER_DISABLED | CX2_RESET_REG_STOP_MASTER);
 
 	IPW_DEBUG_FW("<< dmaWaitSync \n");
@@ -2011,8 +2031,7 @@ static inline int ipw_poll_bit(struct ipw_priv *priv, u32 addr, u32 mask,
  * image and the caller is handling the memory allocation and clean up.
  */
 
-
-static int ipw_stop_master(struct ipw_priv * priv)
+static int ipw_stop_master(struct ipw_priv *priv)
 {
 	int rc;
 
@@ -2071,14 +2090,13 @@ struct fw_chunk {
 #define IPW_FW_NAME(x) "ipw2200_" x ".fw"
 #endif
 
-static int ipw_load_ucode(struct ipw_priv *priv, u8 * data,
-			  size_t len)
+static int ipw_load_ucode(struct ipw_priv *priv, u8 * data, size_t len)
 {
 	int rc = 0, i, addr;
 	u8 cr = 0;
 	u16 *image;
 
-	image = (u16 *)data;
+	image = (u16 *) data;
 
 	IPW_DEBUG_TRACE(">> \n");
 
@@ -2087,7 +2105,7 @@ static int ipw_load_ucode(struct ipw_priv *priv, u8 * data,
 	if (rc < 0)
 		return rc;
 
-//	spin_lock_irqsave(&priv->lock, flags);
+//      spin_lock_irqsave(&priv->lock, flags);
 
 	for (addr = CX2_SHARED_LOWER_BOUND;
 	     addr < CX2_REGISTER_DOMAIN1_END; addr += 4) {
@@ -2099,7 +2117,7 @@ static int ipw_load_ucode(struct ipw_priv *priv, u8 * data,
 	/* destroy DMA queues */
 	/* reset sequence */
 
-	ipw_write_reg32(priv, CX2_MEM_HALT_AND_RESET ,CX2_BIT_HALT_RESET_ON);
+	ipw_write_reg32(priv, CX2_MEM_HALT_AND_RESET, CX2_BIT_HALT_RESET_ON);
 	ipw_arc_release(priv);
 	ipw_write_reg32(priv, CX2_MEM_HALT_AND_RESET, CX2_BIT_HALT_RESET_OFF);
 	mdelay(1);
@@ -2128,13 +2146,11 @@ static int ipw_load_ucode(struct ipw_priv *priv, u8 * data,
 	for (i = 0; i < len / 2; i++)
 		ipw_write_reg16(priv, CX2_BASEBAND_CONTROL_STORE, image[i]);
 
-
 	/* enable DINO */
 	ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, 0);
-	ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS,
-		       DINO_ENABLE_SYSTEM );
+	ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, DINO_ENABLE_SYSTEM);
 
-	/* this is where the igx / win driver deveates from the VAP driver.*/
+	/* this is where the igx / win driver deveates from the VAP driver. */
 
 	/* wait for alive response */
 	for (i = 0; i < 100; i++) {
@@ -2151,25 +2167,24 @@ static int ipw_load_ucode(struct ipw_priv *priv, u8 * data,
 
 		for (i = 0; i < ARRAY_SIZE(response_buffer); i++)
 			response_buffer[i] =
-				ipw_read_reg32(priv,
-					       CX2_BASEBAND_RX_FIFO_READ);
+			    ipw_read_reg32(priv, CX2_BASEBAND_RX_FIFO_READ);
 		memcpy(&priv->dino_alive, response_buffer,
 		       sizeof(priv->dino_alive));
 		if (priv->dino_alive.alive_command == 1
 		    && priv->dino_alive.ucode_valid == 1) {
 			rc = 0;
-			IPW_DEBUG_INFO(
-				"Microcode OK, rev. %d (0x%x) dev. %d (0x%x) "
-				"of %02d/%02d/%02d %02d:%02d\n",
-				priv->dino_alive.software_revision,
-				priv->dino_alive.software_revision,
-				priv->dino_alive.device_identifier,
-				priv->dino_alive.device_identifier,
-				priv->dino_alive.time_stamp[0],
-				priv->dino_alive.time_stamp[1],
-				priv->dino_alive.time_stamp[2],
-				priv->dino_alive.time_stamp[3],
-				priv->dino_alive.time_stamp[4]);
+			IPW_DEBUG_INFO
+			    ("Microcode OK, rev. %d (0x%x) dev. %d (0x%x) "
+			     "of %02d/%02d/%02d %02d:%02d\n",
+			     priv->dino_alive.software_revision,
+			     priv->dino_alive.software_revision,
+			     priv->dino_alive.device_identifier,
+			     priv->dino_alive.device_identifier,
+			     priv->dino_alive.time_stamp[0],
+			     priv->dino_alive.time_stamp[1],
+			     priv->dino_alive.time_stamp[2],
+			     priv->dino_alive.time_stamp[3],
+			     priv->dino_alive.time_stamp[4]);
 		} else {
 			IPW_DEBUG_INFO("Microcode is not alive\n");
 			rc = -EINVAL;
@@ -2183,13 +2198,12 @@ static int ipw_load_ucode(struct ipw_priv *priv, u8 * data,
 	   firmware have problem getting alive resp. */
 	ipw_write_reg8(priv, CX2_BASEBAND_CONTROL_STATUS, 0);
 
-//	spin_unlock_irqrestore(&priv->lock, flags);
+//      spin_unlock_irqrestore(&priv->lock, flags);
 
 	return rc;
 }
 
-static int ipw_load_firmware(struct ipw_priv *priv, u8 * data,
-			     size_t len)
+static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len)
 {
 	int rc = -1;
 	int offset = 0;
@@ -2231,7 +2245,7 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data,
 		offset += chunk->length;
 	} while (offset < len);
 
-	/* Run the DMA and wait for the answer*/
+	/* Run the DMA and wait for the answer */
 	rc = ipw_fw_dma_kick(priv);
 	if (rc) {
 		IPW_ERROR("dmaKick Failed\n");
@@ -2243,8 +2257,8 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data,
 		IPW_ERROR("dmaWaitSync Failed\n");
 		goto out;
 	}
- out:
-	pci_free_consistent( priv->pci_dev, len, shared_virt, shared_phys);
+      out:
+	pci_free_consistent(priv->pci_dev, len, shared_virt, shared_phys);
 	return rc;
 }
 
@@ -2253,7 +2267,7 @@ static int ipw_stop_nic(struct ipw_priv *priv)
 {
 	int rc = 0;
 
-	/* stop*/
+	/* stop */
 	ipw_write32(priv, CX2_RESET_REG, CX2_RESET_REG_STOP_MASTER);
 
 	rc = ipw_poll_bit(priv, CX2_RESET_REG,
@@ -2272,14 +2286,15 @@ static void ipw_start_nic(struct ipw_priv *priv)
 {
 	IPW_DEBUG_TRACE(">>\n");
 
-	/* prvHwStartNic  release ARC*/
+	/* prvHwStartNic  release ARC */
 	ipw_clear_bit(priv, CX2_RESET_REG,
 		      CX2_RESET_REG_MASTER_DISABLED |
 		      CX2_RESET_REG_STOP_MASTER |
 		      CBD_RESET_REG_PRINCETON_RESET);
 
 	/* enable power management */
-	ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY);
+	ipw_set_bit(priv, CX2_GP_CNTRL_RW,
+		    CX2_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY);
 
 	IPW_DEBUG_TRACE("<<\n");
 }
@@ -2295,12 +2310,13 @@ static int ipw_init_nic(struct ipw_priv *priv)
 	ipw_set_bit(priv, CX2_GP_CNTRL_RW, CX2_GP_CNTRL_BIT_INIT_DONE);
 
 	/* low-level PLL activation */
-	ipw_write32(priv, CX2_READ_INT_REGISTER,  CX2_BIT_INT_HOST_SRAM_READ_INT_REGISTER);
+	ipw_write32(priv, CX2_READ_INT_REGISTER,
+		    CX2_BIT_INT_HOST_SRAM_READ_INT_REGISTER);
 
 	/* wait for clock stabilization */
 	rc = ipw_poll_bit(priv, CX2_GP_CNTRL_RW,
 			  CX2_GP_CNTRL_BIT_CLOCK_READY, 250);
-	if (rc < 0 )
+	if (rc < 0)
 		IPW_DEBUG_INFO("FAILED wait for clock stablization\n");
 
 	/* assert SW reset */
@@ -2315,7 +2331,6 @@ static int ipw_init_nic(struct ipw_priv *priv)
 	return 0;
 }
 
-
 /* Call this function from process context, it will sleep in request_firmware.
  * Probe is an ok place to call this from.
  */
@@ -2383,8 +2398,7 @@ static inline void ipw_rx_queue_reset(struct ipw_priv *priv,
 		 * to an SKB, so we need to unmap and free potential storage */
 		if (rxq->pool[i].skb != NULL) {
 			pci_unmap_single(priv->pci_dev, rxq->pool[i].dma_addr,
-					 CX2_RX_BUF_SIZE,
-					 PCI_DMA_FROMDEVICE);
+					 CX2_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
 			dev_kfree_skb(rxq->pool[i].skb);
 		}
 		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
@@ -2438,12 +2452,12 @@ static int ipw_load(struct ipw_priv *priv)
 			if (rc)
 				goto error;
 
-			rc = ipw_get_fw(priv, &firmware, IPW_FW_NAME("sniffer"));
+			rc = ipw_get_fw(priv, &firmware,
+					IPW_FW_NAME("sniffer"));
 			break;
 #endif
 		case IW_MODE_INFRA:
-			rc = ipw_get_fw(priv, &ucode,
-					IPW_FW_NAME("bss_ucode"));
+			rc = ipw_get_fw(priv, &ucode, IPW_FW_NAME("bss_ucode"));
 			if (rc)
 				goto error;
 
@@ -2471,7 +2485,7 @@ static int ipw_load(struct ipw_priv *priv)
 		goto error;
 	}
 
- retry:
+      retry:
 	/* Ensure interrupts are disabled */
 	ipw_write32(priv, CX2_INTA_MASK_R, ~CX2_INTA_MASK_ALL);
 	priv->status &= ~STATUS_INT_ENABLED;
@@ -2528,7 +2542,7 @@ static int ipw_load(struct ipw_priv *priv)
 	rc = ipw_load_firmware(priv, firmware->data +
 			       sizeof(struct fw_header),
 			       firmware->size - sizeof(struct fw_header));
-	if (rc < 0 ) {
+	if (rc < 0) {
 		IPW_ERROR("Unable to load firmware\n");
 		goto error;
 	}
@@ -2593,7 +2607,7 @@ static int ipw_load(struct ipw_priv *priv)
 #endif
 	return 0;
 
- error:
+      error:
 	if (priv->rxq) {
 		ipw_rx_queue_free(priv, priv->rxq);
 		priv->rxq = NULL;
@@ -2671,8 +2685,7 @@ static inline int ipw_queue_inc_wrap(int index, int n_bd)
  *                         (not offset within BAR, full address)
  */
 static void ipw_queue_init(struct ipw_priv *priv, struct clx2_queue *q,
-			   int count, u32 read, u32 write,
-			   u32 base, u32 size)
+			   int count, u32 read, u32 write, u32 base, u32 size)
 {
 	q->n_bd = count;
 
@@ -2698,8 +2711,7 @@ static void ipw_queue_init(struct ipw_priv *priv, struct clx2_queue *q,
 
 static int ipw_queue_tx_init(struct ipw_priv *priv,
 			     struct clx2_tx_queue *q,
-			     int count, u32 read, u32 write,
-			     u32 base, u32 size)
+			     int count, u32 read, u32 write, u32 base, u32 size)
 {
 	struct pci_dev *dev = priv->pci_dev;
 
@@ -2709,10 +2721,11 @@ static int ipw_queue_tx_init(struct ipw_priv *priv,
 		return -ENOMEM;
 	}
 
-	q->bd = pci_alloc_consistent(dev,sizeof(q->bd[0])*count, &q->q.dma_addr);
+	q->bd =
+	    pci_alloc_consistent(dev, sizeof(q->bd[0]) * count, &q->q.dma_addr);
 	if (!q->bd) {
 		IPW_ERROR("pci_alloc_consistent(%zd) failed\n",
-				sizeof(q->bd[0]) * count);
+			  sizeof(q->bd[0]) * count);
 		kfree(q->txb);
 		q->txb = NULL;
 		return -ENOMEM;
@@ -2768,8 +2781,7 @@ static void ipw_queue_tx_free_tfd(struct ipw_priv *priv,
  * @param dev
  * @param q
  */
-static void ipw_queue_tx_free(struct ipw_priv *priv,
-			    struct clx2_tx_queue *txq)
+static void ipw_queue_tx_free(struct ipw_priv *priv, struct clx2_tx_queue *txq)
 {
 	struct clx2_queue *q = &txq->q;
 	struct pci_dev *dev = priv->pci_dev;
@@ -2784,7 +2796,7 @@ static void ipw_queue_tx_free(struct ipw_priv *priv,
 	}
 
 	/* free buffers belonging to queue itself */
-	pci_free_consistent(dev, sizeof(txq->bd[0])*q->n_bd, txq->bd,
+	pci_free_consistent(dev, sizeof(txq->bd[0]) * q->n_bd, txq->bd,
 			    q->dma_addr);
 	kfree(txq->txb);
 
@@ -2792,7 +2804,6 @@ static void ipw_queue_tx_free(struct ipw_priv *priv,
 	memset(txq, 0, sizeof(*txq));
 }
 
-
 /**
  * Destroy all DMA queues and structures
  *
@@ -2825,7 +2836,7 @@ static void inline __maybe_wake_tx(struct ipw_priv *priv)
 
 }
 
-static inline void ipw_create_bssid(struct ipw_priv *priv, u8 *bssid)
+static inline void ipw_create_bssid(struct ipw_priv *priv, u8 * bssid)
 {
 	/* First 3 bytes are manufacturer */
 	bssid[0] = priv->mac_addr[0];
@@ -2833,13 +2844,13 @@ static inline void ipw_create_bssid(struct ipw_priv *priv, u8 *bssid)
 	bssid[2] = priv->mac_addr[2];
 
 	/* Last bytes are random */
-        get_random_bytes(&bssid[3], ETH_ALEN-3);
+	get_random_bytes(&bssid[3], ETH_ALEN - 3);
 
-        bssid[0] &= 0xfe;       /* clear multicast bit */
-        bssid[0] |= 0x02;       /* set local assignment bit (IEEE802) */
+	bssid[0] &= 0xfe;	/* clear multicast bit */
+	bssid[0] |= 0x02;	/* set local assignment bit (IEEE802) */
 }
 
-static inline u8 ipw_add_station(struct ipw_priv *priv, u8 *bssid)
+static inline u8 ipw_add_station(struct ipw_priv *priv, u8 * bssid)
 {
 	struct ipw_station_entry entry;
 	int i;
@@ -2866,14 +2877,13 @@ static inline u8 ipw_add_station(struct ipw_priv *priv, u8 *bssid)
 	memcpy(entry.mac_addr, bssid, ETH_ALEN);
 	memcpy(priv->stations[i], bssid, ETH_ALEN);
 	ipw_write_direct(priv, IPW_STATION_TABLE_LOWER + i * sizeof(entry),
-			 &entry,
-			 sizeof(entry));
+			 &entry, sizeof(entry));
 	priv->num_stations++;
 
 	return i;
 }
 
-static inline u8 ipw_find_station(struct ipw_priv *priv, u8 *bssid)
+static inline u8 ipw_find_station(struct ipw_priv *priv, u8 * bssid)
 {
 	int i;
 
@@ -2944,26 +2954,34 @@ static const struct ipw_status_code ipw_status_codes[] = {
 	 "association exists"},
 	{0x0C, "Association denied due to reason outside the scope of this "
 	 "standard"},
-	{0x0D, "Responding station does not support the specified authentication "
+	{0x0D,
+	 "Responding station does not support the specified authentication "
 	 "algorithm"},
-	{0x0E, "Received an Authentication frame with authentication sequence "
+	{0x0E,
+	 "Received an Authentication frame with authentication sequence "
 	 "transaction sequence number out of expected sequence"},
 	{0x0F, "Authentication rejected because of challenge failure"},
 	{0x10, "Authentication rejected due to timeout waiting for next "
 	 "frame in sequence"},
 	{0x11, "Association denied because AP is unable to handle additional "
 	 "associated stations"},
-	{0x12, "Association denied due to requesting station not supporting all "
+	{0x12,
+	 "Association denied due to requesting station not supporting all "
 	 "of the datarates in the BSSBasicServiceSet Parameter"},
-	{0x13, "Association denied due to requesting station not supporting "
+	{0x13,
+	 "Association denied due to requesting station not supporting "
 	 "short preamble operation"},
-	{0x14, "Association denied due to requesting station not supporting "
+	{0x14,
+	 "Association denied due to requesting station not supporting "
 	 "PBCC encoding"},
-	{0x15, "Association denied due to requesting station not supporting "
+	{0x15,
+	 "Association denied due to requesting station not supporting "
 	 "channel agility"},
-	{0x19, "Association denied due to requesting station not supporting "
+	{0x19,
+	 "Association denied due to requesting station not supporting "
 	 "short slot operation"},
-	{0x1A, "Association denied due to requesting station not supporting "
+	{0x1A,
+	 "Association denied due to requesting station not supporting "
 	 "DSSS-OFDM operation"},
 	{0x28, "Invalid Information Element"},
 	{0x29, "Group Cipher is not valid"},
@@ -3043,7 +3061,6 @@ static void ipw_reset_stats(struct ipw_priv *priv)
 
 }
 
-
 static inline u32 ipw_get_max_rate(struct ipw_priv *priv)
 {
 	u32 i = 0x80000000;
@@ -3056,20 +3073,21 @@ static inline u32 ipw_get_max_rate(struct ipw_priv *priv)
 	/* TODO: Verify that the rate is supported by the current rates
 	 * list. */
 
-	while (i && !(mask & i)) i >>= 1;
+	while (i && !(mask & i))
+		i >>= 1;
 	switch (i) {
-	case IEEE80211_CCK_RATE_1MB_MASK: return 1000000;
-	case IEEE80211_CCK_RATE_2MB_MASK: return 2000000;
-	case IEEE80211_CCK_RATE_5MB_MASK: return 5500000;
-	case IEEE80211_OFDM_RATE_6MB_MASK: return 6000000;
-	case IEEE80211_OFDM_RATE_9MB_MASK: return 9000000;
-	case IEEE80211_CCK_RATE_11MB_MASK: return 11000000;
-	case IEEE80211_OFDM_RATE_12MB_MASK: return 12000000;
-	case IEEE80211_OFDM_RATE_18MB_MASK: return 18000000;
-	case IEEE80211_OFDM_RATE_24MB_MASK: return 24000000;
-	case IEEE80211_OFDM_RATE_36MB_MASK: return 36000000;
-	case IEEE80211_OFDM_RATE_48MB_MASK: return 48000000;
-	case IEEE80211_OFDM_RATE_54MB_MASK: return 54000000;
+	case IEEE80211_CCK_RATE_1MB_MASK:	return 1000000;
+	case IEEE80211_CCK_RATE_2MB_MASK:	return 2000000;
+	case IEEE80211_CCK_RATE_5MB_MASK:	return 5500000;
+	case IEEE80211_OFDM_RATE_6MB_MASK:	return 6000000;
+	case IEEE80211_OFDM_RATE_9MB_MASK:	return 9000000;
+	case IEEE80211_CCK_RATE_11MB_MASK:	return 11000000;
+	case IEEE80211_OFDM_RATE_12MB_MASK:	return 12000000;
+	case IEEE80211_OFDM_RATE_18MB_MASK:	return 18000000;
+	case IEEE80211_OFDM_RATE_24MB_MASK:	return 24000000;
+	case IEEE80211_OFDM_RATE_36MB_MASK:	return 36000000;
+	case IEEE80211_OFDM_RATE_48MB_MASK:	return 48000000;
+	case IEEE80211_OFDM_RATE_54MB_MASK:	return 54000000;
 	}
 
 	if (priv->ieee->mode == IEEE_B)
@@ -3097,18 +3115,18 @@ static u32 ipw_get_current_rate(struct ipw_priv *priv)
 		return ipw_get_max_rate(priv);
 
 	switch (rate) {
-	case IPW_TX_RATE_1MB:  return  1000000;
-	case IPW_TX_RATE_2MB:  return  2000000;
-	case IPW_TX_RATE_5MB:  return  5500000;
-	case IPW_TX_RATE_6MB:  return  6000000;
-	case IPW_TX_RATE_9MB:  return  9000000;
-	case IPW_TX_RATE_11MB: return 11000000;
-	case IPW_TX_RATE_12MB: return 12000000;
-	case IPW_TX_RATE_18MB: return 18000000;
-	case IPW_TX_RATE_24MB: return 24000000;
-	case IPW_TX_RATE_36MB: return 36000000;
-	case IPW_TX_RATE_48MB: return 48000000;
-	case IPW_TX_RATE_54MB: return 54000000;
+	case IPW_TX_RATE_1MB:	return 1000000;
+	case IPW_TX_RATE_2MB:	return 2000000;
+	case IPW_TX_RATE_5MB:	return 5500000;
+	case IPW_TX_RATE_6MB:	return 6000000;
+	case IPW_TX_RATE_9MB:	return 9000000;
+	case IPW_TX_RATE_11MB:	return 11000000;
+	case IPW_TX_RATE_12MB:	return 12000000;
+	case IPW_TX_RATE_18MB:	return 18000000;
+	case IPW_TX_RATE_24MB:	return 24000000;
+	case IPW_TX_RATE_36MB:	return 36000000;
+	case IPW_TX_RATE_48MB:	return 48000000;
+	case IPW_TX_RATE_54MB:	return 54000000;
 	}
 
 	return 0;
@@ -3126,7 +3144,7 @@ static void ipw_gather_stats(struct ipw_priv *priv)
 	u32 len = sizeof(u32);
 	s16 rssi;
 	u32 beacon_quality, signal_quality, tx_quality, rx_quality,
-		rate_quality;
+	    rate_quality;
 
 	if (!(priv->status & STATUS_ASSOCIATED)) {
 		priv->quality = 0;
@@ -3136,13 +3154,12 @@ static void ipw_gather_stats(struct ipw_priv *priv)
 	/* Update the statistics */
 	ipw_get_ordinal(priv, IPW_ORD_STAT_MISSED_BEACONS,
 			&priv->missed_beacons, &len);
-	missed_beacons_delta = priv->missed_beacons -
-		priv->last_missed_beacons;
+	missed_beacons_delta = priv->missed_beacons - priv->last_missed_beacons;
 	priv->last_missed_beacons = priv->missed_beacons;
 	if (priv->assoc_request.beacon_interval) {
 		missed_beacons_percent = missed_beacons_delta *
-			(HZ * priv->assoc_request.beacon_interval) /
-			(IPW_STATS_INTERVAL * 10);
+		    (HZ * priv->assoc_request.beacon_interval) /
+		    (IPW_STATS_INTERVAL * 10);
 	} else {
 		missed_beacons_percent = 0;
 	}
@@ -3179,28 +3196,26 @@ static void ipw_gather_stats(struct ipw_priv *priv)
 		beacon_quality = 0;
 	else
 		beacon_quality = (beacon_quality - BEACON_THRESHOLD) * 100 /
-			(100 - BEACON_THRESHOLD);
+		    (100 - BEACON_THRESHOLD);
 	IPW_DEBUG_STATS("Missed beacon: %3d%% (%d%%)\n",
 			beacon_quality, missed_beacons_percent);
 
 	priv->last_rate = ipw_get_current_rate(priv);
-	rate_quality =  priv->last_rate * 40 / priv->last_rate + 60;
+	rate_quality = priv->last_rate * 40 / priv->last_rate + 60;
 	IPW_DEBUG_STATS("Rate quality : %3d%% (%dMbs)\n",
 			rate_quality, priv->last_rate / 1000000);
 
-	if (rx_packets_delta > 100 &&
-	    rx_packets_delta + rx_err_delta)
+	if (rx_packets_delta > 100 && rx_packets_delta + rx_err_delta)
 		rx_quality = 100 - (rx_err_delta * 100) /
-			(rx_packets_delta + rx_err_delta);
+		    (rx_packets_delta + rx_err_delta);
 	else
 		rx_quality = 100;
 	IPW_DEBUG_STATS("Rx quality   : %3d%% (%u errors, %u packets)\n",
 			rx_quality, rx_err_delta, rx_packets_delta);
 
-	if (tx_packets_delta > 100 &&
-	    tx_packets_delta + tx_failures_delta)
+	if (tx_packets_delta > 100 && tx_packets_delta + tx_failures_delta)
 		tx_quality = 100 - (tx_failures_delta * 100) /
-			(tx_packets_delta + tx_failures_delta);
+		    (tx_packets_delta + tx_failures_delta);
 	else
 		tx_quality = 100;
 	IPW_DEBUG_STATS("Tx quality   : %3d%% (%u errors, %u packets)\n",
@@ -3213,7 +3228,7 @@ static void ipw_gather_stats(struct ipw_priv *priv)
 		signal_quality = 0;
 	else
 		signal_quality = (rssi - WORST_RSSI) * 100 /
-			(PERFECT_RSSI - WORST_RSSI);
+		    (PERFECT_RSSI - WORST_RSSI);
 	IPW_DEBUG_STATS("Signal level : %3d%% (%d dBm)\n",
 			signal_quality, rssi);
 
@@ -3221,25 +3236,20 @@ static void ipw_gather_stats(struct ipw_priv *priv)
 		      min(rate_quality,
 			  min(tx_quality, min(rx_quality, signal_quality))));
 	if (quality == beacon_quality)
-		IPW_DEBUG_STATS(
-			"Quality (%d%%): Clamped to missed beacons.\n",
-			quality);
+		IPW_DEBUG_STATS("Quality (%d%%): Clamped to missed beacons.\n",
+				quality);
 	if (quality == rate_quality)
-		IPW_DEBUG_STATS(
-			"Quality (%d%%): Clamped to rate quality.\n",
-			quality);
+		IPW_DEBUG_STATS("Quality (%d%%): Clamped to rate quality.\n",
+				quality);
 	if (quality == tx_quality)
-		IPW_DEBUG_STATS(
-			"Quality (%d%%): Clamped to Tx quality.\n",
-			quality);
+		IPW_DEBUG_STATS("Quality (%d%%): Clamped to Tx quality.\n",
+				quality);
 	if (quality == rx_quality)
-		IPW_DEBUG_STATS(
-			"Quality (%d%%): Clamped to Rx quality.\n",
-			quality);
+		IPW_DEBUG_STATS("Quality (%d%%): Clamped to Rx quality.\n",
+				quality);
 	if (quality == signal_quality)
-		IPW_DEBUG_STATS(
-			"Quality (%d%%): Clamped to signal quality.\n",
-			quality);
+		IPW_DEBUG_STATS("Quality (%d%%): Clamped to signal quality.\n",
+				quality);
 
 	priv->quality = quality;
 
@@ -3251,402 +3261,454 @@ static void ipw_gather_stats(struct ipw_priv *priv)
  * Handle host notification packet.
  * Called from interrupt routine
  */
-static inline void ipw_rx_notification(struct ipw_priv* priv,
+static inline void ipw_rx_notification(struct ipw_priv *priv,
 				       struct ipw_rx_notification *notif)
 {
-	IPW_DEBUG_NOTIF("type = %i (%d bytes)\n",
-			notif->subtype, notif->size);
+	IPW_DEBUG_NOTIF("type = %i (%d bytes)\n", notif->subtype, notif->size);
 
 	switch (notif->subtype) {
-	case HOST_NOTIFICATION_STATUS_ASSOCIATED: {
-		struct notif_association *assoc = &notif->u.assoc;
-
-		switch (assoc->state) {
-		case CMAS_ASSOCIATED: {
-			IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE | IPW_DL_ASSOC,
-				  "associated: '%s' " MAC_FMT " \n",
-				  escape_essid(priv->essid, priv->essid_len),
-				  MAC_ARG(priv->bssid));
-
-			switch (priv->ieee->iw_mode) {
-			case IW_MODE_INFRA:
-				memcpy(priv->ieee->bssid, priv->bssid,
-				       ETH_ALEN);
-				break;
-
-			case IW_MODE_ADHOC:
-				memcpy(priv->ieee->bssid, priv->bssid,
-				       ETH_ALEN);
-
-				/* clear out the station table */
-				priv->num_stations = 0;
-
-				IPW_DEBUG_ASSOC("queueing adhoc check\n");
-				queue_delayed_work(priv->workqueue,
-						   &priv->adhoc_check,
-						   priv->assoc_request.beacon_interval);
-				break;
-			}
-
-			priv->status &= ~STATUS_ASSOCIATING;
-			priv->status |= STATUS_ASSOCIATED;
-
-			netif_carrier_on(priv->net_dev);
-			if (netif_queue_stopped(priv->net_dev)) {
-				IPW_DEBUG_NOTIF("waking queue\n");
-				netif_wake_queue(priv->net_dev);
-			} else {
-				IPW_DEBUG_NOTIF("starting queue\n");
-				netif_start_queue(priv->net_dev);
-			}
-
-			ipw_reset_stats(priv);
-			/* Ensure the rate is updated immediately */
-			priv->last_rate = ipw_get_current_rate(priv);
-			schedule_work(&priv->gather_stats);
-			notify_wx_assoc_event(priv);
+	case HOST_NOTIFICATION_STATUS_ASSOCIATED:{
+			struct notif_association *assoc = &notif->u.assoc;
+
+			switch (assoc->state) {
+			case CMAS_ASSOCIATED:{
+					IPW_DEBUG(IPW_DL_NOTIF | IPW_DL_STATE |
+						  IPW_DL_ASSOC,
+						  "associated: '%s' " MAC_FMT
+						  " \n",
+						  escape_essid(priv->essid,
+							       priv->essid_len),
+						  MAC_ARG(priv->bssid));
+
+					switch (priv->ieee->iw_mode) {
+					case IW_MODE_INFRA:
+						memcpy(priv->ieee->bssid,
+