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2014-04-22drm/radeon: properly unregister hwmon interface (v2)Alex Deucher
Need to properly unregister the hwmon device on driver unload. v2: minor clean up bug: https://bugzilla.kernel.org/show_bug.cgi?id=73931 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2014-04-22pinctrl: tegra: remove fsafe from data tablesStephen Warren
The fsafe value in the pingroup data tables is only used to implement tegra_pinctrl_disable(). The only reason this function is called is when dynamically switching between pinmux states, i.e. when disabling the old state before programming the new state. It's simpler to have the new target state define the expected value of each pin (and all current DTs do that). This also gives more flexibility, since it allows individual boards explicit control over the "inactive" mux function for each pin, rather than requiring it to be an SoC-specific value. Assuming this, we can get rid of the fsafe value from the driver completely, thus saving some more space in the driver tables. While re-writing the content of tegra124_pingroups[], fix the indentation to use a TAB instead of spaces. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: tegra: remove redundant data table fieldsStephen Warren
Any SoC which supports the einput, odrain, lock, ioreset, or rcv_sel options has the relevant HW register fields in the same register as the mux function selection. Similarly, the drvtype option is always in the drive register, if it is supported at all. Hence, we don't need to have struct *_reg fields in the pin group table to define which register and bank to use for those options. Delete this to save space in the driver's data tables. However, many of those options are not supported on all SoCs, or not supported on some pingroups. We need a way to detect when they are supported. Previously, this was indicated by setting the struct *_reg field to -1. With the struct *_reg fields removed, we use the struct *_bit fields for this purpose instead. The struct *_bit fields need to be expanded from 5 to 6 bits in order to store a value outside the valid HW bit range of 0..31. Even without removing the struct *_reg fields, we still need to add code to validate the struct *_bit fields, since some struct *_bit fields were already being set to -1, without an option-specific struct *_reg field to "guard" them. In other words, before this change, the pinmux driver might allow some unsupported options to be written to HW. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22drm: Fix error handling in drm_master_createDaniel Vetter
We need to check whether drm_ht_create succeed and clean up if not. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22pinctrl: pfc: r8a7790: add mux data for IIC(B) coresWolfram Sang
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22drm/i2c/tda998x: Fix signed overflow issueDaniel Vetter
This is C standard hair-splitting, but afaict - sum will be promoted to signed int in computation since uint8_t fits - signed overflow is undefined. No we need to add up an awful lot of bytes to actually make it overflow. But I guess the real risk is gcc spotting this and going bananas. Fix this by simply using unsigned in to force all computations to use the well-defined unsigned behaviour. Spotted by coverity. v2: Simplify the entire computation as suggested by Jean. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Rob Clark <robdclark@gmail.com> Cc: Jean-Francois Moine <moinejf@free.fr> Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/bochs: Remove unecessary NULL check in gem_freeDaniel Vetter
The ->gem_free_object never gets called with a NULL pointer, the check is redundant. Also checking after the upcast allows compilers to elide it anyway. Noticed while chasing coverity reports, somehow this one here was not flagged. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/bochs: Remove unnecessary NULL check in bo_unrefDaniel Vetter
ttm_bo_unref unconditionally calls kref_put on it's argument, so the thing can't be NULL without already causing Oopses. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/udl: Initialize ret in udl_driver_loadDaniel Vetter
We need to set it to -ENODEV when we don't recognize the device. Otherwise we return/print stack garbage. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/via: Remove unecessary NULL checkDaniel Vetter
The context_dtor callback is only called once we've successfully loaded the driver, which means dev->dev_private is set up. The check is hence pointless. Also dev->dev_private is deref already above, so compilers are free to elide it anyway. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/ast: Remove unecessary NULL check in gem_freeDaniel Vetter
The ->gem_free_object never gets called with a NULL pointer, the check is redundant. Also checking after the upcast allows compilers to elide it anyway. Spotted by coverity. v2: Fix patch subject. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/ast: Remove unnecessary NULL check in bo_unrefDaniel Vetter
ttm_bo_unref unconditionally calls kref_put on it's argument, so the thing can't be NULL without already causing Oopses. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/cirrus: Remove unecessary NULL check in gem_freeDaniel Vetter
The ->gem_free_object never gets called with a NULL pointer, the check is redundant. Also checking after the upcast allows compilers to elide it anyway. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/cirrus: Remove unnecessary NULL check in bo_unrefDaniel Vetter
ttm_bo_unref unconditionally calls kref_put on it's argument, so the thing can't be NULL without already causing Oopses. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/mgag200: Remove unecessary NULL check in gem_freeDaniel Vetter
The ->gem_free_object never gets called with a NULL pointer, the check is redundant. Also checking after the upcast allows compilers to elide it anyway. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22drm/mgag200: Remove unecessary NULL check in bo_unrefDaniel Vetter
ttm_bo_unref unconditionally calls kref_put on it's argument, so the thing can't be NULL without already causing Oopses. Spotted by coverity. Reviewed-by: David Herrmann <dh.herrmann@gmail.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2014-04-22pinctrl: pfc: r8a7790: add i2c0 muxingWolfram Sang
Add the muxing for the last missing i2c rcar core. Fix the sorting for SH_PFC_PIN_NAMED while we are here. Signed-off-by: Wolfram Sang <wsa@sang-engineering.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: pinctrl-imx: Print the mux_mode field in hex formatFabio Estevam
With debug enabled we get better readability dumps of the mux_mode register if we use hexadecimal format instead: imx6sl-pinctrl 20e0000.iomuxc: MX6SL_PAD_FEC_REF_CLK: 0x10 0x0001b0a8 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22sh-pfc: r8a7791: Add Audio pin supportKuninori Morimoto
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22sh-pfc: r8a7791: Add SSI pin supportKuninori Morimoto
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl/TB10x: Fix signedness bugChristian Ruppert
In the TB10x pin database, a port index of -1 is used to indicate unmuxed GPIO pin groups. This bug fixes a 'cast to unsigned' bug of this value. Thanks to Dan Carpenter for highlighting this. CC: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: sunxi: fix typo in module author addressAntoine Ténart
According to the MODULE_AUTHOR() comments, the author name should be "Name <email>" or just "Name". Add the missing '>'. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22drm/radeon: fix count in cik_sdma_ring_test()Alex Deucher
Should be 5 rather than 4. Noticed-by: Mathias Fröhlich <Mathias.Froehlich@gmx.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Christian König <christian.koenig@amd.com>
2014-04-22pinctrl: allows not to define the get_group_pins operationAntoine Ténart
When using a group only pinctrl driver, which does not have any information on the pins it is useless to define a get_group_pins always returning an empty list of pins. When not using get_group_pin[1], a driver must implement it so pins = NULL and num_pins = 0. This patch makes it the default behaviour if not defined in the pinctrl driver when used in pinmux enable and disable funtions and in pinctrl_groups_show. It also adds a check in pinctrl_get_group_pins and return -EINVAL if not defined. This function is called in the gpiolib when adding when pingroup range. It cannot be used if no group is defined, so this seams reasonable. [1] get_group_pin(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins); Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22regmap: i2c: fallback to SMBus if the adapter does not support standard I2CBoris BREZILLON
Some I2C adapters are only compatible with the SMBus protocol and do not support standard I2C transfers. Fallback to SMBus transfers if we encounter such kind of adapters. The transfer type is chosen according to the val_bits field in the regmap config. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-04-22clocksource: sun5i: Add support for reset controllerMaxime Ripard
The Allwinner A31 that uses this timer has the timer IP asserted in reset. Add an optional reset property to the DT, and deassert the timer from reset if it's there. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-04-22pinctrl: sunxi: add reset control supportBoris BREZILLON
The A31 SoC define a reset line for the R_PIO block which needs to be deasserted. Try to retrieve a reset control and deassert if one was found. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: sunxi: define A31 R_PIO pin functionsBoris BREZILLON
The A31 SoC provides both PL and PM pio bank through the R_PIO block. These pins all support gpio function and can bbe assigned to system peripherals (like TWI, P2WI, JTAG, ...) Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: sunxi: support multiple pin controllerBoris BREZILLON
Add support for multiple pin controller instances. First remove the static definition of the sunxi gpio chip struct and fill the dynamically struct instead. Then define a new pin_base field in the sunxi_pinctrl_desc which will be used to specify the gpiochip base pin. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: sunxi: add PL and PM pin definitionsBoris BREZILLON
Define PL and PM pin macros. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: sunxi: disable clk when failing to probe pin controllerBoris BREZILLON
Disable the clk when failing to probe the pin controller device. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22pinctrl: sunxi: check clk_prepare_enable return valueBoris BREZILLON
Check the clk_prepare_enable return value to avoid false positive probe. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-22drm/i915: Allow user modes to exceed DVI 165MHz limitVille Syrjälä
In commit commit 6375b768a9850b6154478993e5fb566fa4614a9c Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Mon Mar 3 11:33:36 2014 +0200 drm/i915: Reject >165MHz modes w/ DVI monitors the driver started to filter out display modes which exceed the single-link DVI 165Mz dotclock limits when the monitor doesn't report itself as being HDMI compliant. The intent was to filter out all EDID derived modes that require dual-link DVI to operate since we don't support dual-link. However the patch went a bit too far and also causes the driver to reject such modes even when specified by the user. Normally we don't check the sink limitations when setting a mode from the user. This allows the user to specify any mode whether the sink reports to support it or not. This can be useful since often the sinks support more modes than they report in the EDID. So relax the checks a bit, and apply the single-link DVI dotclock limit only when filtering the mode list, and ignore the limit when setting a user specified mode. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=72961 Tested-by: Nicholas Vinson <nvinson@comcast.net> Cc: stable@vger.kernel.org [3.14] Reviewed-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2014-04-22KVM: s390/sclp: correctly set eca siif bitHeiko Carstens
Check if siif is available before setting. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Reviewed-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2014-04-22i40e/i40evf: Bump build versionsCatherine Sullivan
Bump i40e to version 0.3.43 and i40evf to version 0.9.21. Change-ID: Ice4c715731bfa1dfc12dd45418675a3ba6e08d57 Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22i40e: Tweak for-loop in i40e_ethtool.cCatherine Sullivan
Tweak a for-loop to make it easier to add conditional stats in the future. Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22clk: zynq: Leave debug clocks in bootup stateSoren Brinkmann
Make sure debug clocks stay enabled if the bootloader enabled them. Otherwise debug HW may crash due to bus-hangs caused by stopped clocks. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-04-22mmc: rtsx: add R1-no-CRC mmc command type handleMicky Ching
a27fbf2f067b0cd ("mmc: add ignorance case for CMD13 CRC error") produced a cmd.flags unhandled in realtek pci host driver. This will make MMC card fail to initialize, this patch is used to handle the new cmd.flags condition and MMC card can be used. Signed-off-by: Micky Ching <micky_ching@realsil.com.cn> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-04-22mmc: core: Invoke sdio func driver's PM callbacks from the sdio busUlf Hansson
The sdio func device is added to the driver model after the card device. This means the sdio func device will be suspend before the card device and thus resumed after. The consequence are the mmc core don't explicity need to protect itself from receiving sdio requests in suspended state. Instead that can be handled from the sdio bus, which is thus invokes the PM callbacks instead of old dummy function. In the case were the sdio func driver don't implement the PM callbacks the mmc core will in the early phase of system suspend, remove the card from the driver model and thus power off it. Cc: Aaron Lu <aaron.lu@intel.com> Cc: NeilBrown <neilb@suse.de> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Aaron Lu <aaron.lu@intel.com> Tested-by: xiaoming wang <xiaoming.wang@intel.com> Tested-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Chris Ball <chris@printf.net>
2014-04-22mmc: core: Use maximum timeout values in case TACC field is zeroStefan Wahren
When plugging a specific micro SD card at MMC socket of a custom i.MX28 board, we get the following kernel warning: WARNING: CPU: 0 PID: 30 at drivers/mmc/host/mxs-mmc.c:342 mxs_mmc_start_cmd+0x34c/0x378() Modules linked in: CPU: 0 PID: 30 Comm: kworker/u2:1 Not tainted 3.14.0-rc5 #8 Workqueue: kmmcd mmc_rescan [<c0015420>] (unwind_backtrace) from [<c0012cb0>] (show_stack+0x10/0x14) [<c0012cb0>] (show_stack) from [<c001daf8>] (warn_slowpath_common+0x6c/0x8c) [<c001daf8>] (warn_slowpath_common) from [<c001db34>] (warn_slowpath_null+0x1c/0x24) [<c001db34>] (warn_slowpath_null) from [<c0349478>] (mxs_mmc_start_cmd+0x34c/0x378) [<c0349478>] (mxs_mmc_start_cmd) from [<c0338fa0>] (mmc_start_request+0xc4/0xf4) [<c0338fa0>] (mmc_start_request) from [<c03390b4>] (mmc_wait_for_req+0x50/0x164) [<c03390b4>] (mmc_wait_for_req) from [<c03405b8>] (mmc_app_send_scr+0x158/0x1c8) [<c03405b8>] (mmc_app_send_scr) from [<c033ee1c>] (mmc_sd_setup_card+0x80/0x3c8) [<c033ee1c>] (mmc_sd_setup_card) from [<c033f788>] (mmc_sd_init_card+0x124/0x66c) [<c033f788>] (mmc_sd_init_card) from [<c033fd7c>] (mmc_attach_sd+0xac/0x174) [<c033fd7c>] (mmc_attach_sd) from [<c033a658>] (mmc_rescan+0x25c/0x2d8) [<c033a658>] (mmc_rescan) from [<c003597c>] (process_one_work+0x1b4/0x4ec) [<c003597c>] (process_one_work) from [<c0035de4>] (worker_thread+0x130/0x464) [<c0035de4>] (worker_thread) from [<c003c824>] (kthread+0xb4/0xd0) [<c003c824>] (kthread) from [<c000f420>] (ret_from_fork+0x14/0x34) The error is due to an invalid value in CSD register of a specific 2GB micro SD card. The CSD version of this card is 1.0 but the TACC field has the invalid value 0. cid:0000005553442020000000000000583f csd:00000032535a83bfedb7ffbf1680003f date:08/2005 erase_size:512 fwrev:0x0 hwrev:0x0 manfid:0x000000 name:USD oemid:0x0000 preferred_erase_size:4194304 scr:0225000000000000 serial:0x00000000 type:SD Since the kernel is making use of this TACC field to calculate the SD card timeout, an invalid value 0 leads to a warning at mxs_ns_to_ssp_ticks() and later the following misleading error message appears in a loop: mxs-mmc 80010000.ssp: card claims to support voltages below defined range mxs-mmc 80010000.ssp: no support for card's volts mmc0: error -22 whilst initialising MMC card This error is only found on this 2GB SD card on mxs platform. On x86 this card works without any problems. The following patch based on the work of Peter Chan and Otavio Salvador. It catches the case that the determined timeout is still 0 and sets it to a valid value. Successful tested on a i.MX28 board. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-04-22mmc: Convert to use ATTRIBUTE_GROUPSAxel Lin
Use new ATTRIBUTE_GROUPS macro to declare attribute groups. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-04-22mmc: Delay the card_event callback into the mmc_rescan workerMarkus Mayer
This change removes the callback from atomic context which it doesn't need to be in, and puts it in line with the debounced rescan. This code is based on these e-mail threads with Christian Daudt: https://lkml.org/lkml/2013/8/19/539 https://lkml.org/lkml/2014/3/19/79 Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
2014-04-22i40e: Cleanup if/else statementsCatherine Sullivan
Simplify some if/else statements in i40e_main.c Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22i40e: rework fdir setup and teardownShannon Nelson
Use the newer i40e_vsi_open() and i40e_vsi_close() in the FDIR VSI lifetime. This makes sure we're using standard methods for all the VSI open and close paths. This also fixes a memory leak of the FDIR queue buffer info structs across a reset. Change-ID: I1b60a1b08ab923afe4f49810c2c7844d850e19b9 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22i40e: use generic vsi_open to unquiesce vsiShannon Nelson
Use the new i40e_vsi_open() for waking VSIs back up in order to be sure all the standard actions happen. Change-ID: Ic3479410dd3079733f4951dcea69f101e69e77df Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22i40e: abstract the close path for better netdev vsisShannon Nelson
Abstract out the vsi close actions into a single function so they can be used correctly for both netdev and non-netdev based VSIs. Change-ID: I59e3d115fcb20e614a09477281b7787dd340d276 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22i40e: prep vsi_open logic for non-netdev casesShannon Nelson
Rearrange the "if netdev" logic slightly to get ready for handling non-netdev VSIs. Change-ID: Ia0bfe13d4c994a2351a3c31fe725b75caeb397ee Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Signed-off-by: Catherine Sullivan <catherine.sullivan@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22i40e/i40evf: update AdminQ APIShannon Nelson
Reflect recent changes in firmware: - remove storm control - simplify PHY link management values - add partition bandwidth configuration Change-ID: If266ed2f9a89ad176cf8a74aeaef68613af76bc8 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Acked-by: Greg Rose <gregory.v.rose@intel.com> Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2014-04-22Merge branch 'clockevents/cmt-mtu2-tmu-cleanups' into clockevents/3.16Daniel Lezcano
This patch set cleans up the Renesas CMT and TMU drivers in preparation for DT support. The first 35 patches are a bunch of necessary cleanups that reorganize the CMT and TMU drivers, their platform data, and the memory, interrupt and clock resources they expect. As a result the drivers accept a new platform data model close to the hardware with supports for all the timer channels using a single device. The next 13 patches (36/52 to 48/52) move all CMT and TMU platforms from the old to the new platform data model. Patches 49/52 to 52/52 then drop support for the old model and perform one more cleanup. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-04-22clocksource: efm32: use $vendor,$device scheme for compatible stringUwe Kleine-König
Wolfram Sang pointed out that "efm32,$device" is non-standard. So use the common scheme and prefix device with "efm32-". The old compatible string is left in place until arch/arm/boot/dts/efm32* is fixed. Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>