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2013-11-01drm/radeon/audio: break out of loops once we match connectorAlex Deucher
No need to continue with the loops once we've matched the appropriate connector. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE4.xAlex Deucher
The plain [EN|DIS]ABLE functions do the same thing and more and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/atom: don't call [EN|DIS]ABLE_OUTPUT on DCE3.xAlex Deucher
The plain [EN|DIS]ABLE functions do the same thing and more and aren't broken on some systems like [EN|DIS]ABLE_OUTPUT. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/si: tell dpm there is a display connectedAlex Deucher
On SI asics, the SMC will automatically force the performance level to the lowest level if there are no displays active. This prevents automatic performance scaling on PowerXpress systems or for offscreen rendering or compute when displays are disabled. Going forward, it would be best to dynamically change this, but for now leave scaling enabled. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=69395 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: implement blit copy callback for CIKAlex Deucher
Uses the CP ring rather than the DMA ring. Useful for debugging and benchmarking. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon/dpm: cleanup a type issue with rv6xx_clocks_per_unit()Dan Carpenter
The rv6xx_clocks_per_unit() function pretends it can set flags in a u64 bitfield but really because "1" is an int it doesn't work for more than 32 bits. The only caller truncates the high bits away anyway. I've just changed it to be a u32. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: plug in blit copy routine for SIAlex Deucher
Uses CP DMA packet just like previous asics. Useful for debugging and benchmarking. Uses same packet format as prior asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: enable hdmi audio by defaultAlex Deucher
Seems to be stable enough for the majority of users. It can be disabled on the fly via connector attributes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: add runtime PM support (v2)Dave Airlie
This hooks radeon up to the runtime PM system to enable dynamic power management for secondary GPUs in switchable and powerxpress laptops. v2: agd5f: clean up, add module parameter Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: convert to pmopsDave Airlie
This is a pre-requisite for runtime pm on powerxpress systems. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: add a connector property for ditherAlex Deucher
Allows you to enable dither in the display hardware when the monitor supports lower a lower bpc than the current framebuffer format. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/radeon: Add support for programming the FMT blocksAlex Deucher
The FMT blocks control how data is sent from the backend of the display pipe to to monitor. Proper set up of the FMT blocks are required for 30bpp formats. Additionally, dithering can be enabled on for better display with 18 and 24bpp displays. The exception is LVDS/eDP which atom takes care of in the SelectCRTC_Source table. For now just enable truncation until we test dithering more. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-01drm/msm/mdp4: page_flip cleanups/fixesRob Clark
There were a few potential problems with the original page_flip/vblank code in mdp4_crtc. 1) We need vblank irq for a couple things, both completing flips and updating cursor. We need to keep track of what work is pending so that (for example) a cursor update while we are still waiting for pageflip_cb (ie. pageflip requested from userspace, but still waiting for rendering to complete) would not prematurely trigger event to userspace. 2) A preclose -> pageflip-cancel should not cancel a pageflip that was requested on a different file (ie. non-master closing should not cancel a pending pageflip). With these fixes, we no longer have problems w/ cursor not updating and with occasional hangs with userspace waiting for a pageflip that had been cancelled (launching XBMC from gnome-shell overview mode was a good way to trigger this, but now works reliably). Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-11-01drm/msm: EBUSY status handling in msm_gem_fault()Rob Clark
Subsequent threads returning EBUSY from vm_insert_pfn() was not handled correctly. As a result concurrent access from new threads to mmapped data caused SIGBUS. See e79e0fe3 Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
2013-11-01drm/msm: rework inactive-workRob Clark
Re-arrange things a bit so that we can get work requested after a bo fence passes, like pageflip, done before retiring bo's. Without any sort of bo cache in userspace, some games can trigger hundred's of transient bo's, which can cause retire to take a long time (5-10ms). Obviously we want a bo cache.. but this cleanup will make things a bit easier for atomic as well and makes things a bit cleaner. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
2013-11-01drm/msm: add plane supportRob Clark
Enable using VG1 and VG2 for planes. Currently YUV/CSC or scaling is not enabled, but ARGB and xRGB blending is. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
2013-11-01drm/msm: resync generated headersRob Clark
resync to latest envytools db, fixes a typo: s/mpd4/mdp4/ Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
2013-11-01drm/msm: support render nodesRob Clark
Enable support for drm render nodes for msm by flagging the ioctls that are safe and only needed for rendering. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
2013-11-01drm/msm: prime supportRob Clark
Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
2013-10-31i915: fix compiler warningLinus Torvalds
The last i915 drm update brought with it this annoying warning drivers/gpu/drm/i915/intel_crt.c: In function ‘intel_crt_get_config’: drivers/gpu/drm/i915/intel_crt.c:110:21: warning: unused variable ‘dev’ [-Wunused-variable] struct drm_device *dev = encoder->base.dev; ^ introduced by commit 7195a50b5c7e ("drm/i915: Add HSW CRT output readout support"). Remove the offending pointless variable. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-10-31drm/i915: use the correct register when turning VDD offPaulo Zanoni
That explains why I was seeing 2 consecutive "Turning eDP VDD off" messages. Regression introduced by: commit bf13e81b904a37d94d83dd6c3b53a147719a3ead Author: Jani Nikula <jani.nikula@intel.com> Date: Fri Sep 6 07:40:05 2013 +0300 drm/i915: add support for per-pipe power sequencing on vlv Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-31drm/i915: add back checking for i915_disable_power_wellImre Deak
In commit 6efdf354ddb186c6604d1692075421e8d2c740e9 Author: Imre Deak <imre.deak@intel.com> Date: Wed Oct 16 17:25:52 2013 +0300 the check for i915_disable_power_well flag was removed by overlook, so add it back now. Reported-by: Paulo Zanoni <paulo.zanoni@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-31DMA-API: others: use dma_set_coherent_mask()Russell King
The correct way for a driver to specify the coherent DMA mask is not to directly access the field in the struct device, but to use dma_set_coherent_mask(). Only arch and bus code should access this member directly. Convert all direct write accesses to using the correct API. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-10-31drm/i915/vlv: Fix typo in the DPIO register define.Chon Ming Lee
Incorrect definition DPIO_TX3_SWING_CTL4. From Ville's review: "Based on the specs, the typo meant that HDMI B ended up using "incorrect" de-emphasis for the TMDS data lanes." Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Add comment from Ville's review about the impact.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-31drm/i915: reduce eDP VDD message verbosePaulo Zanoni
Now we only print messages when we actually enable VDD and when we actually disable VDD. The changes in the last commit triggered a big number of messages while the driver was being initialized, and I thought we were toggling things on/off too many times, but that was not really true: we were just being too verbose. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-31drm/i915: turn the eDP VDD on for any i2c transactionsPaulo Zanoni
If the eDP output is disabled, then we try to use /dev/i2c-X file to do i2c transations, we get a WARN from intel_dp_check_edp() saying we're trying to do AUX communication with the panel off. So this commit reorganizes the code so we enable the VDD at intel_dp_i2c_aux_ch() instead of just the callers inside i915.ko. This fixes the i2c subtest from the pc8 test of intel-gpu-tools on machines that have eDP panels. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-10-31drm/tegra: Reserve syncpoint base for gr3dThierry Reding
Request a syncpoint base to be associated with the gr3d syncpoint. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Reserve base for gr2dArto Merilainen
This patch modifies the gr2d to reserve a base for syncpoint. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Deliver syncpoint base to user spaceArto Merilainen
This patch adds a separate ioctl for delivering syncpoint base number to user space. If the syncpoint does not have an associated base, the function returns -ENXIO. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Add syncpoint base supportArto Merilainen
This patch adds support for hardware syncpoint bases. This creates a simple mechanism to stall the command FIFO until an operation is completed. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Add 'flags' field to syncpt requestArto Merilainen
Functions host1x_syncpt_request() and _host1x_syncpt_alloc() have been taking a separate boolean flag ('client_managed') for indicating if the syncpoint value should be tracked by the host1x driver. This patch converts the field into generic 'flags' field so that we can easily add more information while requesting a syncpoint. Clients are adapted to use the new interface accordingly. Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Disable clock on probe failureWei Yongjun
Add a missing clk_disable_unprepare() before returning from the driver's .probe() function on error. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Disable clock on probe failureWei Yongjun
Add a missing clk_disable_unprepare() before returning from the driver's .probe() function on error. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Support bottom-up buffer objectsThierry Reding
The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add support for tiled buffer objectsThierry Reding
The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add 3D supportThierry Reding
Initialize and power the 3D unit on Tegra20, Tegra30 and Tegra114 and register a channel with the Tegra DRM driver so that the unit can be used from userspace. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Introduce tegra_drm_submit()Thierry Reding
Command stream submissions are the same across all devices that expose a channel to userspace, so move the code into a generic function. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Use symbolic names for gr2d registersThierry Reding
Instead of using magic numbers for the registers which contain memory addresses in the firewall table, using symbolic names. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Start connectors with correct DPMS modeThierry Reding
A connector's DPMS mode isn't initialized by default, therefore using a default of 0 (DRM_MODE_DPMS_ON). This can cause problems in that the DRM core won't explicitly turn on a connector because it thinks that it is already on. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Enable VDD earlier for hotplug/DDCMikko Perttunen
The VDD regulator used to be enabled only at tegra_output_hdmi_enable, which is called after a sink is detected. However, the HDMI hotplug pin works by returning the voltage supplied by the VDD pin, so this meant that the hotplug pin was never asserted and the sink was not detected unless the VDD regulator was set to be always on. This patch moves the enable to the tegra_hdmi_init() function to make sure the regulator will get enabled and therefore ensure proper hotplug detection. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Fix build warningsThierry Reding
These seem to show up when building for architectures other than ARM, which I guess will never happen. The reason why the kbuild test bot ran into these was a missing dependency which has hence been fixed. Still it doesn't hurt to fix them anyway. Reported-by: kbuild test bot <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Detect DVI-only displaysMikko Perttunen
Use EDID data to determine whether the display supports HDMI or DVI only. The HDMI output used to assume to be connected to HDMI displays, but that broke support for DVI displays that don't understand the interspersed audio/other data. To be on the safe side, default to DVI if no EDID data is available. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> [treding@nvidia.com: move detection to separate function] Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add Tegra114 HDMI supportMikko Perttunen
Tegra114 TMDS configuration requires a new peak_current field and the driver current override bit has changed position. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Parameterize based on compatible propertyThierry Reding
Use a structure to parameterize the code to handle differences between the HDMI hardware on various SoC generations. This removes the need to clutter the code with checks for individual compatible values. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: hdmi: Rename tegra{2,3} to tegra{20,30}Thierry Reding
Everything related to Tegra uses Tegra20 and Tegra30 instead of Tegra2 and Tegra3, respectively. Rename the TMDS arrays in the HDMI driver for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Add support for Tegra114Thierry Reding
Tegra114 uses a slightly updated version of host1x with an additional syncpoint. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Allocate resources at probe timeThierry Reding
Since the .init() and .exit() functions are executed whenever the DRM driver is loaded or unloaded, care must be taken not to use them for resource allocation. Otherwise deferred probing cannot be used, since the .init() and .exit() are not run at probe time. Similarly the code that frees resources must be run at .remove() time. If it is run from the .exit() function, it can release resources multiple times. To handle this more consistently, rename the tegra_output_parse_dt() function to tegra_output_probe() and introduce tegra_output_remove() which can be used to free output-related resources. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Properly cleanup and zero out resourcesThierry Reding
When the DRM driver is unloaded, all the associated resources must be cleaned up and zeroed out. This is necessary because of the architecture of the Tegra DRM driver, where not all subdrivers are unloaded along with the DRM driver. Therefore device-managed managed won't be freed and memory cannot be assumed to have been cleared (because it hasn't been reallocated using kzalloc()) by the time the DRM driver is reloaded. It is therefore necessary to zero out the structures to prevent strange errors (such as slab corruptions) from occurring. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Move driver to DRM treeThierry Reding
In order to make subsystem-wide changes easier, move the Tegra DRM driver back into the DRM tree. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31gpu: host1x: Use relative include pathsThierry Reding
This is slightly safer than adding -Idrivers/gpu/host1x to cflags-y. Signed-off-by: Thierry Reding <treding@nvidia.com>