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path: root/drivers/gpu/drm/nouveau
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2011-06-23drm/nouveau: store a per-client channel listBen Skeggs
Removes the need to disable IRQs to lookup channel struct on every pushbuf ioctl, among others. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: use NULL file_priv for DRM-created channelsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: allocate structure to store per-client dataBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: silence error for missing dac loadval tableBen Skeggs
There's lots of boards (all recent ones) that don't have this anymore, so punt the message to debug loglevel. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nv50: DCB table quirks for another busted XFX boardBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: log if accel is disabled by default on a chipsetBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: fill in some more data for 0xc1/0xc8/0xceBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: fix typo in class9197 initBen Skeggs
Reported-by: Christoph Bumiller <e0425955@student.tuwien.ac.at> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: calculate magicgpc918 ourselvesBen Skeggs
Not a clue what it is yet, but we get the same numbers as NVIDIA now. My 465 didn't seem to care to greatly *what* I bashed into these registers.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: add some missing magics for 0xc1/0xc8/0xceBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: import and use our own fuc by defaultBen Skeggs
The ability to use NVIDIA's fuc has been retained *temporarily* in order to better debug any issues that may be lingering in our initial attempt at writing this ucode. Once I'm fairly confident we're okay, it'll be removed. There's a number of things not implemented by this fuc currently, but most of it is sets of state that our context setup would not have used anyway. No doubt we'll find out what they're for at some point, and implement it if required. This has been tested on 0xc0/0xc4 thus far, and from what I could tell it worked as well as NVIDIA's. It's also been tested on 0xc1, but even with NVIDIA's fuc that chipset doesn't work correctly with nouveau yet. 0xc3/0xc8/0xce should in theory be supported too, but I don't have the hardware to check that. There's no doubt numerous bugs to squash yet, please report any! Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: fix suspend/resume of PGRAPH/PCOPYnBen Skeggs
We need the physical VRAM address in vinst, even for objects mapped into a vm, as the gpuobj suspend/resume code uses PMEM to access the object. Previously, vinst was overloaded to mean "VRAM address" for !VM objects, and "VM address" for VM objects, causing the wrong data to be accessed during suspend/resume. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nouveau: default to noaccel on 0xc1/0xc8/0xce for nowBen Skeggs
Until we know these should work properly, would much rather default to noaccel than risk giving people corruption/hangs out of the box.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc1/gr: switch on acceleration supportBen Skeggs
There's issues with certain 3D apps still, unknown whether this is a kernel issue or not.. It does appear that it may be in the 3D driver however. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: enable 0xc8/0xce support, no idea if it works or not..Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: some initial state modificationsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: 0x9197/0x9297 state initBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/gr: macro to determine fermi class, will use it in a few placesBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/fifo: fix typos in unload_contextBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0/fb: allocate page for some unknown PFFB objectBen Skeggs
Fixes DMAR faults during accel, more than likely a similar problem to what was solved on nv50 previously. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23drm/nvc0: Read temperature on Fermi like we do on nv84+Martin Peres
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-20drm/nouveau: drop leftover debuggingDave Airlie
this printk isn't really useful, just drop it for now. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-06-18drm/nouveau: fix assumption that semaphore dmaobj is valid in x-chan syncBen Skeggs
The DDX modifies DMA_SEMAPHORE on nv50 in order to implement sync-to-vblank, things will go very wrong for cross-channel sync after this. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-18drm/nv50/disp: fix gamma with page flipping overlay turned onBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-18drm/nouveau/pm: Prevent overflow in nouveau_perf_init()Emil Velikov
While parsing the perf table, there is no check if the num of entries read from the vbios is less than the currently allocated number. In case of a buggy vbios this will cause overwriting of kernel memory, causing aditional problems. Add a simple check in order to prevent the case Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-18drm/nouveau: fix big-endian switchBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-07drm/nv40: fall back to paged dma object for the momentBen Skeggs
PCI(E)GART isn't quite stable it seems, fall back to old method until I get the time to sort it out properly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-07drm/nouveau: fix leak of gart mm nodeBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-07drm/nouveau: fix vram page mapping when crossing page table boundariesBen Skeggs
Hopefully the cause of nvc0 "page jumping" issue. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-07drm/nv17-nv40: Fix modesetting failure when pitch == 4096px (fdo bug 35901).Francisco Jerez
Reported-by: Mario Bachmann <grafgrimm77@gmx.de> Tested-by: Greg Turner <gmturner007@ameritech.net> Signed-off-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-07drm/nouveau: don't create accel engine objects when noaccel=1Ben Skeggs
Fixes various potential oopses. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-07drm/nvc0: recognise 0xdX chipsets as NV_C0Ben Skeggs
Should hopefully get modesetting at least from this, it appears these are GF119 chipsets. Accel will come eventually, once I order a board. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-24Merge branch 'drm-core-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (169 commits) drivers/gpu/drm/radeon/atom.c: fix warning drm/radeon/kms: bump kms version number drm/radeon/kms: properly set num banks for fusion asics drm/radeon/kms/atom: move dig phy init out of modesetting drm/radeon/kms/cayman: fix typo in register mask drm/radeon/kms: fix typo in spread spectrum code drm/radeon/kms: fix tile_config value reported to userspace on cayman. drm/radeon/kms: fix incorrect comparison in cayman setup code. drm/radeon/kms: add wait idle ioctl for eg->cayman drm/radeon/cayman: setup hdp to invalidate and flush when asked drm/radeon/evergreen/btc/fusion: setup hdp to invalidate and flush when asked agp/uninorth: Fix lockups with radeon KMS and >1x. drm/radeon/kms: the SS_Id field in the LCD table if for LVDS only drm/radeon/kms: properly set the CLK_REF bit for DCE3 devices drm/radeon/kms: fixup eDP connector handling drm/radeon/kms: bail early for eDP in hotplug callback drm/radeon/kms: simplify hotplug handler logic drm/radeon/kms: rewrite DP handling drm/radeon/kms/atom: add support for setting DP panel mode drm/radeon/kms: atombios.h updates for DP panel mode ...
2011-05-16drm: fix nouveau_acpi buildRandy Dunlap
Fix build errors when CONFIG_ACPI is enabled but MXM_WMI is not enabled by selecting both MXM_WMI and ACPI_WMI (the latter just for kconfig dependencies): nouveau_acpi.c:(.text+0x2400c8): undefined reference to `mxm_wmi_call_mxmx' nouveau_acpi.c:(.text+0x2400cf): undefined reference to `mxm_wmi_call_mxds' nouveau_acpi.c:(.text+0x2400fe): undefined reference to `mxm_wmi_call_mxmx' nouveau_acpi.c:(.text+0x2402ba): undefined reference to `mxm_wmi_supported Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-05-16drm/nouveau: make cursor_set implementation consistent with other driversMarcin Slusarz
When xorg state tracker wants to hide the cursor it calls set_cursor with NULL buffer_handle and size=0x0, but nouveau refuses to hide it because size is not 64x64... which is a bit odd. Both radeon and intel check buffer_handle before validating size of cursor, so make nouveau implementation consistent with them. Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nva3/clk: better pll calculation when no fractional fb div availableBen Skeggs
The core/mem/shader clocks don't support the fractional feedback divider, causing our calculated clocks to be off by quite a lot in some cases. To solve this we will switch to a search-based algorithm when fN is NULL. For my NVA8 at PL3, this actually generates identical cooefficients to the binary driver. Hopefully that's a good sign, and that does not break VPLL calculation for someone.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau/pm: translate ramcfg strap through ram restrict tableBen Skeggs
Hopefully this is how we're supposed to correctly handle when the RAMCFG strap is above the number of entries in timing-related tables. It's rather difficult to confirm without finding a configuration where the ram restrict table doesn't map 8-15 back onto 0-7 anyway. There's not a single vbios in the repo which is configured differently.. In any case, this is probably still better than potentially reading outside of the bounds of various tables.. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nva3/pm: allow use of divisor 16Ben Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0/pm: parse clock for pll 0x0a (0x137020) from perf tableBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0/pm: correct core/mem/shader perflvl parsingBen Skeggs
We need to parse some of these other entries still, but I've yet to determine exactly which PLLs the rest map to. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau/pm: remove memtiming support check when assigning to perflvlBen Skeggs
Really not necessary here, we want to be able to see if/how we managed to match a timingset to a performance level, even if we can't currently program it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nva3: support for memory timing map tableBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: Associate memtimings with performance levels on cards <= nv98Martin Peres
v2 (Ben Skeggs): fix ramcfg strap, and remove bogus handling of perf 0x40 Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nva3/pm: initial pass at set_clock() hookBen Skeggs
I still discourage anyone from actually doing this yet. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nvc0/gr: calculate some more of our magic numbersBen Skeggs
Again, doesn't quite match NVIDIA's, but not sure it really matters. This will however, match the same rules we use to calculate the other related grctx magics. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nv50: respect LVDS link count from EDID on SPWG panelsBen Skeggs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: recognise DCB connector type 0x41 as LVDSBen Skeggs
After looking at a number of different logs, it appears 0x41 likely indicates the presense of an LVDS panel following the SPWG spec (http://www.spwg.org/) Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: fix uninitialised variable warningBen Skeggs
Looks like a false positive to me, but, anyways! Reported-by: Jimmy Rentz <jb17bsome@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: Fix a crash at card takedown for NV40 and older cardsJimmy Rentz
NV40 and older cards (pre NV50) reserve a vram bo for the vga memory at card init. This bo is then freed at card shutdown. The problem is that the ttm bo vram manager was already freed. So a crash occurs when the vga bo is freed. The fix is to free the vga bo prior to freeing the ttm bo vram manager. There might be other solutions but this seemed the simplest to me. Signed-off-by: Jimmy Rentz <jb17bsome@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16drm/nouveau: Free nv04 instmem ramin heap at card takedownJimmy Rentz
Add a missing nv04 instmem ramin heap shutdown call. Signed-off-by: Jimmy Rentz <jb17bsome@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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