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Display the total time when kernel resumes normal from standby or suspend to mem
mode.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
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Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
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Add bf60x cpu pm callbacks and change blackfin pm framework to support bf60x.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
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No need to reload these registers constantly since they're always
available (we're not making any function calls in between).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin C ABI says we do not need to save/restore R0-R3 and P0-P2
as they are available as scratch registers. So don't bother.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Re-architect how we save/restore the gpio/port logic that only pertains
to bf538/bf539 parts by pulling it out of the core code paths and pushing
it out to bf538-specific locations.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The current save logic used in hibernation is to do a MMR load (base +
offset) into a register, and then push that onto the stack. Then when
restoring, pop off the stack into a register followed by a MMR store
(base + offset). These use plenty of 32bit insns rather than 16bit,
are pretty long winded, and full of pipeline bubbles.
So, by taking advantage of MMRs that are contiguous, the multi-register
push/pop insn, and register abuse, we can shrink this code considerably.
When saving, the new logic does a lot of loads into the data and pointer
registers before executing a single multi-register push insn. Then when
restoring, we do a single multi-register pop insn followed by a lot of
stores. Overall, this allows us to cut the insn count by ~30%, the code
size by ~45%, and drastically reduce the register hazards that trigger
bubbles in the pipeline.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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EVT0 is for emulation, EVT1 is for reset, and EVT4 is the "global int
disable" region. None of these are used by software (or even hardware),
so don't bother saving/restoring them when we hibernate since nothing
ever uses these in Linux (the only thing they would be useful for is
core-memory scratch, but that's just crazy talk).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This defines only get used in the hibernate code, so remove them from the
global dpmc header as no one else cares.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The RETE/RETN registers are only used in emulation(JTAG) and NMI nodes,
or as scratch registers, neither of which need to be saved/restored as
this code doesn't execute at those core event levels.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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For parts with more than one SIC_IWR, we can optimize the writing
a little bit using better Blackfin insns.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Have the code work off of MMR names rather than CPU defines so there is
less code to tweak in the future with new parts.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This matches all the other Blackfin ports and keep us from having to write
bf561-specific code in many places.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The RTC ISTAT bits do not affect wakeups, and the RTC driver already
takes care of clearing this MMR when necessary. So drop the useless
clearing in the core Blackfin power code.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The GPIOs on ports C/D/E on the BF538/BF539 do not behave the same way as
the other ports on the part and the same way as all other Blackfin parts.
The MMRs are programmed slightly different and they cannot be used to
generate interrupts or wakeup a sleeping system. Since these guys don't
fit into the existing code, create a simple gpiolib driver for them.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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from "mem"
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Add supporing for Blackfin BF538 and BF539 processors.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Signed-off-by: Bryan Wu <cooloney@kernel.org>
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- Disable all bits in SIC_IWR unless we are going into a real (DPMC)
power saving mode. Any Interrupt can wake the core form it's idle state.
- Remove deep sleep mode as it is not going to be used anywhere:
We support sleep, sleep deeper and hibernate.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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Enable: PM_SUSPEND_MEM -> Blackfin Hibernate to SDRAM
This feature requires a special bootloader (u-boot)
supporting return from hibernate.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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voltage scaling support
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
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