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path: root/arch/arm/mm/proc-v7.S
AgeCommit message (Expand)Author
2011-03-16Merge branches 'at91', 'ep93xx', 'errata', 'footbridge', 'fncpy', 'gemini', '...Russell King
2011-03-09ARM: 6772/1: errata: possible fault MMU translations following an ASID switchWill Deacon
2011-02-22ARM: pm: add generic CPU suspend/resume supportRussell King
2011-02-19ARM: 6743/1: errata: interrupted ICALLUIS may prevent completion of broadcast...Will Deacon
2011-01-14ARM: 6623/1: Thumb-2: Fix out-of-range offset for Thumb-2 in proc-v7.SDave Martin
2011-01-06Merge branch 'pgt' (early part) into develRussell King
2011-01-06Merge branch 'misc' into develRussell King
2010-12-22ARM: pgtable: provide RDONLY page table bit rather than WRITE bitRussell King
2010-12-22ARM: pgtable: invert L_PTE_EXEC to L_PTE_XNRussell King
2010-12-22ARM: pgtable: switch order of Linux vs hardware page tablesRussell King
2010-11-30ARM: 6501/1: Thumb-2: Correct data alignment for CONFIG_THUMB2_KERNEL in mm/p...Dave Martin
2010-11-04ARM: 6396/1: Add SWP/SWPB emulation for ARMv7 processorsLeif Lindholm
2010-11-04ARM: 6384/1: Remove the domain switching on ARMv6k/v7 CPUsCatalin Marinas
2010-10-19Merge branch 'devel-stable' into develRussell King
2010-10-18Merge branch 'hotplug' into develRussell King
2010-10-08ARM: hotplug cpu: Keep processor information, startup code & __lookup_process...Russell King
2010-10-08ARM: 6435/1: Fix HWCAP_TLS flag for ARM11MPCore/Cortex-A9Tony Lindgren
2010-10-04ARM: Allow SMP kernels to boot on UP systemsRussell King
2010-10-04ARM: 6416/1: errata: faulty hazard checking in the Store Buffer may lead to d...Will Deacon
2010-09-17ARM: 6398/1: add proc info for ARM11MPCore/Cortex-A9 from ARMDaniel Walker
2010-09-17ARM: 6389/1: errata: incorrect hazard handling in the SCU may lead to data co...Will Deacon
2010-09-17ARM: 6388/1: errata: DMB operation may be faultyWill Deacon
2010-09-17ARM: 6387/1: errata: check primary part ID in proc-v7.SWill Deacon
2010-07-27ARM: Factor out common code from cpu_proc_fin()Russell King
2010-07-09ARM: 6207/1: Replace CONFIG_HAS_TLS_REG with HWCAP_TLS and check for it on V6Tony Lindgren
2010-01-19ARM: 5888/1: arm: Update comments in cacheflush.h and remove unnecessary V6 a...Tony Lindgren
2010-01-19ARM: 5886/1: arm: Fix cpu_proc_fin() for proc-v7.S and make kexec workTony Lindgren
2009-11-04ARMv7: Check whether the SMP/nAMP mode was already enabledTony Thompson
2009-11-02ARM: ensure initial page tables are setup for SMP systemsRussell King
2009-10-02ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()Kirill A. Shutemov
2009-07-24nommu: Do not set PRRR and NMRR in proc-v7.S if !MMUCatalin Marinas
2009-07-24Thumb-2: Implement the unified arch/arm/mm supportCatalin Marinas
2009-06-14Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2009-06-02[ARM] ARMv7 errata: only apply fixes when running on applicable CPURussell King
2009-05-30Add core support for ARMv6/v7 big-endianCatalin Marinas
2009-05-30ARMv7: Document the PRRR and NMRR registers settingCatalin Marinas
2009-05-30ARMv7: Enable the SWP instructionCatalin Marinas
2009-05-30ARMv7: Mark the PTWs inner WBWA on SMP and WB on UPTony Thompson
2009-05-30Check whether the TLB operations need broadcasting on SMP systemsCatalin Marinas
2009-05-02Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2009-04-30[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten wit...Catalin Marinas
2009-04-30[ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is createdCatalin Marinas
2009-04-30[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branchCatalin Marinas
2009-04-27arm: Use __INIT macro instead of .text.init.Tim Abbott
2008-11-27Merge branch 'for-rmk' of git://linux-arm.org/linux-2.6 into develRussell King
2008-11-10Modern processors may need to drain the WB before WFICatalin Marinas
2008-11-06[ARM] mm: fix page table initializationRussell King
2008-11-06ARMv7: Add SMP initialisation to proc-v7.SJon Callan
2008-11-06ARMv7: Do not set TTBR0 in __v7_setupCatalin Marinas
2008-10-22[ARM] 5318/1: Swap the PRRR and NMRR values in proc-v7.SCatalin Marinas
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