aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2014-05-22Merge tag 'nfc-next-3.16-1' of ↵John W. Linville
git://git.kernel.org/pub/scm/linux/kernel/git/sameo/nfc-next Samuel Ortiz <sameo@linux.intel.com> says: "NFC: 3.16: First pull request This is the NFC pull request for 3.16. We have: - STMicroeectronics st21nfca support. The st21nfca is an HCI chipset and thus relies on the HCI stack. This submission provides support for tag redaer/writer mode (including Type 5) and device tree bindings. - PM runtime support and a bunch of bug fixes for TI's trf7970a. - Device tree support for NXP's pn544. Legacy platform data support is obviously kept intact. - NFC Tag type 4B support to the NFC Digital stack. - SOCK_RAW type support to the raw NFC socket, and allow NCI sniffing from that. This can be extended to report HCI frames and also proprietarry ones like e.g. the pn533 ones." Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-05-22Merge branch 'for-john' of ↵John W. Linville
git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/iwlwifi-fixes
2014-05-23ARM: dts: add pmu syscon handle to exynos5420 hdmiRahul Sharma
Add PMU syscon handle to HDMI dt node for controlling PHY Enable/Disable bit. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: add pmu syscon handle to exynos5250 hdmiRahul Sharma
Add PMU syscon handle to HDMI dt node for controlling PHY Enable/Disable bit. Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: replace number by macro in clock binding for exynos5420Beomho Seo
sss module device node missed clock macro. This patch replace magic number with macro in clock binding for exynos5420. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: replace number by macro in clock binding for exynos5250Beomho Seo
Phy and sss module device node missed clock macro. This patch replace magic number with macros in clock binding for exynos5250. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: replace number by macro in clock binding for exynos4Beomho Seo
This patch replaces magic number of MIPI DSI Master node with macros in clock binding for exynos4 Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Reviewed-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: add external sd card node for exynos4210-universal_c210Marek Szyprowski
This patch enables support external SD card slot. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: add multimedia nodes for exynos4210-universal_c210Marek Szyprowski
This patch enables support for multimedia blocks - fimc in mem2mem mode, no camera sensors support yet. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: enable USB functionality for exynos4210-universal_c210Marek Szyprowski
This patch adds device tree nodes necessary to enable USB support on universalc210 board, this includes UDC controller (USB gadget) as well as EHCI and OHCI host ports. LDO3 and LDO8 regulators are switched to always on mode until EHCI and OHCI drivers will support them correctly. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: Enable USB gadget functionality for exynos4210-tratsTomasz Figa
This patch adds device tree nodes necessary to enable USB gadget functionality on Exynos4210-based Trats board. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: Add audio subsystem nodes to exynos4.dtsiSylwester Nawrocki
This patch adds the audio subsystem clock controller and the I2S IP block nodes for Exynos4 SoC series. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: fixed gpio key node for exynos4412-trats2Beomho Seo
This patch fixed gpio key device node. First, fix incorrect gpio property. And then, add ok-key node where locate bottom center. I have tested on exynos4412-trats2 board. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-23ARM: dts: add cm36651 light/proximity sensor node for exynos4412-trats2Beomho Seo
Exynos4412-trats2 board have light/proximity sensor. This patch add cm36651 light/ proximity sensor node for exynos4412. cm36651 is required properties as below. - Use i2c-gpio for cm36651 sensor. - Use fixed regulator for the IR LED. It is a part of the cm36651 for proximity detection. - cm36651 is i2c device driver so need to use i2c-gpio driver. Signed-off-by: Beomho Seo <beomho.seo@samsung.com> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-05-22ARM: dts: MSM8974: Add pinctrl nodeIvan T. Ivanov
Add the pin control node and pin definitions of SPI8. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ASoC: samsung: Handle errors when getting the op_clk clockSylwester Nawrocki
Ensure i2s->op_clk is not used when clk_get() for this clock fails. This prevents working with an incorrectly configured clock in some conditions. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-05-22ath10k: support get/set antenna configurations.Ben Greear
Verified that target's tx/rx chain register is set appropriately, and that the tx rate goes down as number of chains decrease, but I did not actually try to verify antenna ceased to transmit when disabled. kvalo: move ar->supp_*_chainmask initialisation to ath10k_mac_register() Signed-off-by: Ben Greear <greearb@candelatech.com> Signed-off-by: Avery Pennarun <apenwarr@gmail.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
2014-05-22clocksource: tcb_clksrc: Make tc_mode interrupt safeDavid Jander
tc_mode() can be called from interrupt context and thus must not call clk_*prepare*() functions. Signed-off-by: David Jander <david@protonic.nl> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22clocksource: marco: Fix the affinity set for local timer of CPU1Zhiwu Song
irqchip will reject the affinity set to CPUs which is not online yet. but in the CPU1 wakeup stage, OS only sets CPU1 to be online after local timer is set, so that causes the irq_set_affinity not work. this patch moves to irq_force_affinity() for the low level boot stage. Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-05-22PCI: Remove pcibios_add_platform_entries()Sebastian Ott
Remove pcibios_add_platform_entries(). Architecture-specific attributes can be achieved by setting pdev->dev.groups. Link: https://lkml.kernel.org/r/alpine.LFD.2.11.1404141101500.1529@denkbrett Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-05-22s390/pci: use pdev->dev.groups for attribute creationSebastian Ott
Let the driver core handle attribute creation by putting all s390 specific pci attributes in an attribute group which is referenced by pdev->dev.groups in pcibios_add_device. Link: https://lkml.kernel.org/r/alpine.LFD.2.11.1404141101500.1529@denkbrett Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2014-05-22ARM: qcom: Select PINCTRL by default for ARCH_QCOMAndy Gross
Add missing PINCTRL selection. This enables selection of pinctrollers for Qualcomm processors. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: debug: qcom: make UART address selection configuration optionIvan T. Ivanov
Separate Qualcomm low-level debugging UART to two options. DEBUG_MSM_UART is used in earlier non-multi platform arches, like MSM7X00A, QSD8X50 and MSM7X30. DEBUG_QCOM_UARTDM is used in multi-plafrom arches and have embedded data mover. Make DEBUG_UART_PHYS and DEBUG_UART_BASE user adjustable by Kconfig menu. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.Srinivas Kandagatla
As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs. For example SDCC controller is PrimeCell MCI pl180. Adding this option will give flexibility to reuse the existing drivers as it is without major modifications. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22blk-mq: split make request handler for multi and single queueJens Axboe
We want slightly different behavior from them: - On single queue devices, we currently use the per-process plug for deferred IO and for merging. - On multi queue devices, we don't use the per-process plug, but we want to go straight to hardware for SYNC IO. Split blk_mq_make_request() into a blk_sq_make_request() for single queue devices, and retain blk_mq_make_request() for multi queue devices. Then we don't need multiple checks for q->nr_hw_queues in the request mapping. Signed-off-by: Jens Axboe <axboe@fb.com>
2014-05-22ARM: at91: sam9260: fix compilation issuesAlexandre Belloni
Use the hexadecimal values for the triggers to match what is done for the device tree. This also fixes compilation issues as the defines have been moved elsewhere. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: config: Update msm_defconfigStephen Boyd
Now that DT based platforms are split out of mach-msm into mach-qcom, put back a non-DT based SoC into the msm_defconfig and stop selecting unsupported drivers. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/pablo/nftablesDavid S. Miller
Pablo Neira Ayuso says: ==================== Netfilter/nftables updates for net-next The following patchset contains Netfilter/nftables updates for net-next, most relevantly they are: 1) Add set element update notification via netlink, from Arturo Borrero. 2) Put all object updates in one single message batch that is sent to kernel-space. Before this patch only rules where included in the batch. This series also introduces the generic transaction infrastructure so updates to all objects (tables, chains, rules and sets) are applied in an all-or-nothing fashion, these series from me. 3) Defer release of objects via call_rcu to reduce the time required to commit changes. The assumption is that all objects are destroyed in reverse order to ensure that dependencies betweem them are fulfilled (ie. rules and sets are destroyed first, then chains, and finally tables). 4) Allow to match by bridge port name, from Tomasz Bursztyka. This series include two patches to prepare this new feature. 5) Implement the proper set selection based on the characteristics of the data. The new infrastructure also allows you to specify your preferences in terms of memory and computational complexity so the underlying set type is also selected according to your needs, from Patrick McHardy. 6) Several cleanup patches for nft expressions, including one minor possible compilation breakage due to missing mark support, also from Patrick. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2014-05-22Merge branch 'master' of ↵David S. Miller
git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates This series contains updates to i40e and i40evf. Shannon makes minor changes to the AdminQ interface to bring it up to date. Removes the hard coding of stats struct size in ethtool, in prep for adding data fields which are configuration dependent. Catherine removes some unused and unneeded PCI bus defines. Jesse fixes the copyright headers and finishes up the removal of the PTP Tx work functionality which allows us to rely on the Tx timesync interrupt. Mitch provides a number of fixes and cleanups for i40e/i40evf based on suggestions from Ben Hutchings. First is to use a macro parameter for ethtool stats instead of just assuming that a valid netdev variable exists. Second is not to tell ethtool that the VF can do 10GbaseT, when it really has no idea what its link speed is, so set the supported value to 0 instead. Make the ethtool_ops structure constant since it is extremely unlikely to change at runtime. Ethtool consistently reports 0 values for our ITR settings because we never actually use them, so fix this by setting the default values to the specified default values. Greg avoids a compile error by wrapping the call to i40e_alloc_vfs() in CONFIG_PCI_IOV because the function itself is wrapped in the same conditional compile block. Alexander Gordeev updates the driver to use the new pci_enable_msi_range() and pci_enable_msix_range() or pci_enable_msi_exact() and pci_enable_msix_exact(). Jean Sacren provides a fix where the wrong error code was being passed to i40e_open(). ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2014-05-22tcp: make cwnd-limited checks measurement-based, and gentlerNeal Cardwell
Experience with the recent e114a710aa50 ("tcp: fix cwnd limited checking to improve congestion control") has shown that there are common cases where that commit can cause cwnd to be much larger than necessary. This leads to TSO autosizing cooking skbs that are too large, among other things. The main problems seemed to be: (1) That commit attempted to predict the future behavior of the connection by looking at the write queue (if TSO or TSQ limit sending). That prediction sometimes overestimated future outstanding packets. (2) That commit always allowed cwnd to grow to twice the number of outstanding packets (even in congestion avoidance, where this is not needed). This commit improves both of these, by: (1) Switching to a measurement-based approach where we explicitly track the largest number of packets in flight during the past window ("max_packets_out"), and remember whether we were cwnd-limited at the moment we finished sending that flight. (2) Only allowing cwnd to grow to twice the number of outstanding packets ("max_packets_out") in slow start. In congestion avoidance mode we now only allow cwnd to grow if it was fully utilized. Signed-off-by: Neal Cardwell <ncardwell@google.com> Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-05-22ARM: at91: move sam9n12 SoC to the CCFBoris BREZILLON
This patch removes the selection of AT91_USE_OLD_CLK when selecting sam9n12 SoC support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: at91/dt: define sam9n12ek crystal frequenciesBoris BREZILLON
Define sam9n12ek's main and slow crystal frequencies. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: at91/dt: define sam9n12 clocksBoris BREZILLON
Define sam9n12 clocks and make use of them in peripheral definitions. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: at91: prepare common clk transition for sam9n12 SoCBoris BREZILLON
This patch encloses sam9n12 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91) #endif" sections. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Tested-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: at91: move sam9x5 SoCs to the CCFBoris BREZILLON
This patch removes the selection of AT91_USE_OLD_CLK when selecting sam9x5 SoCs support. This will automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: at91/dt: define sam9x5ek's crystal frequenciesBoris BREZILLON
Define sam9x5ek's main and slow crystal frequencies. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: at91/dt: define sam9x5 clocksBoris BREZILLON
Define sam9x5 clocks in sam9x5 dt files and make use of them in peripheral definitions. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22ARM: at91: prepare common clk transition for sam9x5 SoCsBoris BREZILLON
This patch encloses sam9x5 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91) #endif" sections. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-05-22Merge branch 'at91-3.16-cleanup' into at91-3.16-dt3Nicolas Ferre
2014-05-22Merge tag 'asoc-v3.16' of ↵Takashi Iwai
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next ASoC: Updates for v3.16 Lots of cleanup work going on in the core this release but very little visible to external users except for the new drivers that have been added. - Support for specifying aux CODECs in DT. - Removal of the deprecated mux and enum macros. - More moves towards full componentisation. - Removal of some unused I/O code. - Lots of cleanups, fixes and enhancements to the davinci, Freescale, Haswell and Realtek drivers. - Several drivers exposed directly in Kconfig for use with simple-card. - New drivers for Cirrus CS42L56, Realtek RT5639, RT5642 and RT5651 and ST STA350.
2014-05-22KVM: vmx: DR7 masking on task switch emulation is wrongNadav Amit
The DR7 masking which is done on task switch emulation should be in hex format (clearing the local breakpoints enable bits 0,2,4 and 6). Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-22KVM: x86: get CPL from SS.DPLPaolo Bonzini
CS.RPL is not equal to the CPL in the few instructions between setting CR0.PE and reloading CS. And CS.DPL is also not equal to the CPL for conforming code segments. However, SS.DPL *is* always equal to the CPL except for the weird case of SYSRET on AMD processors, which sets SS.DPL=SS.RPL from the value in the STAR MSR, but force CPL=3 (Intel instead forces SS.DPL=SS.RPL=CPL=3). So this patch: - modifies SVM to update the CPL from SS.DPL rather than CS.RPL; the above case with SYSRET is not broken further, and the way to fix it would be to pass the CPL to userspace and back - modifies VMX to always return the CPL from SS.DPL (except forcing it to 0 if we are emulating real mode via vm86 mode; in vm86 mode all DPLs have to be 3, but real mode does allow privileged instructions). It also removes the CPL cache, which becomes a duplicate of the SS access rights cache. This fixes doing KVM_IOCTL_SET_SREGS exactly after setting CR0.PE=1 but before CS has been reloaded. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-22x86: fix page fault tracing when KVM guest support enabledDave Hansen
I noticed on some of my systems that page fault tracing doesn't work: cd /sys/kernel/debug/tracing echo 1 > events/exceptions/enable cat trace; # nothing shows up I eventually traced it down to CONFIG_KVM_GUEST. At least in a KVM VM, enabling that option breaks page fault tracing, and disabling fixes it. I tried on some old kernels and this does not appear to be a regression: it never worked. There are two page-fault entry functions today. One when tracing is on and another when it is off. The KVM code calls do_page_fault() directly instead of calling the traced version: > dotraplinkage void __kprobes > do_async_page_fault(struct pt_regs *regs, unsigned long > error_code) > { > enum ctx_state prev_state; > > switch (kvm_read_and_reset_pf_reason()) { > default: > do_page_fault(regs, error_code); > break; > case KVM_PV_REASON_PAGE_NOT_PRESENT: I'm also having problems with the page fault tracing on bare metal (same symptom of no trace output). I'm unsure if it's related. Steven had an alternative to this which has zero overhead when tracing is off where this includes the standard noops even when tracing is disabled. I'm unconvinced that the extra complexity of his apporach: http://lkml.kernel.org/r/20140508194508.561ed220@gandalf.local.home is worth it, expecially considering that the KVM code is already making page fault entry slower here. This solution is dirt-simple. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: x86@kernel.org Cc: Peter Zijlstra <peterz@infradead.org> Cc: Gleb Natapov <gleb@redhat.com> Cc: kvm@vger.kernel.org Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-22KVM: x86: check CS.DPL against RPL during task switchPaolo Bonzini
Table 7-1 of the SDM mentions a check that the code segment's DPL must match the selector's RPL. This was not done by KVM, fix it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-22KVM: x86: drop set_rflags callbackPaolo Bonzini
Not needed anymore now that the CPL is computed directly during task switch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-22ALSA: Replace DEFINE_PCI_DEVICE_TABLE macro useBenoit Taine
We should prefer `const struct pci_device_id` over `DEFINE_PCI_DEVICE_TABLE` to meet kernel coding style guidelines. This issue was reported by checkpatch. A simplified version of the semantic patch that makes this change is as follows (http://coccinelle.lip6.fr/): // <smpl> @@ identifier i; declarer name DEFINE_PCI_DEVICE_TABLE; initializer z; @@ - DEFINE_PCI_DEVICE_TABLE(i) + const struct pci_device_id i[] = z; // </smpl> It has been tested by compilation. Signed-off-by: Benoit Taine <benoit.taine@lip6.fr> Signed-off-by: Takashi Iwai <tiwai@suse.de>
2014-05-22KVM: x86: use new CS.RPL as CPL during task switchPaolo Bonzini
During task switch, all of CS.DPL, CS.RPL, SS.DPL must match (in addition to all the other requirements) and will be the new CPL. So far this worked by carefully setting the CS selector and flag before doing the task switch; setting CS.selector will already change the CPL. However, this will not work once we get the CPL from SS.DPL, because then you will have to set the full segment descriptor cache to change the CPL. ctxt->ops->cpl(ctxt) will then return the old CPL during the task switch, and the check that SS.DPL == CPL will fail. Temporarily assume that the CPL comes from CS.RPL during task switch to a protected-mode task. This is the same approach used in QEMU's emulation code, which (until version 2.0) manually tracks the CPL. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-22ARM: outer cache: add documentation of outer cache functionsRussell King
Add some documentation to cover the outer cache functions so that their requirements can be better understood. Of particular note are the flush_all() and disable() methods which must not be called except in very specific circumstances. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-22ARM: l2c: remove unnecessary UL-suffix to mask valuesRussell King
They're u32, they're not unsigned long. The UL suffix is not required here. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-05-22ARM: l2c: omap2: remove ES1.0 supportRussell King
Santosh says: > But we should kill all of that since we long back decided to remove > ES1.0 related code. The mach-omap code alreasy has removed the ES1.0 > compatibility so feel free to remove any specific ES1.0 > related stuff. That silicon is long dead. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>