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2009-01-11MIPS: Alchemy: new userspace suspend interface for development boards.Manuel Lauss
Replace the current sysctl-based suspend interface with a new sysfs- based one which also uses the Linux-2.6 suspend model. To configure wakeup sources, a subtree for the demoboards is created under /sys/power/db1x: sys/ `-- power `-- db1x |-- gpio0 |-- gpio1 |-- gpio2 |-- gpio3 |-- gpio4 |-- gpio5 |-- gpio6 |-- gpio7 |-- timer |-- timer_timeout |-- wakemsk `-- wakesrc The nodes 'gpio[0-7]' and 'timer' configure the GPIO0..7 and M2 bits of the SYS_WAKEMSK (wakeup source enable) register. Writing '1' enables a wakesource, 0 disables it. The 'timer_timeout' node holds the timeout in seconds after which the TOYMATCH2 event should wake the system. The 'wakesrc' node holds the SYS_WAKESRC register after wakeup (in hex), the 'wakemsk' node can be used to get/set the wakeup mask directly. For example, to have the timer wake the system after 10 seconds of sleep, the following must be done in userspace: echo 10 > /sys/power/db1x/timer_timeout echo 1 > /sys/power/db1x/timer echo mem > /sys/power/sleep This patch also removes the homebrew CPU frequency switching code. I don't understand how it could have ever worked reliably; it does not communicate the clock changes to peripheral devices other than uarts. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/alchemy/devboards/pm.c
2009-01-11MIPS: Alchemy: dbdma suspend/resume support.Manuel Lauss
Implement suspend/resume for DBDMA controller and its channels. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: Fix up PM code on Au1550/Au1200Manuel Lauss
Au1550/Au1200 have a different memory controller which requires additi- onal code to properly put memory to sleep (code taken from AMD/RMI's Linux-2.6.11 source package). Also fix up the remaining pm-related paths to compile on Au1200/Au1550 platforms. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: move calc_clock function.Manuel Lauss
Now that nothing in time.c depends on calc_clock, it can be moved to clocks.c where it belongs. While at it, give it a better non-generic name and call it as soon as possible in plat_mem_init. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: RTC counter clocksource / clockevent support.Manuel Lauss
Add support for the 32 kHz counter1 (RTC) as clocksource / clockevent device. As a nice side effect, this also enables use of the 'wait' instruction for runtime idle power savings. If the counters aren't enabled/working properly, fall back on the cp0 counter clock code. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: make cp0 counter clocksource/event usable as fallback.Manuel Lauss
The current mips clock build infrastructure lets a system only use either the MIPS cp0 counter or a SoC specific timer as a clocksource / clockevent device. This patch renames the core cp0 counter clocksource / clockevent functions from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to call these renamed functions instead. Chips which can detect whether it is safe to use a chip-specific timer can now fall back on the cp0 counter if necessary and possible (e.g. Alchemy with a follow-on patch). Existing behaviour is not changed in any way. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: remove cpu_table.Manuel Lauss
Remove the cpu_table: - move detection of whether c0_config[OD] is read-only and should be set to fix various chip errata to au1000 headers. - move detection of write-only sys_cpupll to au1000 headers. - remove the BCLK switching code: Activation of this features should be left to the boards using the chips since it also affects external devices tied to BCLK, and only the board designers know whether it is safe to enable. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/cputable.c
2009-01-11MIPS: Alchemy: remove get/set_au1x00_lcd_clock().Manuel Lauss
There are no in-tree users, so remove them. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Print irq handler descriptionManuel Lauss
Add the name set by set_irq_chip_and_handler_name() to the output of /proc/interrupts, like so: db1200 ~ # cat /proc/interrupts CPU0 8: 52 Alchemy-IC0-hilevel serial 10: 171 Alchemy-IC0-hilevel au1xxx-mmc 11: 47 Alchemy-IC0-hilevel Au1xxx dbdma 18: 1 Alchemy-IC0-hilevel au1550-spi 29: 1250997 Alchemy-IC0-riseedge timer 37: 211 Alchemy-IC0-hilevel ehci_hcd:usb1, ohci_hcd:usb2 38: 0 Alchemy-IC0-hilevel lcd 72: 2623 DB1200 CPLD-level ide0 73: 257 DB1200 CPLD-level eth0 84: 1 DB1200 CPLD-level sd_insert 85: 0 DB1200 CPLD-level sd_eject ERR: 0 Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: pb1200: update CPLD cascade irq handler.Manuel Lauss
Tested on Db1200. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: update core interrupt code.Manuel Lauss
This patch attempts to modernize core Alchemy interrupt handling code. - add irq_chips for irq controllers instead of irq type, - add a set_type() hook to change irq trigger type during runtime, - add a set_wake() hook to control GPIO0..7 based wakeup, - use linux' IRQF_TRIGGER_ constants instead of homebrew ones, - enable GENERIC_HARDIRQS_NO__DO_IRQ. - simplify plat_irq_dispatch - merge au1xxx_irqmap into irq.c file, the only place where its contents are referenced. - board_init_irq() is now mandatory for every board; use it to register the remaining (gpio-based) interrupt sources; update all boards accordingly. Run-tested on Db1200 and other Au1200 based platforms. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/au1xxx_irqmap.c
2009-01-11MIPS: Alchemy: move commandline mangling out of common codeManuel Lauss
Not every alchemy-based board might want these options forced on it, and most of this stuff seems to be intended for devboard code anyway. Remove commandline mangling code out of common chip code and instead add relevant sections to all in-tree boards to not change existing behaviour. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: devboards: consolidate filesManuel Lauss
Share some code and merge small files: - Extract the prom init code from all devboard files (they only differ in memory configuration). - Merge the irq configuration into board setup code. - Merge smaller files into board setup code. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/devboards/db1x00/init.c delete mode 100644 arch/mips/alchemy/devboards/pb1000/init.c delete mode 100644 arch/mips/alchemy/devboards/pb1000/irqmap.c delete mode 100644 arch/mips/alchemy/devboards/pb1100/init.c delete mode 100644 arch/mips/alchemy/devboards/pb1100/irqmap.c delete mode 100644 arch/mips/alchemy/devboards/pb1200/init.c delete mode 100644 arch/mips/alchemy/devboards/pb1500/init.c delete mode 100644 arch/mips/alchemy/devboards/pb1500/irqmap.c delete mode 100644 arch/mips/alchemy/devboards/pb1550/init.c delete mode 100644 arch/mips/alchemy/devboards/pb1550/irqmap.c create mode 100644 arch/mips/alchemy/devboards/prom.c
2009-01-11MIPS: Alchemy: Move development board code to common subdirectoryManuel Lauss
This should ease sharing of common devboard code. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON to arch/mips/KconfigDavid Daney
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add defconfig for Cavium OCTEON.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Adjust the dma-common.c platform hooks.David Daney
We add a dev parameter to plat_unmap_dma_mem(), and hooks for plat_dma_supported() and plat_extra_sync_for_device() which should be nop changes for all existing targets. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON slot into proper tlb category.David Daney
Expand the case statement for build_tlb_write_entry so that it does the right thing on Cavium CPU variants. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Compute branch returns for Cavium OCTEON specific branch instructions.David Daney
For Cavium OCTEON, compute the return epc value for OCTEON specific branch instructions. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Cavium OCTEON multiplier state preservation.David Daney
For OCTEON, implement a save and restore of the multiplier state across context switches. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add SMP_ICACHE_FLUSH for the Cavium CPU family.David Daney
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON specific registers to ptrace.h and asm-offsets.cDavid Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON cop2/cvmseg state entries to processor.h.David Daney
Add in the cop2 and cvmseg state info to the known proc reg data for Cavium so that it can be tracked, saved, restored. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Modify core io.h macros to account for the Octeon Errata Core-301.David Daney
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Hook up Cavium OCTEON in arch/mips.David Daney
Take all the OCTEON specific files that were added, and hook them into the build system for the arch/mips. For versions of GCC that lack OCTEON support, override gas target architecture. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Hook Cavium OCTEON cache init into cache.cDavid Daney
Follow precedent of other boards, and hook-up the CPU specific cache init. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON processor constants and CPU probe.David Daney
Add OCTEON constants to asm/cpu.h and asm/module.h. Add probe function for Cavium OCTEON CPUs and hook it up. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Override assembler target architecture for octeon.David Daney
Gas from binutils 2.19 fails to compile some cop1 instructions with -march=octeon. Since the cop1 instructions are present in mips1, use that arch instead. This will be fixed in binutils 2.20. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON specific register definitions to mipsregs.hDavid Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: For Cavium OCTEON set hwrena and lazily restore CP2 state.David Daney
If on Cavium, be aware of cop2 and hwrena during do_cpu(). Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: For Cavium OCTEON handle hazards as per the R10000 handling.David Daney
For Cavium CPU, we treat the same as R10000, in that all hazards are dealt with in hardware. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.David Daney
These are the rest of the new files needed to add OCTEON processor support to the Linux kernel. Other than Makefile and Kconfig which should be obvious, we have: csrc-octeon.c -- Clock source driver for OCTEON. dma-octeon.c -- Helper functions for mapping DMA memory. flash_setup.c -- Register on-board flash with the MTD subsystem. octeon-irq.c -- OCTEON interrupt controller managment. octeon-memcpy.S -- Optimized memcpy() implementation. serial.c -- Register 8250 platform driver and early console. setup.c -- Early architecture initialization. smp.c -- OCTEON SMP support. octeon_switch.S -- Scheduler context switch for OCTEON. c-octeon.c -- OCTEON cache controller support. cex-oct.S -- OCTEON cache exception handler. asm/mach-cavium-octeon/*.h -- Architecture include files. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/cavium-octeon/Kconfig create mode 100644 arch/mips/cavium-octeon/Makefile create mode 100644 arch/mips/cavium-octeon/csrc-octeon.c create mode 100644 arch/mips/cavium-octeon/dma-octeon.c create mode 100644 arch/mips/cavium-octeon/flash_setup.c create mode 100644 arch/mips/cavium-octeon/octeon-irq.c create mode 100644 arch/mips/cavium-octeon/octeon-memcpy.S create mode 100644 arch/mips/cavium-octeon/serial.c create mode 100644 arch/mips/cavium-octeon/setup.c create mode 100644 arch/mips/cavium-octeon/smp.c create mode 100644 arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/irq.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h create mode 100644 arch/mips/include/asm/mach-cavium-octeon/war.h create mode 100644 arch/mips/include/asm/octeon/octeon.h create mode 100644 arch/mips/kernel/octeon_switch.S create mode 100644 arch/mips/mm/c-octeon.c create mode 100644 arch/mips/mm/cex-oct.S
2009-01-11MIPS: Add Cavium OCTEON processor support files to ↵David Daney
arch/mips/cavium-octeon/executive and asm/octeon. These files are used to coordinate resource sharing between all of the programs running on the OCTEON SOC. The OCTEON processor has many CPU cores (current parts have up to 16, but more are possible). It also has a variety of on-chip hardware blocks for things like network acceleration, encryption and RAID. One typical configuration is to run Linux on several of the CPU cores, and other dedicated applications on the other cores. Resource allocation between the various programs running on the system (Linux kernel and other dedicated applications) needs to be coordinated. The code we use to do this we call the 'executive'. All of this resource allocation and sharing code is gathered together in the executive directory. Included in the patch set are the following files: cvmx-bootmem.c and cvmx-sysinfo.c -- Coordinate memory allocation. All memory used by the Linux kernel is obtained here at boot time. cvmx-l2c.c -- Coordinates operations on the shared level 2 cache. octeon-model.c -- Probes chip capabilities and version. The corresponding headers are in asm/octeon. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 arch/mips/cavium-octeon/executive/Makefile create mode 100644 arch/mips/cavium-octeon/executive/cvmx-bootmem.c create mode 100644 arch/mips/cavium-octeon/executive/cvmx-l2c.c create mode 100644 arch/mips/cavium-octeon/executive/cvmx-sysinfo.c create mode 100644 arch/mips/cavium-octeon/executive/octeon-model.c create mode 100644 arch/mips/include/asm/octeon/cvmx-asm.h create mode 100644 arch/mips/include/asm/octeon/cvmx-bootinfo.h create mode 100644 arch/mips/include/asm/octeon/cvmx-bootmem.h create mode 100644 arch/mips/include/asm/octeon/cvmx-l2c.h create mode 100644 arch/mips/include/asm/octeon/cvmx-packet.h create mode 100644 arch/mips/include/asm/octeon/cvmx-spinlock.h create mode 100644 arch/mips/include/asm/octeon/cvmx-sysinfo.h create mode 100644 arch/mips/include/asm/octeon/cvmx.h create mode 100644 arch/mips/include/asm/octeon/octeon-feature.h create mode 100644 arch/mips/include/asm/octeon/octeon-model.h
2009-01-11MIPS: Add Cavium OCTEON processor CSR definitionsDavid Daney
Here we define the addresses and bit-fields of the Configuration and Status Registers (CSRs) for some of the hardware functional units on the OCTEON SOC. Definitions are needed for: CIU -- Central Interrupt Unit. GPIO -- General Purpose Input Output. IOB -- Input / Output {Busing,Bridge}. IPD -- Input Packet Data unit. L2C -- Level-2 Cache controller. L2D -- Level-2 Data cache. L2T -- Level-2 cache Tag. LED -- Light Emitting Diode controller. MIO -- Miscellaneous Input / Output. POW -- Packet Order / Work unit. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Alchemy: Change strict_strtol to strict_strtoulJulia Lawall
Since memsize is unsigned, it would seem better to use strict_strtoul that strict_strtol. A simplified version of the semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @s2@ long e; position p; @@ strict_strtol@p(...,&e) @@ position p != s2.p; type T; T e; @@ - strict_strtol@p + strict_strtoul (...,&e) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: 64-bit: Use generic 32-bit ptrace compat code.Anirban Sinha
Signed-off-by: Anirban Sinha <asinha@zeugmasystems.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-10Linux 2.6.29-rc1v2.6.29-rc1Linus Torvalds
2009-01-10bootgraph: make the bootgraph script show async waiting timeArjan van de Ven
It is useful for diagnosing boot performance to see where async function calls are waiting on serialization... this patch adds this functionality to the bootgraph.pl script. The waiting time is shown as a half transparent, gray bar through the block that is waiting. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-10libata: only ports >= 0 need to synchronizeArjan van de Ven
In a discussio with Jeff Garzik, he mentioned that the serialization for the libata port probes only needs to be within the domain of a host. This means that for the first port of each host (with ID 0), we don't need to wait, so we can relax our serialization a little. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-10libata: Add a per-host flag to opt-in into parallel port probesArjan van de Ven
This patch adds a per host flag that allows drivers to opt in into having its busses scanned in parallel. Drivers that do not set this flag get their ports scanned in the "original" sequence. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-10Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (36 commits) x86: fix section mismatch warnings in mcheck/mce_amd_64.c x86: offer frame pointers in all build modes x86: remove duplicated #include's x86: k8 numa register active regions later x86: update Alan Cox's email addresses x86: rename all fields of mpc_table mpc_X to X x86: rename all fields of mpc_oemtable oem_X to X x86: rename all fields of mpc_bus mpc_X to X x86: rename all fields of mpc_cpu mpc_X to X x86: rename all fields of mpc_intsrc mpc_X to X x86: rename all fields of mpc_lintsrc mpc_X to X x86: rename all fields of mpc_iopic mpc_X to X x86: irqinit_64.c init_ISA_irqs should be static Documentation/x86/boot.txt: payload length was changed to payload_length x86: setup_percpu.c fix style problems x86: irqinit_64.c fix style problems x86: irqinit_32.c fix style problems x86: i8259.c fix style problems x86: irq_32.c fix style problems x86: ioport.c fix style problems ...
2009-01-10Merge branch 'cpus4096-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'cpus4096-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: [IA64] fix typo in cpumask_of_pcibus() x86: fix x86_32 builds for summit and es7000 arch's cpumask: use work_on_cpu in acpi-cpufreq.c for read_measured_perf_ctrs cpumask: use work_on_cpu in acpi-cpufreq.c for drv_read and drv_write cpumask: use cpumask_var_t in acpi-cpufreq.c cpumask: use work_on_cpu in acpi/cstate.c cpumask: convert struct cpufreq_policy to cpumask_var_t cpumask: replace CPUMASK_ALLOC etc with cpumask_var_t x86: cleanup remaining cpumask_t ops in smpboot code cpumask: update pci_bus_show_cpuaffinity to use new cpumask API cpumask: update local_cpus_show to use new cpumask API ia64: cpumask fix for is_affinity_mask_valid()
2009-01-10btrfs: fix for write_super_lockfs/unlockfs error handlingLinus Torvalds
Commit c4be0c1dc4cdc37b175579be1460f15ac6495e9a added the ability for write_super_lockfs to return errors, and renamed them to match. But btrfs didn't get converted. Do the minimal conversion to make it compile again. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-10rbtree: add const qualifier to some functionsArtem Bityutskiy
The 'rb_first()', 'rb_last()', 'rb_next()' and 'rb_prev()' calls take a pointer to an RB node or RB root. They do not change the pointed objects, so add a 'const' qualifier in order to make life of the users of these functions easier. Indeed, if I have my own constant pointer &const struct my_type *p, and I call 'rb_next(&p->rb)', I get a GCC warning: warning: passing argument 1 of ‘rb_next’ discards qualifiers from pointer target type Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-09LIS3LV02D: separate the core from HP ACPI APIEric Piel
The sensor can be accessed via various buses. In particular, SPI, I²C and, on HP laptops, via a specific ACPI API (the only one currently supported). Separate this latest platform from the core of the sensor driver to allow support for the other bus type. The second, and more direct goal is actually to be able to merge this part with the hp-disk-leds driver, which has the same ACPI PNP number. Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Eric Piel <eric.piel@tremplin-utc.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-09filesystem freeze: remove XFS specific ioctl interfaces for freeze featureTakashi Sato
It removes XFS specific ioctl interfaces and request codes for freeze feature. This patch has been supplied by David Chinner. Signed-off-by: Dave Chinner <dgc@sgi.com> Signed-off-by: Takashi Sato <t-sato@yk.jp.nec.com> Cc: Dave Chinner <david@fromorbit.com> Cc: <xfs-masters@oss.sgi.com> Cc: <linux-ext4@vger.kernel.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Dave Kleikamp <shaggy@austin.ibm.com> Cc: Alasdair G Kergon <agk@redhat.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-09filesystem freeze: implement generic freeze featureTakashi Sato
The ioctls for the generic freeze feature are below. o Freeze the filesystem int ioctl(int fd, int FIFREEZE, arg) fd: The file descriptor of the mountpoint FIFREEZE: request code for the freeze arg: Ignored Return value: 0 if the operation succeeds. Otherwise, -1 o Unfreeze the filesystem int ioctl(int fd, int FITHAW, arg) fd: The file descriptor of the mountpoint FITHAW: request code for unfreeze arg: Ignored Return value: 0 if the operation succeeds. Otherwise, -1 Error number: If the filesystem has already been unfrozen, errno is set to EINVAL. [akpm@linux-foundation.org: fix CONFIG_BLOCK=n] Signed-off-by: Takashi Sato <t-sato@yk.jp.nec.com> Signed-off-by: Masayuki Hamaguchi <m-hamaguchi@ys.jp.nec.com> Cc: <xfs-masters@oss.sgi.com> Cc: <linux-ext4@vger.kernel.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Dave Kleikamp <shaggy@austin.ibm.com> Cc: Dave Chinner <david@fromorbit.com> Cc: Alasdair G Kergon <agk@redhat.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-09filesystem freeze: add error handling of write_super_lockfs/unlockfsTakashi Sato
Currently, ext3 in mainline Linux doesn't have the freeze feature which suspends write requests. So, we cannot take a backup which keeps the filesystem's consistency with the storage device's features (snapshot and replication) while it is mounted. In many case, a commercial filesystem (e.g. VxFS) has the freeze feature and it would be used to get the consistent backup. If Linux's standard filesystem ext3 has the freeze feature, we can do it without a commercial filesystem. So I have implemented the ioctls of the freeze feature. I think we can take the consistent backup with the following steps. 1. Freeze the filesystem with the freeze ioctl. 2. Separate the replication volume or create the snapshot with the storage device's feature. 3. Unfreeze the filesystem with the unfreeze ioctl. 4. Take the backup from the separated replication volume or the snapshot. This patch: VFS: Changed the type of write_super_lockfs and unlockfs from "void" to "int" so that they can return an error. Rename write_super_lockfs and unlockfs of the super block operation freeze_fs and unfreeze_fs to avoid a confusion. ext3, ext4, xfs, gfs2, jfs: Changed the type of write_super_lockfs and unlockfs from "void" to "int" so that write_super_lockfs returns an error if needed, and unlockfs always returns 0. reiserfs: Changed the type of write_super_lockfs and unlockfs from "void" to "int" so that they always return 0 (success) to keep a current behavior. Signed-off-by: Takashi Sato <t-sato@yk.jp.nec.com> Signed-off-by: Masayuki Hamaguchi <m-hamaguchi@ys.jp.nec.com> Cc: <xfs-masters@oss.sgi.com> Cc: <linux-ext4@vger.kernel.org> Cc: Christoph Hellwig <hch@lst.de> Cc: Dave Kleikamp <shaggy@austin.ibm.com> Cc: Dave Chinner <david@fromorbit.com> Cc: Alasdair G Kergon <agk@redhat.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-09memstick: annotate endianness of attribute structsHarvey Harrison
The code was shifting the endianness appropriately everywhere, annotate the structs to avoid the sparse warnings when assigning the endian types to the struct members, or passing them to be[16|32]_to_cpu: drivers/memstick/core/mspro_block.c:331:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:333:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:335:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:337:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:341:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:347:4: warning: cast to restricted __be32 drivers/memstick/core/mspro_block.c:356:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:358:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:364:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:367:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:369:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:371:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:377:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:478:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:480:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:482:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:484:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:486:4: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:689:22: expected unsigned int [unsigned] [assigned] data_address drivers/memstick/core/mspro_block.c:689:22: got restricted __be32 [usertype] <noident> drivers/memstick/core/mspro_block.c:697:3: warning: cast to restricted __be32 drivers/memstick/core/mspro_block.c:960:17: warning: incorrect type in initializer (different base types) drivers/memstick/core/mspro_block.c:960:17: expected unsigned short [unsigned] data_count drivers/memstick/core/mspro_block.c:960:17: got restricted __be16 [usertype] <noident> drivers/memstick/core/mspro_block.c:993:6: warning: cast to restricted __be16 drivers/memstick/core/mspro_block.c:995:28: warning: cast to restricted __be16 Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Cc: Alex Dubov <oakad@yahoo.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-01-09hp-wmi: handle rfkill_register() failureLarry Finger
Compilation of the HP WMI hotkeys code results in the following: CC [M] drivers/platform/x86/hp-wmi.o drivers/platform/x86/hp-wmi.c: In function hp_wmi_bios_setup: drivers/platform/x86/hp-wmi.c:431: warning: ignoring return value of rfkill_register, declared with attribute warn_unused_result drivers/platform/x86/hp-wmi.c:441: warning: ignoring return value of rfkill_register, declared with attribute warn_unused_result drivers/platform/x86/hp-wmi.c:450: warning: ignoring return value of rfkill_register, declared with attribute warn_unused_result Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Cc: Matthew Garrett <mjg59@srcf.ucam.org> Cc: Len Brown <lenb@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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