diff options
Diffstat (limited to 'include')
52 files changed, 419 insertions, 174 deletions
diff --git a/include/asm-arm/arch-pxa/ssp.h b/include/asm-arm/arch-pxa/ssp.h index 949878c0d90..ea200551a75 100644 --- a/include/asm-arm/arch-pxa/ssp.h +++ b/include/asm-arm/arch-pxa/ssp.h @@ -40,8 +40,8 @@ struct ssp_dev { }; int ssp_write_word(struct ssp_dev *dev, u32 data); -int ssp_read_word(struct ssp_dev *dev); -void ssp_flush(struct ssp_dev *dev); +int ssp_read_word(struct ssp_dev *dev, u32 *data); +int ssp_flush(struct ssp_dev *dev); void ssp_enable(struct ssp_dev *dev); void ssp_disable(struct ssp_dev *dev); void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp); diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 72964f9b841..7463fd5252c 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -104,6 +104,7 @@ enum s3c2410_chan_op_e { S3C2410_DMAOP_RESUME, S3C2410_DMAOP_FLUSH, S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ + S3C2410_DMAOP_STARTED, /* indicate channel started */ }; typedef enum s3c2410_chan_op_e s3c2410_chan_op_t; diff --git a/include/asm-arm/arch-s3c2410/regs-rtc.h b/include/asm-arm/arch-s3c2410/regs-rtc.h index 228983f89bc..0fbec07bb6b 100644 --- a/include/asm-arm/arch-s3c2410/regs-rtc.h +++ b/include/asm-arm/arch-s3c2410/regs-rtc.h @@ -18,7 +18,7 @@ #ifndef __ASM_ARCH_REGS_RTC_H #define __ASM_ARCH_REGS_RTC_H __FILE__ -#define S3C2410_RTCREG(x) ((x) + S3C24XX_VA_RTC) +#define S3C2410_RTCREG(x) (x) #define S3C2410_RTCCON S3C2410_RTCREG(0x40) #define S3C2410_RTCCON_RTCEN (1<<0) diff --git a/include/asm-arm/hardware/ssp.h b/include/asm-arm/hardware/ssp.h index 28aa11b769c..3b42e181997 100644 --- a/include/asm-arm/hardware/ssp.h +++ b/include/asm-arm/hardware/ssp.h @@ -16,8 +16,8 @@ struct ssp_state { }; int ssp_write_word(u16 data); -int ssp_read_word(void); -void ssp_flush(void); +int ssp_read_word(u16 *data); +int ssp_flush(void); void ssp_enable(void); void ssp_disable(void); void ssp_save_state(struct ssp_state *ssp); diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h index b3479fc1cc8..bf7b9dea30f 100644 --- a/include/asm-arm/io.h +++ b/include/asm-arm/io.h @@ -291,5 +291,12 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); */ #define xlate_dev_kmem_ptr(p) p +/* + * Register ISA memory and port locations for glibc iopl/inb/outb + * emulation. + */ +extern void register_isa_ports(unsigned int mmio, unsigned int io, + unsigned int io_shift); + #endif /* __KERNEL__ */ #endif /* __ASM_ARM_IO_H */ diff --git a/include/asm-arm/procinfo.h b/include/asm-arm/procinfo.h index edb7b6502fc..91a31adfa8a 100644 --- a/include/asm-arm/procinfo.h +++ b/include/asm-arm/procinfo.h @@ -55,5 +55,6 @@ extern unsigned int elf_hwcap; #define HWCAP_VFP 64 #define HWCAP_EDSP 128 #define HWCAP_JAVA 256 +#define HWCAP_IWMMXT 512 #endif diff --git a/include/asm-i386/alternative.h b/include/asm-i386/alternative.h index 96adbabec74..b01a7ec409c 100644 --- a/include/asm-i386/alternative.h +++ b/include/asm-i386/alternative.h @@ -88,9 +88,6 @@ static inline void alternatives_smp_switch(int smp) {} /* * Alternative inline assembly for SMP. * - * alternative_smp() takes two versions (SMP first, UP second) and is - * for more complex stuff such as spinlocks. - * * The LOCK_PREFIX macro defined here replaces the LOCK and * LOCK_PREFIX macros used everywhere in the source tree. * @@ -110,21 +107,6 @@ static inline void alternatives_smp_switch(int smp) {} */ #ifdef CONFIG_SMP -#define alternative_smp(smpinstr, upinstr, args...) \ - asm volatile ("661:\n\t" smpinstr "\n662:\n" \ - ".section .smp_altinstructions,\"a\"\n" \ - " .align 4\n" \ - " .long 661b\n" /* label */ \ - " .long 663f\n" /* new instruction */ \ - " .byte 0x68\n" /* X86_FEATURE_UP */ \ - " .byte 662b-661b\n" /* sourcelen */ \ - " .byte 664f-663f\n" /* replacementlen */ \ - ".previous\n" \ - ".section .smp_altinstr_replacement,\"awx\"\n" \ - "663:\n\t" upinstr "\n" /* replacement */ \ - "664:\n\t.fill 662b-661b,1,0x42\n" /* space for original */ \ - ".previous" : args) - #define LOCK_PREFIX \ ".section .smp_locks,\"a\"\n" \ " .align 4\n" \ @@ -133,8 +115,6 @@ static inline void alternatives_smp_switch(int smp) {} "661:\n\tlock; " #else /* ! CONFIG_SMP */ -#define alternative_smp(smpinstr, upinstr, args...) \ - asm volatile (upinstr : args) #define LOCK_PREFIX "" #endif diff --git a/include/asm-i386/mmzone.h b/include/asm-i386/mmzone.h index e33e9f9e4c6..22cb07cc8f3 100644 --- a/include/asm-i386/mmzone.h +++ b/include/asm-i386/mmzone.h @@ -14,7 +14,7 @@ extern struct pglist_data *node_data[]; #ifdef CONFIG_X86_NUMAQ #include <asm/numaq.h> -#else /* summit or generic arch */ +#elif defined(CONFIG_ACPI_SRAT)/* summit or generic arch */ #include <asm/srat.h> #endif diff --git a/include/asm-i386/rwlock.h b/include/asm-i386/rwlock.h index 96b0bef2ea5..3ac1ba98b1b 100644 --- a/include/asm-i386/rwlock.h +++ b/include/asm-i386/rwlock.h @@ -21,22 +21,20 @@ #define RW_LOCK_BIAS_STR "0x01000000" #define __build_read_lock_ptr(rw, helper) \ - alternative_smp("lock; subl $1,(%0)\n\t" \ + asm volatile(LOCK_PREFIX " ; subl $1,(%0)\n\t" \ "jns 1f\n" \ "call " helper "\n\t" \ - "1:\n", \ - "subl $1,(%0)\n\t", \ + "1:\n" \ :"a" (rw) : "memory") #define __build_read_lock_const(rw, helper) \ - alternative_smp("lock; subl $1,%0\n\t" \ + asm volatile(LOCK_PREFIX " ; subl $1,%0\n\t" \ "jns 1f\n" \ "pushl %%eax\n\t" \ "leal %0,%%eax\n\t" \ "call " helper "\n\t" \ "popl %%eax\n\t" \ - "1:\n", \ - "subl $1,%0\n\t", \ + "1:\n" : \ "+m" (*(volatile int *)rw) : : "memory") #define __build_read_lock(rw, helper) do { \ @@ -47,7 +45,7 @@ } while (0) #define __build_write_lock_ptr(rw, helper) \ - alternative_smp("lock; subl $" RW_LOCK_BIAS_STR ",(%0)\n\t" \ + asm volatile(LOCK_PREFIX " ; subl $" RW_LOCK_BIAS_STR ",(%0)\n\t" \ "jz 1f\n" \ "call " helper "\n\t" \ "1:\n", \ @@ -55,7 +53,7 @@ :"a" (rw) : "memory") #define __build_write_lock_const(rw, helper) \ - alternative_smp("lock; subl $" RW_LOCK_BIAS_STR ",%0\n\t" \ + asm volatile(LOCK_PREFIX " ; subl $" RW_LOCK_BIAS_STR ",%0\n\t" \ "jz 1f\n" \ "pushl %%eax\n\t" \ "leal %0,%%eax\n\t" \ diff --git a/include/asm-i386/spinlock.h b/include/asm-i386/spinlock.h index d816c62a7a1..d1020363c41 100644 --- a/include/asm-i386/spinlock.h +++ b/include/asm-i386/spinlock.h @@ -22,7 +22,7 @@ #define __raw_spin_lock_string \ "\n1:\t" \ - "lock ; decb %0\n\t" \ + LOCK_PREFIX " ; decb %0\n\t" \ "jns 3f\n" \ "2:\t" \ "rep;nop\n\t" \ @@ -38,7 +38,7 @@ */ #define __raw_spin_lock_string_flags \ "\n1:\t" \ - "lock ; decb %0\n\t" \ + LOCK_PREFIX " ; decb %0\n\t" \ "jns 5f\n" \ "2:\t" \ "testl $0x200, %1\n\t" \ @@ -57,15 +57,9 @@ "jmp 4b\n" \ "5:\n\t" -#define __raw_spin_lock_string_up \ - "\n\tdecb %0" - static inline void __raw_spin_lock(raw_spinlock_t *lock) { - alternative_smp( - __raw_spin_lock_string, - __raw_spin_lock_string_up, - "+m" (lock->slock) : : "memory"); + asm(__raw_spin_lock_string : "+m" (lock->slock) : : "memory"); } /* @@ -76,10 +70,7 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) #ifndef CONFIG_PROVE_LOCKING static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) { - alternative_smp( - __raw_spin_lock_string_flags, - __raw_spin_lock_string_up, - "+m" (lock->slock) : "r" (flags) : "memory"); + asm(__raw_spin_lock_string_flags : "+m" (lock->slock) : "r" (flags) : "memory"); } #endif diff --git a/include/asm-i386/unistd.h b/include/asm-i386/unistd.h index fc1c8ddae14..d983b74e4d9 100644 --- a/include/asm-i386/unistd.h +++ b/include/asm-i386/unistd.h @@ -324,8 +324,6 @@ #define __NR_vmsplice 316 #define __NR_move_pages 317 -#ifdef __KERNEL__ - #define NR_syscalls 318 /* @@ -425,6 +423,8 @@ __asm__ volatile ("push %%ebp ; push %%ebx ; movl 4(%2),%%ebp ; " \ __syscall_return(type,__res); \ } +#ifdef __KERNEL__ + #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_STAT diff --git a/include/asm-i386/unwind.h b/include/asm-i386/unwind.h index 69f0f1df672..4c1a0b96856 100644 --- a/include/asm-i386/unwind.h +++ b/include/asm-i386/unwind.h @@ -87,6 +87,7 @@ static inline int arch_unw_user_mode(const struct unwind_frame_info *info) #else #define UNW_PC(frame) ((void)(frame), 0) +#define UNW_SP(frame) ((void)(frame), 0) static inline int arch_unw_user_mode(const void *info) { diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h index 8f7fd5cfec3..11cbdf81fd2 100644 --- a/include/asm-powerpc/kexec.h +++ b/include/asm-powerpc/kexec.h @@ -32,6 +32,7 @@ #endif #ifndef __ASSEMBLY__ +#include <linux/cpumask.h> #ifdef CONFIG_KEXEC @@ -109,7 +110,6 @@ static inline void crash_setup_regs(struct pt_regs *newregs, #define MAX_NOTE_BYTES 1024 -#ifdef __powerpc64__ extern void kexec_smp_wait(void); /* get and clear naca physid, wait for master to copy new code to 0 */ extern int crashing_cpu; @@ -119,7 +119,6 @@ static inline int kexec_sr_activated(int cpu) { return cpu_isset(cpu,cpus_in_sr); } -#endif /* __powerpc64 __ */ struct kimage; struct pt_regs; diff --git a/include/asm-powerpc/pgalloc.h b/include/asm-powerpc/pgalloc.h index 9f0917c6865..ae63db7b3e7 100644 --- a/include/asm-powerpc/pgalloc.h +++ b/include/asm-powerpc/pgalloc.h @@ -117,7 +117,7 @@ static inline void pte_free(struct page *ptepage) pte_free_kernel(page_address(ptepage)); } -#define PGF_CACHENUM_MASK 0xf +#define PGF_CACHENUM_MASK 0x3 typedef struct pgtable_free { unsigned long val; diff --git a/include/asm-powerpc/rtas.h b/include/asm-powerpc/rtas.h index a33c6acffa6..82a27e9a041 100644 --- a/include/asm-powerpc/rtas.h +++ b/include/asm-powerpc/rtas.h @@ -170,6 +170,7 @@ extern int rtas_get_sensor(int sensor, int index, int *state); extern int rtas_get_power_level(int powerdomain, int *level); extern int rtas_set_power_level(int powerdomain, int level, int *setlevel); extern int rtas_set_indicator(int indicator, int index, int new_value); +extern int rtas_set_indicator_fast(int indicator, int index, int new_value); extern void rtas_progress(char *s, unsigned short hex); extern void rtas_initialize(void); diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index 7307aa77567..4c9f5229e83 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h @@ -53,6 +53,15 @@ #define smp_read_barrier_depends() do { } while(0) #endif /* CONFIG_SMP */ +/* + * This is a barrier which prevents following instructions from being + * started until the value of the argument x is known. For example, if + * x is a variable loaded from memory, this prevents following + * instructions from being executed until the load has been performed. + */ +#define data_barrier(x) \ + asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory"); + struct task_struct; struct pt_regs; diff --git a/include/asm-powerpc/tsi108.h b/include/asm-powerpc/tsi108.h index c4c278d72f7..2c702d35a7c 100644 --- a/include/asm-powerpc/tsi108.h +++ b/include/asm-powerpc/tsi108.h @@ -1,16 +1,18 @@ /* - * include/asm-ppc/tsi108.h - * * common routine and memory layout for Tundra TSI108(Grendel) host bridge * memory controller. * * Author: Jacob Pan (jacob.pan@freescale.com) * Alex Bounine (alexandreb@tundra.com) - * 2004 (c) Freescale Semiconductor Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. + * + * Copyright 2004-2006 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. */ + #ifndef __PPC_KERNEL_TSI108_H #define __PPC_KERNEL_TSI108_H diff --git a/include/asm-powerpc/tsi108_irq.h b/include/asm-powerpc/tsi108_irq.h new file mode 100644 index 00000000000..3e4d04effa5 --- /dev/null +++ b/include/asm-powerpc/tsi108_irq.h @@ -0,0 +1,124 @@ +/* + * (C) Copyright 2005 Tundra Semiconductor Corp. + * Alex Bounine, <alexandreb at tundra.com). + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * definitions for interrupt controller initialization and external interrupt + * demultiplexing on TSI108EMU/SVB boards. + */ + +#ifndef _ASM_PPC_TSI108_IRQ_H +#define _ASM_PPC_TSI108_IRQ_H + +/* + * Tsi108 interrupts + */ +#ifndef TSI108_IRQ_REG_BASE +#define TSI108_IRQ_REG_BASE 0 +#endif + +#define TSI108_IRQ(x) (TSI108_IRQ_REG_BASE + (x)) + +#define TSI108_MAX_VECTORS (36 + 4) /* 36 sources + PCI INT demux */ +#define MAX_TASK_PRIO 0xF + +#define TSI108_IRQ_SPURIOUS (TSI108_MAX_VECTORS) + +#define DEFAULT_PRIO_LVL 10 /* initial priority level */ + +/* Interrupt vectors assignment to external and internal + * sources of requests. */ + +/* EXTERNAL INTERRUPT SOURCES */ + +#define IRQ_TSI108_EXT_INT0 TSI108_IRQ(0) /* External Source at INT[0] */ +#define IRQ_TSI108_EXT_INT1 TSI108_IRQ(1) /* External Source at INT[1] */ +#define IRQ_TSI108_EXT_INT2 TSI108_IRQ(2) /* External Source at INT[2] */ +#define IRQ_TSI108_EXT_INT3 TSI108_IRQ(3) /* External Source at INT[3] */ + +/* INTERNAL INTERRUPT SOURCES */ + +#define IRQ_TSI108_RESERVED0 TSI108_IRQ(4) /* Reserved IRQ */ +#define IRQ_TSI108_RESERVED1 TSI108_IRQ(5) /* Reserved IRQ */ +#define IRQ_TSI108_RESERVED2 TSI108_IRQ(6) /* Reserved IRQ */ +#define IRQ_TSI108_RESERVED3 TSI108_IRQ(7) /* Reserved IRQ */ +#define IRQ_TSI108_DMA0 TSI108_IRQ(8) /* DMA0 */ +#define IRQ_TSI108_DMA1 TSI108_IRQ(9) /* DMA1 */ +#define IRQ_TSI108_DMA2 TSI108_IRQ(10) /* DMA2 */ +#define IRQ_TSI108_DMA3 TSI108_IRQ(11) /* DMA3 */ +#define IRQ_TSI108_UART0 TSI108_IRQ(12) /* UART0 */ +#define IRQ_TSI108_UART1 TSI108_IRQ(13) /* UART1 */ +#define IRQ_TSI108_I2C TSI108_IRQ(14) /* I2C */ +#define IRQ_TSI108_GPIO TSI108_IRQ(15) /* GPIO */ +#define IRQ_TSI108_GIGE0 TSI108_IRQ(16) /* GIGE0 */ +#define IRQ_TSI108_GIGE1 TSI108_IRQ(17) /* GIGE1 */ +#define IRQ_TSI108_RESERVED4 TSI108_IRQ(18) /* Reserved IRQ */ +#define IRQ_TSI108_HLP TSI108_IRQ(19) /* HLP */ +#define IRQ_TSI108_SDRAM TSI108_IRQ(20) /* SDC */ +#define IRQ_TSI108_PROC_IF TSI108_IRQ(21) /* Processor IF */ +#define IRQ_TSI108_RESERVED5 TSI108_IRQ(22) /* Reserved IRQ */ +#define IRQ_TSI108_PCI TSI108_IRQ(23) /* PCI/X block */ + +#define IRQ_TSI108_MBOX0 TSI108_IRQ(24) /* Mailbox 0 register */ +#define IRQ_TSI108_MBOX1 TSI108_IRQ(25) /* Mailbox 1 register */ +#define IRQ_TSI108_MBOX2 TSI108_IRQ(26) /* Mailbox 2 register */ +#define IRQ_TSI108_MBOX3 TSI108_IRQ(27) /* Mailbox 3 register */ + +#define IRQ_TSI108_DBELL0 TSI108_IRQ(28) /* Doorbell 0 */ +#define IRQ_TSI108_DBELL1 TSI108_IRQ(29) /* Doorbell 1 */ +#define IRQ_TSI108_DBELL2 TSI108_IRQ(30) /* Doorbell 2 */ +#define IRQ_TSI108_DBELL3 TSI108_IRQ(31) /* Doorbell 3 */ + +#define IRQ_TSI108_TIMER0 TSI108_IRQ(32) /* Global Timer 0 */ +#define IRQ_TSI108_TIMER1 TSI108_IRQ(33) /* Global Timer 1 */ +#define IRQ_TSI108_TIMER2 TSI108_IRQ(34) /* Global Timer 2 */ +#define IRQ_TSI108_TIMER3 TSI108_IRQ(35) /* Global Timer 3 */ + +/* + * PCI bus INTA# - INTD# lines demultiplexor + */ +#define IRQ_PCI_INTAD_BASE TSI108_IRQ(36) +#define IRQ_PCI_INTA (IRQ_PCI_INTAD_BASE + 0) +#define IRQ_PCI_INTB (IRQ_PCI_INTAD_BASE + 1) +#define IRQ_PCI_INTC (IRQ_PCI_INTAD_BASE + 2) +#define IRQ_PCI_INTD (IRQ_PCI_INTAD_BASE + 3) +#define NUM_PCI_IRQS (4) + +/* number of entries in vector dispatch table */ +#define IRQ_TSI108_TAB_SIZE (TSI108_MAX_VECTORS + 1) + +/* Mapping of MPIC outputs to processors' interrupt pins */ + +#define IDIR_INT_OUT0 0x1 +#define IDIR_INT_OUT1 0x2 +#define IDIR_INT_OUT2 0x4 +#define IDIR_INT_OUT3 0x8 + +/*--------------------------------------------------------------- + * IRQ line configuration parameters */ + +/* Interrupt delivery modes */ +typedef enum { + TSI108_IRQ_DIRECTED, + TSI108_IRQ_DISTRIBUTED, +} TSI108_IRQ_MODE; +#endif /* _ASM_PPC_TSI108_IRQ_H */ diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index c70344b9104..f6a7ff04ffe 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h @@ -1093,5 +1093,100 @@ typedef struct im_idma { #define FCC_PSMR_RMII ((uint)0x00020000) /* Use RMII interface */ +/* FCC iop & clock configuration. BSP code is responsible to define Fx_RXCLK & Fx_TXCLK + * in order to use clock-computing stuff below for the FCC x + */ + +/* Automatically generates register configurations */ +#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */ + +#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */ +#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */ +#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */ +#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */ +#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */ +#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */ + +#define PC_F1RXCLK PC_CLK(F1_RXCLK) +#define PC_F1TXCLK PC_CLK(F1_TXCLK) +#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK)) +#define CMX1_CLK_MASK ((uint)0xff000000) + +#define PC_F2RXCLK PC_CLK(F2_RXCLK) +#define PC_F2TXCLK PC_CLK(F2_TXCLK) +#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK)) +#define CMX2_CLK_MASK ((uint)0x00ff0000) + +#define PC_F3RXCLK PC_CLK(F3_RXCLK) +#define PC_F3TXCLK PC_CLK(F3_TXCLK) +#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK)) +#define CMX3_CLK_MASK ((uint)0x0000ff00) + +#define CPMUX_CLK_MASK (CMX3_CLK_MASK | CMX2_CLK_MASK) +#define CPMUX_CLK_ROUTE (CMX3_CLK_ROUTE | CMX2_CLK_ROUTE) + +#define CLK_TRX (PC_F3TXCLK | PC_F3RXCLK | PC_F2TXCLK | PC_F2RXCLK) + +/* I/O Pin assignment for FCC1. I don't yet know the best way to do this, + * but there is little variation among the choices. + */ +#define PA1_COL 0x00000001U +#define PA1_CRS 0x00000002U +#define PA1_TXER 0x00000004U +#define PA1_TXEN 0x00000008U +#define PA1_RXDV 0x00000010U +#define PA1_RXER 0x00000020U +#define PA1_TXDAT 0x00003c00U +#define PA1_RXDAT 0x0003c000U +#define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT) +#define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \ + PA1_RXDV | PA1_RXER) +#define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV) +#define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER) + + +/* I/O Pin assignment for FCC2. I don't yet know the best way to do this, + * but there is little variation among the choices. + */ +#define PB2_TXER 0x00000001U +#define PB2_RXDV 0x00000002U +#define PB2_TXEN 0x00000004U +#define PB2_RXER 0x00000008U +#define PB2_COL 0x00000010U +#define PB2_CRS 0x00000020U +#define PB2_TXDAT 0x000003c0U +#define PB2_RXDAT 0x00003c00U +#define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \ |