diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/ssb/ssb.h | 1 | ||||
| -rw-r--r-- | include/linux/ssb/ssb_driver_chipcommon.h | 2 | ||||
| -rw-r--r-- | include/linux/ssb/ssb_regs.h | 3 |
3 files changed, 5 insertions, 1 deletions
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h index 24f98854736..732ba9af8b8 100644 --- a/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h @@ -306,6 +306,7 @@ struct ssb_bus { u16 chip_id; u16 chip_rev; u16 sprom_size; /* number of words in sprom */ + u16 sprom_offset; u8 chip_package; /* List of devices (cores) on the backplane. */ diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h index 4e27acf0a92..7600f38c5aa 100644 --- a/include/linux/ssb/ssb_driver_chipcommon.h +++ b/include/linux/ssb/ssb_driver_chipcommon.h @@ -46,6 +46,7 @@ #define SSB_PLLTYPE_7 0x00038000 /* 25Mhz, 4 dividers */ #define SSB_CHIPCO_CAP_PCTL 0x00040000 /* Power Control */ #define SSB_CHIPCO_CAP_OTPS 0x00380000 /* OTP size */ +#define SSB_CHIPCO_CAP_SPROM 0x40000000 /* SPROM present */ #define SSB_CHIPCO_CAP_OTPS_SHIFT 19 #define SSB_CHIPCO_CAP_OTPS_BASE 5 #define SSB_CHIPCO_CAP_JTAGM 0x00400000 /* JTAG master present */ @@ -564,6 +565,7 @@ struct ssb_chipcommon_pmu { struct ssb_chipcommon { struct ssb_device *dev; u32 capabilities; + u32 status; /* Fast Powerup Delay constant */ u16 fast_pwrup_delay; struct ssb_chipcommon_pmu pmu; diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h index 9ae9082eaeb..b8be23ce191 100644 --- a/include/linux/ssb/ssb_regs.h +++ b/include/linux/ssb/ssb_regs.h @@ -170,7 +170,8 @@ #define SSB_SPROMSIZE_WORDS_R4 220 #define SSB_SPROMSIZE_BYTES_R123 (SSB_SPROMSIZE_WORDS_R123 * sizeof(u16)) #define SSB_SPROMSIZE_BYTES_R4 (SSB_SPROMSIZE_WORDS_R4 * sizeof(u16)) -#define SSB_SPROM_BASE 0x1000 +#define SSB_SPROM_BASE1 0x1000 +#define SSB_SPROM_BASE31 0x0800 #define SSB_SPROM_REVISION 0x107E #define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */ #define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */ |