34 files changed, 372 insertions, 545 deletions

diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index 688f7f90d93..942b622455b 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -59,11 +59,10 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
  * fallback to the default.
  */
 static inline void __iomem *
-__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align)
+__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
 {
-	extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
 	if((addr < 0x48000000) || (addr > 0x4fffffff))
-		return __ioremap(addr, size, flags, align);
+		return __ioremap(addr, size, flags);
 
 	return (void *)addr;
 }
@@ -71,13 +70,11 @@ __ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned
 static inline void
 __ixp4xx_iounmap(void __iomem *addr)
 {
-	extern void __iounmap(void __iomem *addr);
-
 	if ((u32)addr >= VMALLOC_START)
 		__iounmap(addr);
 }
 
-#define __arch_ioremap(a, s, f, x)	__ixp4xx_ioremap(a, s, f, x)
+#define __arch_ioremap(a, s, f)		__ixp4xx_ioremap(a, s, f)
 #define	__arch_iounmap(a)		__ixp4xx_iounmap(a)
 
 #define	writeb(v, p)			__ixp4xx_writeb(v, p)
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 2e6799632f1..ae69db4a101 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -55,6 +55,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
 #define __raw_readl(a)		(__chk_io_ptr(a), *(volatile unsigned int __force   *)(a))
 
 /*
+ * Architecture ioremap implementation.
+ */
+extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
+extern void __iounmap(void __iomem *addr);
+
+/*
  * Bad read/write accesses...
  */
 extern void __readwrite_bug(const char *fn);
@@ -256,18 +262,15 @@ out:
  * ioremap takes a PCI memory address, as specified in
  * Documentation/IO-mapping.txt.
  */
-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
-extern void __iounmap(void __iomem *addr);
-
 #ifndef __arch_ioremap
-#define ioremap(cookie,size)		__ioremap(cookie,size,0,1)
-#define ioremap_nocache(cookie,size)	__ioremap(cookie,size,0,1)
-#define ioremap_cached(cookie,size)	__ioremap(cookie,size,L_PTE_CACHEABLE,1)
+#define ioremap(cookie,size)		__ioremap(cookie,size,0)
+#define ioremap_nocache(cookie,size)	__ioremap(cookie,size,0)
+#define ioremap_cached(cookie,size)	__ioremap(cookie,size,L_PTE_CACHEABLE)
 #define iounmap(cookie)			__iounmap(cookie)
 #else
-#define ioremap(cookie,size)		__arch_ioremap((cookie),(size),0,1)
-#define ioremap_nocache(cookie,size)	__arch_ioremap((cookie),(size),0,1)
-#define ioremap_cached(cookie,size)	__arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
+#define ioremap(cookie,size)		__arch_ioremap((cookie),(size),0)
+#define ioremap_nocache(cookie,size)	__arch_ioremap((cookie),(size),0)
+#define ioremap_cached(cookie,size)	__arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
 #define iounmap(cookie)			__arch_iounmap(cookie)
 #endif
 
diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h
index a2fdad0138b..064f0f5e8e2 100644
--- a/include/asm-arm/uaccess.h
+++ b/include/asm-arm/uaccess.h
@@ -100,7 +100,6 @@ static inline void set_fs (mm_segment_t fs)
 extern int __get_user_1(void *);
 extern int __get_user_2(void *);
 extern int __get_user_4(void *);
-extern int __get_user_8(void *);
 extern int __get_user_bad(void);
 
 #define __get_user_x(__r2,__p,__e,__s,__i...)				\
@@ -114,7 +113,7 @@ extern int __get_user_bad(void);
 #define get_user(x,p)							\
 	({								\
 		const register typeof(*(p)) __user *__p asm("r0") = (p);\
-		register typeof(*(p)) __r2 asm("r2");			\
+		register unsigned int __r2 asm("r2");			\
 		register int __e asm("r0");				\
 		switch (sizeof(*(__p))) {				\
 		case 1:							\
@@ -126,12 +125,9 @@ extern int __get_user_bad(void);
 		case 4:							\
 	       		__get_user_x(__r2, __p, __e, 4, "lr");		\
 			break;						\
-		case 8:							\
-			__get_user_x(__r2, __p, __e, 8, "lr");		\
-	       		break;						\
 		default: __e = __get_user_bad(); break;			\
 		}							\
-		x = __r2;						\
+		x = (typeof(*(p))) __r2;				\
 		__e;							\
 	})
 
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
index f876bdf2205..b0a30e2c981 100644
--- a/include/asm-parisc/irq.h
+++ b/include/asm-parisc/irq.h
@@ -8,6 +8,7 @@
 #define _ASM_PARISC_IRQ_H
 
 #include <linux/config.h>
+#include <linux/cpumask.h>
 #include <asm/types.h>
 
 #define NO_IRQ		(-1)
@@ -49,10 +50,10 @@ extern int txn_alloc_irq(unsigned int nbits);
 extern int txn_claim_irq(int);
 extern unsigned int txn_alloc_data(unsigned int);
 extern unsigned long txn_alloc_addr(unsigned int);
+extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
 
 extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
-
-extern int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *, void *);
+extern int cpu_check_affinity(unsigned int irq, cpumask_t *dest);
 
 /* soft power switch support (power.c) */
 extern struct tasklet_struct power_tasklet;
diff --git a/include/asm-parisc/smp.h b/include/asm-parisc/smp.h
index 9413f67a540..dbdbd2e9fdf 100644
--- a/include/asm-parisc/smp.h
+++ b/include/asm-parisc/smp.h
@@ -29,6 +29,7 @@ extern cpumask_t cpu_online_map;
 #define cpu_logical_map(cpu)	(cpu)
 
 extern void smp_send_reschedule(int cpu);
+extern void smp_send_all_nop(void);
 
 #endif /* !ASSEMBLY */
 
@@ -53,7 +54,11 @@ extern unsigned long cpu_present_mask;
 
 #define raw_smp_processor_id()	(current_thread_info()->cpu)
 
-#endif /* CONFIG_SMP */
+#else /* CONFIG_SMP */
+
+static inline void smp_send_all_nop(void) { return; }
+
+#endif
 
 #define NO_PROC_ID		0xFF		/* No processor magic marker */
 #define ANY_PROC_ID		0xFF		/* Any processor magic marker */
diff --git a/include/asm-parisc/spinlock.h b/include/asm-parisc/spinlock.h
index 7c3f406a746..16c2ac075fc 100644
--- a/include/asm-parisc/spinlock.h
+++ b/include/asm-parisc/spinlock.h
@@ -11,18 +11,25 @@ static inline int __raw_spin_is_locked(raw_spinlock_t *x)
 	return *a == 0;
 }
 
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
+#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0)
 #define __raw_spin_unlock_wait(x) \
 		do { cpu_relax(); } while (__raw_spin_is_locked(x))
 
-static inline void __raw_spin_lock(raw_spinlock_t *x)
+static inline void __raw_spin_lock_flags(raw_spinlock_t *x,
+					 unsigned long flags)
 {
 	volatile unsigned int *a;
 
 	mb();
 	a = __ldcw_align(x);
 	while (__ldcw(a) == 0)
-		while (*a == 0);
+		while (*a == 0)
+			if (flags & PSW_SM_I) {
+				local_irq_enable();
+				cpu_relax();
+				local_irq_disable();
+			} else
+				cpu_relax();
 	mb();
 }
 
@@ -60,26 +67,20 @@ static inline int __raw_spin_trylock(raw_spinlock_t *x)
 
 static  __inline__ void __raw_read_lock(raw_rwlock_t *rw)
 {
-	unsigned long flags;
-	local_irq_save(flags);
 	__raw_spin_lock(&rw->lock);
 
 	rw->counter++;
 
 	__raw_spin_unlock(&rw->lock);
-	local_irq_restore(flags);
 }
 
 static  __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
 {
-	unsigned long flags;
-	local_irq_save(flags);
 	__raw_spin_lock(&rw->lock);
 
 	rw->counter--;
 
 	__raw_spin_unlock(&rw->lock);
-	local_irq_restore(flags);
 }
 
 /* write_lock is less trivial.  We optimistically grab the lock and check
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index e97aa8d1eff..c9ec39c6fc6 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -12,21 +12,15 @@
  * N class systems, only one PxTLB inter processor broadcast can be
  * active at any one time on the Merced bus.  This tlb purge
  * synchronisation is fairly lightweight and harmless so we activate
- * it on all SMP systems not just the N class. */
-#ifdef CONFIG_SMP
+ * it on all SMP systems not just the N class.  We also need to have
+ * preemption disabled on uniprocessor machines, and spin_lock does that
+ * nicely.
+ */
 extern spinlock_t pa_tlb_lock;
 
 #define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
 #define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
 
-#else
-
-#define purge_tlb_start(x) do { } while(0)
-#define purge_tlb_end(x) do { } while (0)
-
-#endif
-
-
 extern void flush_tlb_all(void);
 
 /*
@@ -88,7 +82,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
 	if (npages >= 512)  /* 2MB of space: arbitrary, should be tuned */
 		flush_tlb_all();
 	else {
-		preempt_disable();
 		mtsp(vma->vm_mm->context,1);
 		purge_tlb_start();
 		if (split_tlb) {
@@ -102,7 +95,6 @@ static inline void flush_tlb_range(struct vm_area_struct *vma,
 				pdtlb(start);
 				start += PAGE_SIZE;
 			}
-		preempt_enable();
 		}
 		purge_tlb_end();
 	}
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 04e2726002c..d1cfa3f515e 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -90,6 +90,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_NEED_COHERENT		ASM_CONST(0x0000000000020000)
 #define CPU_FTR_NO_BTIC			ASM_CONST(0x0000000000040000)
 #define CPU_FTR_BIG_PHYS		ASM_CONST(0x0000000000080000)
+#define CPU_FTR_NODSISRALIGN  		ASM_CONST(0x0000000000100000)
 
 #ifdef __powerpc64__
 /* Add the 64b processor unique features in the top half of the word */
@@ -97,7 +98,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_16M_PAGE      		ASM_CONST(0x0000000200000000)
 #define CPU_FTR_TLBIEL         		ASM_CONST(0x0000000400000000)
 #define CPU_FTR_NOEXECUTE     		ASM_CONST(0x0000000800000000)
-#define CPU_FTR_NODSISRALIGN  		ASM_CONST(0x0000001000000000)
 #define CPU_FTR_IABR  			ASM_CONST(0x0000002000000000)
 #define CPU_FTR_MMCRA  			ASM_CONST(0x0000004000000000)
 #define CPU_FTR_CTRL			ASM_CONST(0x0000008000000000)
@@ -113,7 +113,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
 #define CPU_FTR_16M_PAGE      		ASM_CONST(0x0)
 #define CPU_FTR_TLBIEL         		ASM_CONST(0x0)
 #define CPU_FTR_NOEXECUTE     		ASM_CONST(0x0)
-#define CPU_FTR_NODSISRALIGN  		ASM_CONST(0x0)
 #define CPU_FTR_IABR  			ASM_CONST(0x0)
 #define CPU_FTR_MMCRA  			ASM_CONST(0x0)
 #define CPU_FTR_CTRL			ASM_CONST(0x0)
@@ -273,18 +272,21 @@ enum {
 	CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
 	    CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
 	CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
-	    CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
+	    CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN,
 	CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
 	    CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP |
-	    CPU_FTR_MAYBE_CAN_NAP,
+	    CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN,
 	CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
-	CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
-	CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
-	CPU_FTRS_E200 = CPU_FTR_USE_TB,
-	CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
+	CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+	    CPU_FTR_NODSISRALIGN,
+	CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+	    CPU_FTR_NODSISRALIGN,
+	CPU_FTRS_E200 = CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN,
+	CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
+	    CPU_FTR_NODSISRALIGN,
 	CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
-	    CPU_FTR_BIG_PHYS,
-	CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON,
+	    CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN,
+	CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN,
 #ifdef __powerpc64__
 	CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
 	    CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
diff --git a/include/asm-powerpc/delay.h b/include/asm-powerpc/delay.h
index 1492aa9ab71..54fe1f4f8fd 100644
--- a/include/asm-powerpc/delay.h
+++ b/include/asm-powerpc/delay.h
@@ -13,43 +13,7 @@
  * Anton Blanchard.
  */
 
-extern unsigned long tb_ticks_per_usec;
-
-#ifdef CONFIG_PPC64
-/* define these here to prevent circular dependencies */
-/* these instructions control the thread priority on multi-threaded cpus */
-#define __HMT_low()	asm volatile("or 1,1,1")
-#define __HMT_medium()	asm volatile("or 2,2,2")
-#else
-#define __HMT_low()
-#define __HMT_medium()
-#endif
-
-#define __barrier()	asm volatile("" ::: "memory")
-
-static inline unsigned long __get_tb(void)
-{
-	unsigned long rval;
-
-	asm volatile("mftb %0" : "=r" (rval));
-	return rval;
-}
-
-static inline void __delay(unsigned long loops)
-{
-	unsigned long start = __get_tb();
-
-	while((__get_tb() - start) < loops)
-		__HMT_low();
-	__HMT_medium();
-	__barrier();
-}
-
-static inline void udelay(unsigned long usecs)
-{
-	unsigned long loops = tb_ticks_per_usec * usecs;
-
-	__delay(loops);
-}
+extern void __delay(unsigned long loops);
+extern void udelay(unsigned long usecs);
 
 #endif /* _ASM_POWERPC_DELAY_H */
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index 6e963511443..59a80163f75 100644
--- a/include/asm-ppc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -1,15 +1,22 @@
 /*
- * This is based on both include/asm-sh/dma-mapping.h and
- * include/asm-ppc/pci.h
+ * Copyright (C) 2004 IBM
+ *
+ * Implements the generic device dma API for powerpc.
+ * the pci and vio busses
  */
-#ifndef __ASM_PPC_DMA_MAPPING_H
-#define __ASM_PPC_DMA_MAPPING_H
+#ifndef _ASM_DMA_MAPPING_H
+#define _ASM_DMA_MAPPING_H
 
 #include <linux/config.h>
+#include <linux/types.h>
+#include <linux/cache.h>
 /* need struct page definitions */
 #include <linux/mm.h>
 #include <asm/scatterlist.h>
 #include <asm/io.h>
+#include <asm/bug.h>
+
+#define DMA_ERROR_CODE		(~(dma_addr_t)0x0)
 
 #ifdef CONFIG_NOT_COHERENT_CACHE
 /*
@@ -24,22 +31,12 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
 extern void __dma_sync(void *vaddr, size_t size, int direction);
 extern void __dma_sync_page(struct page *page, unsigned long offset,
 				 size_t size, int direction);
-#define dma_cache_inv(_start,_size) \
-	invalidate_dcache_range(_start, (_start + _size))
-#define dma_cache_wback(_start,_size) \
-	clean_dcache_range(_start, (_start + _size))
-#define dma_cache_wback_inv(_start,_size) \
-	flush_dcache_range(_start, (_start + _size))
 
 #else /* ! CONFIG_NOT_COHERENT_CACHE */
 /*
  * Cache coherent cores.
  */
 
-#define dma_cache_inv(_start,_size)		do { } while (0)
-#define dma_cache_wback(_start,_size)		do { } while (0)
-#define dma_cache_wback_inv(_start,_size)	do { } while (0)
-
 #define __dma_alloc_coherent(gfp, size, handle)	NULL
 #define __dma_free_coherent(size, addr)		do { } while (0)
 #define __dma_sync(addr, size, rw)		do { } while (0)
@@ -47,6 +44,30 @@ extern void __dma_sync_page(struct page *page, unsigned long offset,
 
 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
 
+#ifdef CONFIG_PPC64
+
+extern int dma_supported(struct device *dev, u64 mask);
+extern int dma_set_mask(struct device *dev, u64 dma_mask);
+extern void *dma_alloc_coherent(struct device *dev, size_t size,
+		dma_addr_t *dma_handle, gfp_t flag);
+extern void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
+		dma_addr_t dma_handle);
+extern dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
+		size_t size, enum dma_data_direction direction);
+extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
+		size_t size, enum dma_data_direction direction);
+extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
+		unsigned long offset, size_t size,
+		enum dma_data_direction direction);
+extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
+		size_t size, enum dma_data_direction direction);
+extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
+		enum dma_data_direction direction);
+extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
+		int nhwentries, enum dma_data_direction direction);
+
+#else /* CONFIG_PPC64 */
+
 #define dma_supported(dev, mask)	(1)
 
 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
@@ -144,29 +165,27 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 /* We don't do anything here. */
 #define dma_unmap_sg(dev, sg, nents, dir)	do { } while (0)
 
-static inline void
-dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
-			size_t size,
-			enum dma_data_direction direction)
+#endif /* CONFIG_PPC64 */
+
+static inline void dma_sync_single_for_cpu(struct device *dev,
+		dma_addr_t dma_handle, size_t size,
+		enum dma_data_direction direction)
 {
 	BUG_ON(direction == DMA_NONE);
-
 	__dma_sync(bus_to_virt(dma_handle), size, direction);
 }
 
-static inline void
-dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
-			size_t size,
-			enum dma_data_direction direction)
+static inline void dma_sync_single_for_device(struct device *dev,
+		dma_addr_t dma_handle, size_t size,
+		enum dma_data_direction direction)
 {
 	BUG_ON(direction == DMA_NONE);
-
 	__dma_sync(bus_to_virt(dma_handle), size, direction);
 }
 
-static inline void
-dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
-		    enum dma_data_direction direction)
+static inline void dma_sync_sg_for_cpu(struct device *dev,
+		struct scatterlist *sg, int nents,
+		enum dma_data_direction direction)
 {
 	int i;
 
@@ -176,9 +195,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
 		__dma_sync_page(sg->page, sg->offset, sg->length, direction);
 }
 
-static inline void
-dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
-		    enum dma_data_direction direction)
+static inline void dma_sync_sg_for_device(struct device *dev,
+		struct scatterlist *sg, int nents,
+		enum dma_data_direction direction)
 {
 	int i;
 
@@ -188,6 +207,15 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
 		__dma_sync_page(sg->page, sg->offset, sg->length, direction);
 }
 
+static inline int dma_mapping_error(dma_addr_t dma_addr)
+{
+#ifdef CONFIG_PPC64
+	return (dma_addr == DMA_ERROR_CODE);
+#else
+	return 0;
+#endif
+}
+
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
 #ifdef CONFIG_NOT_COHERENT_CACHE
@@ -198,40 +226,60 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
 
 static inline int dma_get_cache_alignment(void)
 {
+#ifdef CONFIG_PPC64
+	/* no easy way to get cache size on all processors, so return
+	 * the maximum possible, to be safe */
+	return (1 << L1_CACHE_SHIFT_MAX);
+#else
 	/*
 	 * Each processor family will define its own L1_CACHE_SHIFT,
 	 * L1_CACHE_BYTES wraps to this, so this is always safe.
 	 */
 	return L1_CACHE_BYTES;
+#endif
 }
 
-static inline void
-dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
-		      	      unsigned long offset, size_t size,
-		      	      enum dma_data_direction direction)
+static inline void dma_sync_single_range_for_cpu(struct device *dev,
+		dma_addr_t dma_handle, unsigned long offset, size_t size,
+		enum dma_data_direction direction)
 {
 	/* just sync everything for now */
 	dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
 }
 
-static inline void
-dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
-		    		 unsigned long offset, size_t size,
-				 enum dma_data_direction direction)
+static inline void dma_sync_single_range_for_device(struct device *dev,
+		dma_addr_t dma_handle, unsigned long offset, size_t size,
+		enum dma_data_direction direction)
 {
 	/* just sync everything for now */
 	dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
 }
 
 static inline void dma_cache_sync(void *vaddr, size_t size,
-				  enum dma_data_direction direction)
+		enum dma_data_direction direction)
 {
+	BUG_ON(direction == DMA_NONE);
 	__dma_sync(vaddr, size, (int)direction);
 }
 
-static inline int dma_mapping_error(dma_addr_t dma_addr)
-{
-	return 0;
-}
-
-#endif				/* __ASM_PPC_DMA_MAPPING_H */
+/*
+ * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
+ */
+struct dma_mapping_ops {
+	void *		(*alloc_coherent)(struct device *dev, size_t size,
+				dma_addr_t *dma_handle, gfp_t flag);
+	void		(*free_coherent)(struct device *dev, size_t size,
+				void *vaddr, dma_addr_t dma_handle);
+	dma_addr_t	(*map_single)(struct device *dev, void *ptr,
+				size_t size, enum dma_data_direction direction);
+	void		(*unmap_single)(struct device *dev, dma_addr_t dma_addr,
+				size_t size, enum dma_data_direction direction);
+	int		(*map_sg)(struct device *dev, struct scatterlist *sg,
+				int nents, enum dma_data_direction direction);
+	void		(*unmap_sg)(struct device *dev, struct scatterlist *sg,
+				int nents, enum dma_data_direction direction);
+	int		(*dma_supported)(struct device *dev, u64 mask);
+	int		(*dac_dma_supported)(struct device *dev, u64 mask);
+};
+
+#endif	/* _ASM_DMA_MAPPING_H */
diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h
index 89f26ab3190..f8633aafe4b 100644
--- a/include/asm-powerpc/eeh.h
+++ b/include/asm-powerpc/eeh.h
@@ -30,6 +30,8 @@ struct device_node;
 
 #ifdef CONFIG_EEH
 
+extern int eeh_subsystem_enabled;
+
 /* Values for eeh_mode bits in device_node */
 #define EEH_MODE_SUPPORTED	(1<<0)
 #define EEH_MODE_NOCHECK	(1<<1)
@@ -75,7 +77,7 @@ void eeh_remove_device(struct pci_dev *);
  * If this macro yields TRUE, the caller relays to eeh_check_failure()
  * which does further tests out of line.
  */
-#define EEH_POSSIBLE_ERROR(val, type)	((val) == (type)~0)
+#define EEH_POSSIBLE_ERROR(val, type)	((val) == (type)~0 && eeh_subsystem_enabled)
 
 /*
  * Reads from a device which has been isolated by EEH will return
diff --git a/include/asm-ppc64/io.h b/include/asm-powerpc/io.h
index 77fc07c3c6b..48938d84d05 100644
--- a/include/asm-ppc64/io.h
+++ b/include/asm-powerpc/io.h
@@ -1,5 +1,5 @@
-#ifndef _PPC64_IO_H
-#define _PPC64_IO_H
+#ifndef _ASM_POWERPC_IO_H
+#define _ASM_POWERPC_IO_H
 
 /* 
  * This program is free software; you can redistribute it and/or
@@ -8,7 +8,10 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#include <linux/config.h>
+#ifndef CONFIG_PPC64
+#include <asm-ppc/io.h>
+#else
+
 #include <linux/compiler.h>
 #include <asm/page.h>
 #include <asm/byteorder.h>
@@ -455,4 +458,5 @@ extern int check_legacy_ioport(unsigned long base_port);
 
 #endif /* __KERNEL__ */
 
-#endif /* _PPC64_IO_H */
+#endif /* CONFIG_PPC64 */
+#endif /* _ASM_POWERPC_IO_H */
diff --git a/include/asm-ppc64/mmu.h b/include/asm-powerpc/mmu.h
index 1a7e0afa2dc..c1b4bbabbe9 100644
--- a/include/asm-ppc64/mmu.h
+++ b/include/asm-powerpc/mmu.h
@@ -1,3 +1,10 @@
+#ifndef _ASM_POWERPC_MMU_H_
+#define _ASM_POWERPC_MMU_H_
+
+#ifndef CONFIG_PPC64
+#include <asm-ppc/mmu.h>
+#else
+
 /*
  * PowerPC memory management structures
  *
@@ -10,10 +17,6 @@
  * 2 of the License, or (at your option) any later version.
  */
 
-#ifndef _PPC64_MMU_H_
-#define _PPC64_MMU_H_
-
-#include <linux/config.h>
 #include <asm/asm-compat.h>
 #include <asm/page.h>
 
@@ -392,4 +395,5 @@ static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
 
 #endif /* __ASSEMBLY */
 
-#endif /* _PPC64_MMU_H_ */
+#endif /* CONFIG_PPC64 */
+#endif /* _ASM_POWERPC_MMU_H_ */
diff --git a/include/asm-ppc64/mmu_context.h b/include/asm-powerpc/mmu_context.h
index 4f512e9fa6b..ea6798c7d5f 100644
--- a/include/asm-ppc64/mmu_context.h
+++ b/include/asm-powerpc/mmu_context.h
@@ -1,7 +1,10 @@
-#ifndef __PPC64_MMU_CONTEXT_H
-#define __PPC64_MMU_CONTEXT_H
+#ifndef __ASM_POWERPC_MMU_CONTEXT_H
+#define __ASM_POWERPC_MMU_CONTEXT_H
+
+#ifndef CONFIG_PPC64
+#include <asm-ppc/mmu_context.h>
+#else
 
-#include <linux/config.h>
 #include <linux/kernel.h>	
 #include <linux/mm.h>	
 #include <asm/mmu.h>	
@@ -82,4 +85,5 @@ static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
 	local_irq_restore(flags);
 }
 
-#endif /* __PPC64_MMU_CONTEXT_H */
+#endif /* CONFIG_PPC64 */
+#endif /* __ASM_POWERPC_MMU_CONTEXT_H */
diff --git a/include/asm-ppc64/mmzone.h b/include/asm-powerpc/mmzone.h
index 54958d6cae0..54958d6cae0 100644
--- a/include/asm-ppc64/mmzone.h
+++ b/include/asm-powerpc/mmzone.h
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index c16f106b537..1e6e7846824 100644
--- a/include/asm-powerpc/page_64.h
+++ b/