aboutsummaryrefslogtreecommitdiff
path: root/include/asm-x86
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-x86')
-rw-r--r--include/asm-x86/system.h11
1 files changed, 1 insertions, 10 deletions
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
index 9cff02ffe6c..428d9471497 100644
--- a/include/asm-x86/system.h
+++ b/include/asm-x86/system.h
@@ -296,16 +296,7 @@ void default_idle(void);
*/
#ifdef CONFIG_X86_32
/*
- * For now, "wmb()" doesn't actually do anything, as all
- * Intel CPU's follow what Intel calls a *Processor Order*,
- * in which all writes are seen in the program order even
- * outside the CPU.
- *
- * I expect future Intel CPU's to have a weaker ordering,
- * but I'd also expect them to finally get their act together
- * and add some real memory barriers if so.
- *
- * Some non intel clones support out of order store. wmb() ceases to be a
+ * Some non-Intel clones support out of order store. wmb() ceases to be a
* nop for these.
*/
#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)