diff options
Diffstat (limited to 'include/asm-arm')
47 files changed, 1146 insertions, 390 deletions
diff --git a/include/asm-arm/arch-omap/board-h4.h b/include/asm-arm/arch-omap/board-h4.h index 79138dcfb4a..d64ee9211ee 100644 --- a/include/asm-arm/arch-omap/board-h4.h +++ b/include/asm-arm/arch-omap/board-h4.h @@ -30,6 +30,9 @@ #define __ASM_ARCH_OMAP_H4_H /* Placeholder for H4 specific defines */ +/* GPMC CS1 */ +#define OMAP24XX_ETHR_START 0x08000300 +#define OMAP24XX_ETHR_GPIO_IRQ 92 #endif /* __ASM_ARCH_OMAP_H4_H */ diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h index 0f1abaefe4d..79574e0ed13 100644 --- a/include/asm-arm/arch-omap/board-innovator.h +++ b/include/asm-arm/arch-omap/board-innovator.h @@ -36,31 +36,6 @@ #define OMAP1510P1_EMIFS_PRI_VALUE 0x00 #define OMAP1510P1_EMIFF_PRI_VALUE 0x00 -/* - * These definitions define an area of FLASH set aside - * for the use of MTD/JFFS2. This is the area of flash - * that a JFFS2 filesystem will reside which is mounted - * at boot with the "root=/dev/mtdblock/0 rw" - * command line option. The flash address used here must - * fall within the legal range defined by rrload for storing - * the filesystem component. This address will be sufficiently - * deep into the overall flash range to avoid the other - * components also stored in flash such as the bootloader, - * the bootloader params, and the kernel. - * The SW2 settings for the map below are: - * 1 off, 2 off, 3 on, 4 off. - */ - -/* Intel flash_0, partitioned as expected by rrload */ -#define OMAP_FLASH_0_BASE 0xD8000000 -#define OMAP_FLASH_0_START 0x00000000 -#define OMAP_FLASH_0_SIZE SZ_16M - -/* Intel flash_1, used for cramfs or other flash file systems */ -#define OMAP_FLASH_1_BASE 0xD9000000 -#define OMAP_FLASH_1_START 0x01000000 -#define OMAP_FLASH_1_SIZE SZ_16M - #define NR_FPGA_IRQS 24 #define NR_IRQS IH_BOARD_BASE + NR_FPGA_IRQS diff --git a/include/asm-arm/arch-omap/board-perseus2.h b/include/asm-arm/arch-omap/board-perseus2.h index 0c224cc74fe..691e52a52b4 100644 --- a/include/asm-arm/arch-omap/board-perseus2.h +++ b/include/asm-arm/arch-omap/board-perseus2.h @@ -36,23 +36,14 @@ #define OMAP_SDRAM_DEVICE D256M_1X16_4B #endif -/* - * These definitions define an area of FLASH set aside - * for the use of MTD/JFFS2. This is the area of flash - * that a JFFS2 filesystem will reside which is mounted - * at boot with the "root=/dev/mtdblock/0 rw" - * command line option. - */ - -/* Intel flash_0, partitioned as expected by rrload */ -#define OMAP_FLASH_0_BASE 0xD8000000 /* VA */ -#define OMAP_FLASH_0_START 0x00000000 /* PA */ -#define OMAP_FLASH_0_SIZE SZ_32M - #define MAXIRQNUM IH_BOARD_BASE #define MAXFIQNUM MAXIRQNUM #define MAXSWINUM MAXIRQNUM #define NR_IRQS (MAXIRQNUM + 1) +/* Samsung NAND flash at CS2B or CS3(NAND Boot) */ +#define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ +#define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ + #endif diff --git a/include/asm-arm/arch-omap/board-voiceblue.h b/include/asm-arm/arch-omap/board-voiceblue.h index 33977b8956f..ed6d346ee12 100644 --- a/include/asm-arm/arch-omap/board-voiceblue.h +++ b/include/asm-arm/arch-omap/board-voiceblue.h @@ -11,11 +11,6 @@ #ifndef __ASM_ARCH_VOICEBLUE_H #define __ASM_ARCH_VOICEBLUE_H -#if (EXTERNAL_MAX_NR_PORTS < 4) -#undef EXTERNAL_MAX_NR_PORTS -#define EXTERNAL_MAX_NR_PORTS 4 -#endif - extern void voiceblue_wdt_enable(void); extern void voiceblue_wdt_disable(void); extern void voiceblue_wdt_ping(void); diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index 95bd625480c..a0040cd8663 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h @@ -30,10 +30,23 @@ struct omap_clock_config { u8 system_clock_type; }; +struct omap_mmc_conf { + unsigned enabled:1; + /* nomux means "standard" muxing is wrong on this board, and that + * board-specific code handled it before common init logic. + */ + unsigned nomux:1; + /* switch pin can be for card detect (default) or card cover */ + unsigned cover:1; + /* 4 wire signaling is optional, and is only used for SD/SDIO */ + unsigned wire4:1; + s16 power_pin; + s16 switch_pin; + s16 wp_pin; +}; + struct omap_mmc_config { - u8 mmc_blocks; - s16 mmc1_power_pin, mmc2_power_pin; - s16 mmc1_switch_pin, mmc2_switch_pin; + struct omap_mmc_conf mmc[2]; }; struct omap_serial_console_config { diff --git a/include/asm-arm/arch-omap/cpu.h b/include/asm-arm/arch-omap/cpu.h index e8786713ee5..1119e2b53e7 100644 --- a/include/asm-arm/arch-omap/cpu.h +++ b/include/asm-arm/arch-omap/cpu.h @@ -38,146 +38,179 @@ extern unsigned int system_rev; /* * Test if multicore OMAP support is needed */ -#undef MULTI_OMAP +#undef MULTI_OMAP1 +#undef MULTI_OMAP2 #undef OMAP_NAME #ifdef CONFIG_ARCH_OMAP730 # ifdef OMAP_NAME -# undef MULTI_OMAP -# define MULTI_OMAP +# undef MULTI_OMAP1 +# define MULTI_OMAP1 # else # define OMAP_NAME omap730 # endif #endif #ifdef CONFIG_ARCH_OMAP1510 # ifdef OMAP_NAME -# undef MULTI_OMAP -# define MULTI_OMAP +# undef MULTI_OMAP1 +# define MULTI_OMAP1 # else # define OMAP_NAME omap1510 # endif #endif #ifdef CONFIG_ARCH_OMAP16XX # ifdef OMAP_NAME -# undef MULTI_OMAP -# define MULTI_OMAP +# undef MULTI_OMAP1 +# define MULTI_OMAP1 # else -# define OMAP_NAME omap1610 +# define OMAP_NAME omap16xx # endif #endif -#ifdef CONFIG_ARCH_OMAP16XX -# ifdef OMAP_NAME -# undef MULTI_OMAP -# define MULTI_OMAP +#ifdef CONFIG_ARCH_OMAP24XX +# if (defined(OMAP_NAME) || defined(MULTI_OMAP1)) +# error "OMAP1 and OMAP2 can't be selected at the same time" # else -# define OMAP_NAME omap1710 +# undef MULTI_OMAP2 +# define OMAP_NAME omap24xx # endif #endif /* - * Generate various OMAP cpu specific macros, and cpu class - * specific macros + * Macros to group OMAP into cpu classes. + * These can be used in most places. + * cpu_is_omap7xx(): True for OMAP730 + * cpu_is_omap15xx(): True for OMAP1510 and OMAP5910 + * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 + * cpu_is_omap24xx(): True for OMAP2420 */ -#define GET_OMAP_TYPE ((system_rev >> 24) & 0xff) #define GET_OMAP_CLASS (system_rev & 0xff) -#define IS_OMAP_TYPE(type, id) \ -static inline int is_omap ##type (void) \ -{ \ - return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ -} - #define IS_OMAP_CLASS(class, id) \ static inline int is_omap ##class (void) \ { \ return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ } -IS_OMAP_TYPE(730, 0x07) -IS_OMAP_TYPE(1510, 0x15) -IS_OMAP_TYPE(1610, 0x16) -IS_OMAP_TYPE(5912, 0x16) -IS_OMAP_TYPE(1710, 0x17) -IS_OMAP_TYPE(2420, 0x24) - IS_OMAP_CLASS(7xx, 0x07) IS_OMAP_CLASS(15xx, 0x15) IS_OMAP_CLASS(16xx, 0x16) IS_OMAP_CLASS(24xx, 0x24) -/* - * Macros to group OMAP types into cpu classes. - * These can be used in most places. - * cpu_is_omap15xx(): True for 1510 and 5910 - * cpu_is_omap16xx(): True for 1610, 5912 and 1710 - */ -#if defined(MULTI_OMAP) -# define cpu_is_omap7xx() is_omap7xx() -# define cpu_is_omap15xx() is_omap15xx() -# if !(defined(CONFIG_ARCH_OMAP1510) || defined(CONFIG_ARCH_OMAP730)) -# define cpu_is_omap16xx() 1 -# else +#define cpu_is_omap7xx() 0 +#define cpu_is_omap15xx() 0 +#define cpu_is_omap16xx() 0 +#define cpu_is_omap24xx() 0 + +#if defined(MULTI_OMAP1) +# if defined(CONFIG_ARCH_OMAP730) +# undef cpu_is_omap7xx +# define cpu_is_omap7xx() is_omap7xx() +# endif +# if defined(CONFIG_ARCH_OMAP1510) +# undef cpu_is_omap15xx +# define cpu_is_omap15xx() is_omap15xx() +# endif +# if defined(CONFIG_ARCH_OMAP16XX) +# undef cpu_is_omap16xx # define cpu_is_omap16xx() is_omap16xx() # endif #else # if defined(CONFIG_ARCH_OMAP730) +# undef cpu_is_omap7xx # define cpu_is_omap7xx() 1 -# else -# define cpu_is_omap7xx() 0 # endif # if defined(CONFIG_ARCH_OMAP1510) +# undef cpu_is_omap15xx # define cpu_is_omap15xx() 1 -# else -# define cpu_is_omap15xx() 0 # endif # if defined(CONFIG_ARCH_OMAP16XX) +# undef cpu_is_omap16xx # define cpu_is_omap16xx() 1 -# else -# define cpu_is_omap16xx() 0 +# endif +# if defined(CONFIG_ARCH_OMAP24XX) +# undef cpu_is_omap24xx +# define cpu_is_omap24xx() 1 # endif #endif -#if defined(MULTI_OMAP) -# define cpu_is_omap730() is_omap730() -# define cpu_is_omap1510() is_omap1510() -# define cpu_is_omap1610() is_omap1610() -# define cpu_is_omap5912() is_omap5912() -# define cpu_is_omap1710() is_omap1710() +/* + * Macros to detect individual cpu types. + * These are only rarely needed. + * cpu_is_omap730(): True for OMAP730 + * cpu_is_omap1510(): True for OMAP1510 + * cpu_is_omap1610(): True for OMAP1610 + * cpu_is_omap1611(): True for OMAP1611 + * cpu_is_omap5912(): True for OMAP5912 + * cpu_is_omap1621(): True for OMAP1621 + * cpu_is_omap1710(): True for OMAP1710 + * cpu_is_omap2420(): True for OMAP2420 + */ +#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) + +#define IS_OMAP_TYPE(type, id) \ +static inline int is_omap ##type (void) \ +{ \ + return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ +} + +IS_OMAP_TYPE(730, 0x0730) +IS_OMAP_TYPE(1510, 0x1510) +IS_OMAP_TYPE(1610, 0x1610) +IS_OMAP_TYPE(1611, 0x1611) +IS_OMAP_TYPE(5912, 0x1611) +IS_OMAP_TYPE(1621, 0x1621) +IS_OMAP_TYPE(1710, 0x1710) +IS_OMAP_TYPE(2420, 0x2420) + +#define cpu_is_omap730() 0 +#define cpu_is_omap1510() 0 +#define cpu_is_omap1610() 0 +#define cpu_is_omap5912() 0 +#define cpu_is_omap1611() 0 +#define cpu_is_omap1621() 0 +#define cpu_is_omap1710() 0 +#define cpu_is_omap2420() 0 + +#if defined(MULTI_OMAP1) +# if defined(CONFIG_ARCH_OMAP730) +# undef cpu_is_omap730 +# define cpu_is_omap730() is_omap730() +# endif +# if defined(CONFIG_ARCH_OMAP1510) +# undef cpu_is_omap1510 +# define cpu_is_omap1510() is_omap1510() +# endif #else # if defined(CONFIG_ARCH_OMAP730) +# undef cpu_is_omap730 # define cpu_is_omap730() 1 -# else -# define cpu_is_omap730() 0 # endif # if defined(CONFIG_ARCH_OMAP1510) +# undef cpu_is_omap1510 # define cpu_is_omap1510() 1 -# else -# define cpu_is_omap1510() 0 # endif -# if defined(CONFIG_ARCH_OMAP16XX) -# define cpu_is_omap1610() 1 -# else -# define cpu_is_omap1610() 0 -# endif -# if defined(CONFIG_ARCH_OMAP16XX) -# define cpu_is_omap5912() 1 -# else -# define cpu_is_omap5912() 0 -# endif -# if defined(CONFIG_ARCH_OMAP16XX) +#endif + +/* + * Whether we have MULTI_OMAP1 or not, we still need to distinguish + * between 1611B/5912 and 1710. + */ +#if defined(CONFIG_ARCH_OMAP16XX) +# undef cpu_is_omap1610 +# undef cpu_is_omap1611 +# undef cpu_is_omap5912 +# undef cpu_is_omap1621 +# undef cpu_is_omap1710 # define cpu_is_omap1610() is_omap1610() +# define cpu_is_omap1611() is_omap1611() # define cpu_is_omap5912() is_omap5912() +# define cpu_is_omap1621() is_omap1621() # define cpu_is_omap1710() is_omap1710() -# else -# define cpu_is_omap1610() 0 -# define cpu_is_omap5912() 0 -# define cpu_is_omap1710() 0 -# endif -# if defined(CONFIG_ARCH_OMAP2420) +#endif + +#if defined(CONFIG_ARCH_OMAP2420) +# undef cpu_is_omap2420 # define cpu_is_omap2420() 1 -# else -# define cpu_is_omap2420() 0 -# endif #endif #endif diff --git a/include/asm-arm/arch-omap/debug-macro.S b/include/asm-arm/arch-omap/debug-macro.S index 83bb458afd0..ca4f577f967 100644 --- a/include/asm-arm/arch-omap/debug-macro.S +++ b/include/asm-arm/arch-omap/debug-macro.S @@ -14,6 +14,7 @@ .macro addruart,rx mrc p15, 0, \rx, c1, c0 tst \rx, #1 @ MMU enabled? +#ifdef CONFIG_ARCH_OMAP1 moveq \rx, #0xff000000 @ physical base address movne \rx, #0xfe000000 @ virtual base orr \rx, \rx, #0x00fb0000 @@ -23,6 +24,18 @@ #if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3) orr \rx, \rx, #0x00000800 @ UART 2 & 3 #endif + +#elif CONFIG_ARCH_OMAP2 + moveq \rx, #0x48000000 @ physical base address + movne \rx, #0xd8000000 @ virtual base + orr \rx, \rx, #0x0006a000 +#ifdef CONFIG_OMAP_LL_DEBUG_UART2 + add \rx, \rx, #0x00002000 @ UART 2 +#endif +#ifdef CONFIG_OMAP_LL_DEBUG_UART3 + add \rx, \rx, #0x00004000 @ UART 3 +#endif +#endif .endm .macro senduart,rd,rx diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h index ce114ce5af5..04ebef5c6e9 100644 --- a/include/asm-arm/arch-omap/dma.h +++ b/include/asm-arm/arch-omap/dma.h @@ -240,6 +240,7 @@ extern void omap_dma_unlink_lch (int lch_head, int lch_queue); extern dma_addr_t omap_get_dma_src_pos(int lch); extern dma_addr_t omap_get_dma_dst_pos(int lch); +extern int omap_get_dma_src_addr_counter(int lch); extern void omap_clear_dma(int lch); extern int omap_dma_running(void); diff --git a/include/asm-arm/arch-omap/dmtimer.h b/include/asm-arm/arch-omap/dmtimer.h new file mode 100644 index 00000000000..11772c792f3 --- /dev/null +++ b/include/asm-arm/arch-omap/dmtimer.h @@ -0,0 +1,92 @@ +/* + * linux/include/asm-arm/arm/arch-omap/dmtimer.h + * + * OMAP Dual-Mode Timers + * + * Copyright (C) 2005 Nokia Corporation + * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef __ASM_ARCH_TIMER_H +#define __ASM_ARCH_TIMER_H + +#include <linux/list.h> + +#define OMAP_TIMER_SRC_ARMXOR 0x00 +#define OMAP_TIMER_SRC_32_KHZ 0x01 +#define OMAP_TIMER_SRC_EXT_CLK 0x02 + +/* timer control reg bits */ +#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) +#define OMAP_TIMER_CTRL_PT (1 << 12) +#define OMAP_TIMER_CTRL_TRG_OVERFLOW (0x1 << 10) +#define OMAP_TIMER_CTRL_TRG_OFANDMATCH (0x2 << 10) +#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) +#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) +#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) +#define OMAP_TIMER_CTRL_SCPWM (1 << 7) +#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ +#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ +#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* how much to shift the prescaler value */ +#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ +#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ + +/* timer interrupt enable bits */ +#define OMAP_TIMER_INT_CAPTURE (1 << 2) +#define OMAP_TIMER_INT_OVERFLOW (1 << 1) +#define OMAP_TIMER_INT_MATCH (1 << 0) + + +struct omap_dm_timer { + struct list_head timer_list; + + u32 base; + unsigned int irq; +}; + +u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, int reg); +void omap_dm_timer_write_reg(struct omap_dm_timer *timer, int reg, u32 value); + +struct omap_dm_timer * omap_dm_timer_request(void); +void omap_dm_timer_free(struct omap_dm_timer *timer); +void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); + +void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); +void omap_dm_timer_set_trigger(struct omap_dm_timer *timer, unsigned int value); +void omap_dm_timer_enable_compare(struct omap_dm_timer *timer); +void omap_dm_timer_enable_autoreload(struct omap_dm_timer *timer); + +void omap_dm_timer_trigger(struct omap_dm_timer *timer); +void omap_dm_timer_start(struct omap_dm_timer *timer); +void omap_dm_timer_stop(struct omap_dm_timer *timer); + +void omap_dm_timer_set_load(struct omap_dm_timer *timer, unsigned int load); +void omap_dm_timer_set_match(struct omap_dm_timer *timer, unsigned int match); + +unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); +void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); + +unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer); +void omap_dm_timer_reset_counter(struct omap_dm_timer *timer); + +int omap_dm_timers_active(void); + +#endif /* __ASM_ARCH_TIMER_H */ diff --git a/include/asm-arm/arch-omap/dsp.h b/include/asm-arm/arch-omap/dsp.h new file mode 100644 index 00000000000..57bf4f39ca5 --- /dev/null +++ b/include/asm-arm/arch-omap/dsp.h @@ -0,0 +1,244 @@ +/* + * linux/include/asm-arm/arch-omap/dsp.h + * + * Header for OMAP DSP driver + * + * Copyright (C) 2002-2005 Nokia Corporation + * + * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * 2005/06/01: DSP Gateway version 3.3 + */ + +#ifndef ASM_ARCH_DSP_H +#define ASM_ARCH_DSP_H + + +/* + * for /dev/dspctl/ctl + */ +#define OMAP_DSP_IOCTL_RESET 1 +#define OMAP_DSP_IOCTL_RUN 2 +#define OMAP_DSP_IOCTL_SETRSTVECT 3 +#define OMAP_DSP_IOCTL_CPU_IDLE 4 +#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_ON 5 +#define OMAP_DSP_IOCTL_MPUI_WORDSWAP_OFF 6 +#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_ON 7 +#define OMAP_DSP_IOCTL_MPUI_BYTESWAP_OFF 8 +#define OMAP_DSP_IOCTL_GBL_IDLE 9 +#define OMAP_DSP_IOCTL_DSPCFG 10 +#define OMAP_DSP_IOCTL_DSPUNCFG 11 +#define OMAP_DSP_IOCTL_TASKCNT 12 +#define OMAP_DSP_IOCTL_POLL 13 +#define OMAP_DSP_IOCTL_REGMEMR 40 +#define OMAP_DSP_IOCTL_REGMEMW 41 +#define OMAP_DSP_IOCTL_REGIOR 42 +#define OMAP_DSP_IOCTL_REGIOW 43 +#define OMAP_DSP_IOCTL_GETVAR 44 +#define OMAP_DSP_IOCTL_SETVAR 45 +#define OMAP_DSP_IOCTL_RUNLEVEL 50 +#define OMAP_DSP_IOCTL_SUSPEND 51 +#define OMAP_DSP_IOCTL_RESUME 52 +#define OMAP_DSP_IOCTL_FBEN 53 +#define OMAP_DSP_IOCTL_FBDIS 54 +#define OMAP_DSP_IOCTL_MBSEND 99 + +/* + * for taskdev + * (ioctls below should be >= 0x10000) + */ +#define OMAP_DSP_TASK_IOCTL_BFLSH 0x10000 +#define OMAP_DSP_TASK_IOCTL_SETBSZ 0x10001 +#define OMAP_DSP_TASK_IOCTL_LOCK 0x10002 +#define OMAP_DSP_TASK_IOCTL_UNLOCK 0x10003 +#define OMAP_DSP_TASK_IOCTL_GETNAME 0x10004 + +/* + * for /dev/dspctl/mem + */ +#define OMAP_DSP_MEM_IOCTL_EXMAP 1 +#define OMAP_DSP_MEM_IOCTL_EXUNMAP 2 +#define OMAP_DSP_MEM_IOCTL_EXMAP_FLUSH 3 +#define OMAP_DSP_MEM_IOCTL_FBEXPORT 5 +#define OMAP_DSP_MEM_IOCTL_MMUITACK 7 +#define OMAP_DSP_MEM_IOCTL_MMUINIT 9 +#define OMAP_DSP_MEM_IOCTL_KMEM_RESERVE 11 +#define OMAP_DSP_MEM_IOCTL_KMEM_RELEASE 12 + +struct omap_dsp_mapinfo { + unsigned long dspadr; + unsigned long size; +}; + +/* + * for /dev/dspctl/twch + */ +#define OMAP_DSP_TWCH_IOCTL_MKDEV 1 +#define OMAP_DSP_TWCH_IOCTL_RMDEV 2 +#define OMAP_DSP_TWCH_IOCTL_TADD 11 +#define OMAP_DSP_TWCH_IOCTL_TDEL 12 +#define OMAP_DSP_TWCH_IOCTL_TKILL 13 + +#define OMAP_DSP_DEVSTATE_NOTASK 0x00000001 +#define OMAP_DSP_DEVSTATE_ATTACHED 0x00000002 +#define OMAP_DSP_DEVSTATE_GARBAGE 0x00000004 +#define OMAP_DSP_DEVSTATE_INVALID 0x00000008 +#define OMAP_DSP_DEVSTATE_ADDREQ 0x00000100 +#define OMAP_DSP_DEVSTATE_DELREQ 0x00000200 +#define OMAP_DSP_DEVSTATE_ADDFAIL 0x00001000 +#define OMAP_DSP_DEVSTATE_ADDING 0x00010000 +#define OMAP_DSP_DEVSTATE_DELING 0x00020000 +#define OMAP_DSP_DEVSTATE_KILLING 0x00040000 +#define OMAP_DSP_DEVSTATE_STATE_MASK 0x7fffffff +#define OMAP_DSP_DEVSTATE_STALE 0x80000000 + +struct omap_dsp_taddinfo { + unsigned char minor; + unsigned long taskadr; +}; +#define OMAP_DSP_TADD_ABORTADR 0xffffffff + + +/* + * error cause definition (for error detection device) + */ +#define OMAP_DSP_ERRDT_WDT 0x00000001 +#define OMAP_DSP_ERRDT_MMU 0x00000002 + + +/* + * mailbox protocol definitions + */ + +struct omap_dsp_mailbox_cmd { + unsigned short cmd; + unsigned short data; +}; + +struct omap_dsp_reginfo { + unsigned short adr; + unsigned short val; +}; + +struct omap_dsp_varinfo { + unsigned char varid; + unsigned short val[0]; +}; + +#define OMAP_DSP_MBPROT_REVISION 0x0019 + +#define OMAP_DSP_MBCMD_WDSND 0x10 +#define OMAP_DSP_MBCMD_WDREQ 0x11 +#define OMAP_DSP_MBCMD_BKSND 0x20 +#define OMAP_DSP_MBCMD_BKREQ 0x21 +#define OMAP_DSP_MBCMD_BKYLD 0x23 +#define OMAP_DSP_MBCMD_BKSNDP 0x24 +#define OMAP_DSP_MBCMD_BKREQP 0x25 +#define OMAP_DSP_MBCMD_TCTL 0x30 +#define OMAP_DSP_MBCMD_TCTLDATA 0x31 +#define OMAP_DSP_MBCMD_POLL 0x32 +#define OMAP_DSP_MBCMD_WDT 0x50 /* v3.3: obsolete */ +#define OMAP_DSP_MBCMD_RUNLEVEL 0x51 +#define OMAP_DSP_MBCMD_PM 0x52 +#define OMAP_DSP_MBCMD_SUSPEND 0x53 +#define OMAP_DSP_MBCMD_KFUNC 0x54 +#define OMAP_DSP_MBCMD_TCFG 0x60 +#define OMAP_DSP_MBCMD_TADD 0x62 +#define OMAP_DSP_MBCMD_TDEL 0x63 +#define OMAP_DSP_MBCMD_TSTOP 0x65 +#define OMAP_DSP_MBCMD_DSPCFG 0x70 +#define OMAP_DSP_MBCMD_REGRW 0x72 +#define OMAP_DSP_MBCMD_GETVAR 0x74 +#define OMAP_DSP_MBCMD_SETVAR 0x75 +#define OMAP_DSP_MBCMD_ERR 0x78 +#define OMAP_DSP_MBCMD_DBG 0x79 + +#define OMAP_DSP_MBCMD_TCTL_TINIT 0x0000 +#define OMAP_DSP_MBCMD_TCTL_TEN 0x0001 +#define OMAP_DSP_MBCMD_TCTL_TDIS 0x0002 +#define OMAP_DSP_MBCMD_TCTL_TCLR 0x0003 +#define OMAP_DSP_MBCMD_TCTL_TCLR_FORCE 0x0004 + +#define OMAP_DSP_MBCMD_RUNLEVEL_USER 0x01 +#define OMAP_DSP_MBCMD_RUNLEVEL_SUPER 0x0e +#define OMAP_DSP_MBCMD_RUNLEVEL_RECOVERY 0x10 + +#define OMAP_DSP_MBCMD_PM_DISABLE 0x00 +#define OMAP_DSP_MBCMD_PM_ENABLE 0x01 + +#define OMAP_DSP_MBCMD_KFUNC_FBCTL 0x00 + +#define OMAP_DSP_MBCMD_FBCTL_ENABLE 0x0002 +#define OMAP_DSP_MBCMD_FBCTL_DISABLE 0x0003 + +#define OMAP_DSP_MBCMD_TDEL_SAFE 0x0000 +#define OMAP_DSP_MBCMD_TDEL_KILL 0x0001 + +#define OMAP_DSP_MBCMD_DSPCFG_REQ 0x00 +#define OMAP_DSP_MBCMD_DSPCFG_SYSADRH 0x28 +#define OMAP_DSP_MBCMD_DSPCFG_SYSADRL 0x29 +#define OMAP_DSP_MBCMD_DSPCFG_PROTREV 0x70 +#define OMAP_DSP_MBCMD_DSPCFG_ABORT 0x78 +#define OMAP_DSP_MBCMD_DSPCFG_LAST 0x80 + +#define OMAP_DSP_MBCMD_REGRW_MEMR 0x00 +#define OMAP_DSP_MBCMD_REGRW_MEMW 0x01 +#define OMAP_DSP_MBCMD_REGRW_IOR 0x02 +#define OMAP_DSP_MBCMD_REGRW_IOW 0x03 +#define OMAP_DSP_MBCMD_REGRW_DATA 0x04 + +#define OMAP_DSP_MBCMD_VARID_ICRMASK 0x00 +#define OMAP_DSP_MBCMD_VARID_LOADINFO 0x01 + +#define OMAP_DSP_TTYP_ARCV 0x0001 +#define OMAP_DSP_TTYP_ASND 0x0002 +#define OMAP_DSP_TTYP_BKMD 0x0004 +#define OMAP_DSP_TTYP_BKDM 0x0008 +#define OMAP_DSP_TTYP_PVMD 0x0010 +#define OMAP_DSP_TTYP_PVDM 0x0020 + +#define OMAP_DSP_EID_BADTID 0x10 +#define OMAP_DSP_EID_BADTCN 0x11 +#define OMAP_DSP_EID_BADBID 0x20 +#define OMAP_DSP_EID_BADCNT 0x21 +#define OMAP_DSP_EID_NOTLOCKED 0x22 +#define OMAP_DSP_EID_STVBUF 0x23 +#define OMAP_DSP_EID_BADADR 0x24 +#define OMAP_DSP_EID_BADTCTL 0x30 +#define OMAP_DSP_EID_BADPARAM 0x50 +#define OMAP_DSP_EID_FATAL 0x58 +#define OMAP_DSP_EID_NOMEM 0xc0 +#define OMAP_DSP_EID_NORES 0xc1 +#define OMAP_DSP_EID_IPBFULL 0xc2 +#define OMAP_DSP_EID_WDT 0xd0 +#define OMAP_DSP_EID_TASKNOTRDY 0xe0 +#define OMAP_DSP_EID_TASKBSY 0xe1 +#define OMAP_DSP_EID_TASKERR 0xef +#define OMAP_DSP_EID_BADCFGTYP 0xf0 +#define OMAP_DSP_EID_DEBUG 0xf8 +#define OMAP_DSP_EID_BADSEQ 0xfe +#define OMAP_DSP_EID_BADCMD 0xff + +#define OMAP_DSP_TNM_LEN 16 + +#define OMAP_DSP_TID_FREE 0xff +#define OMAP_DSP_TID_ANON 0xfe + +#define OMAP_DSP_BID_NULL 0xffff +#define OMAP_DSP_BID_PVT 0xfffe + +#endif /* ASM_ARCH_DSP_H */ diff --git a/include/asm-arm/arch-omap/dsp_common.h b/include/asm-arm/arch-omap/dsp_common.h new file mode 100644 index 00000000000..4fcce694405 --- /dev/null +++ b/include/asm-arm/arch-omap/dsp_common.h @@ -0,0 +1,37 @@ +/* + * linux/include/asm-arm/arch-omap/dsp_common.h + * + * Header for OMAP DSP subsystem control + * + * Copyright (C) 2004,2005 Nokia Corporation + * + * Written by Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * 2005/06/03: DSP Gateway version 3.3 + */ + +#ifndef ASM_ARCH_DSP_COMMON_H +#define ASM_ARCH_DSP_COMMON_H + +void omap_dsp_pm_suspend(void); +void omap_dsp_pm_resume(void); +void omap_dsp_request_mpui(void); +void omap_dsp_release_mpui(void); +int omap_dsp_request_mem(void); +int omap_dsp_release_mem(void); + +#endif /* ASM_ARCH_DSP_COMMON_H */ diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S index 57b126889b9..0d29b9c56a9 100644 --- a/include/asm-arm/arch-omap/entry-macro.S +++ b/include/asm-arm/arch-omap/entry-macro.S @@ -8,6 +8,8 @@ * warranty of any kind, whether express or implied. */ +#if defined(CONFIG_ARCH_OMAP1) + .macro disable_fiq .endm @@ -30,3 +32,29 @@ 1510: .endm +#elif defined(CONFIG_ARCH_OMAP24XX) + +#include <asm/arch/omap24xx.h> + + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \base, =VA_IC_BASE + ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ + cmp \irqnr, #0x0 + bne 2222f + ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ + cmp \irqnr, #0x0 + bne 2222f + ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ + cmp \irqnr, #0x0 +2222: + ldrne \irqnr, [\base, #IRQ_SIR_IRQ] + + .endm + + .macro irq_prio_table + .endm + +#endif diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h index fad2fc93ee7..74cb2b93b70 100644 --- a/include/asm-arm/arch-omap/gpio.h +++ b/include/asm-arm/arch-omap/gpio.h @@ -3,7 +3,7 @@ * * OMAP GPIO handling defines and functions * - * Copyright (C) 2003 Nokia Corporation + * Copyright (C) 2003-2005 Nokia Corporation * * Written by Juha Yrjölä <juha.yrjola@nokia.com> * @@ -30,7 +30,23 @@ #include <asm/arch/irqs.h> #include <asm/io.h> -#define OMAP_MPUIO_BASE 0xfffb5000 +#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000 + +#ifdef CONFIG_ARCH_OMAP730 +#define OMAP_MPUIO_INPUT_LATCH 0x00 +#define OMAP_MPUIO_OUTPUT 0x02 +#define OMAP_MPUIO_IO_CNTL 0x04 +#define OMAP_MPUIO_KBR_LATCH 0x08 +#define OMAP_MPUIO_KBC 0x0a +#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c +#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e +#define OMAP_MPUIO_KBD_INT 0x10 +#define OMAP_MPUIO_GPIO_INT 0x12 +#define OMAP_MPUIO_KBD_MASKIT 0x14 +#define OMAP_MPUIO_GPIO_MASKIT 0x16 +#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18 +#define OMAP_MPUIO_LATCH 0x1a +#else #define OMAP_MPUIO_INPUT_LATCH 0x00 #define OMAP_MPUIO_OUTPUT 0x04 #define OMAP_MPUIO_IO_CNTL 0x08 @@ -44,6 +60,7 @@ #define OMAP_MPUIO_GPIO_MASKIT 0x2c #define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 #define OMAP_MPUIO_LATCH 0x34 +#endif #define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) #define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) @@ -52,18 +69,11 @@ IH_MPUIO_BASE + ((nr) & 0x0f) : \ IH_GPIO_BASE + ((nr) & 0x3f)) -/* For EDGECTRL */ -#define OMAP_GPIO_NO_EDGE 0x00 -#define OMAP_GPIO_FALLING_EDGE 0x01 -#define OMAP_GPIO_RISING_EDGE 0x02 -#define OMAP_GPIO_BOTH_EDGES 0x03 - extern int omap_gpio_init(void); /* Call from board init only */ extern int omap_request_gpio(int gpio); extern void omap_free_gpio(int gpio); extern void omap_set_gpio_direction(int gpio, int is_input); extern void omap_set_gpio_dataout(int gpio, int enable); extern int omap_get_gpio_datain(int gpio); -extern void omap_set_gpio_edge_ctrl(int gpio, int edge); #endif diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index 48258c7f654..60201e1dd6a 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h @@ -43,6 +43,7 @@ #include <asm/arch/cpu.h> #endif #include <asm/arch/io.h> +#include <asm/arch/serial.h> /* * --------------------------------------------------------------------------- @@ -89,11 +90,12 @@ /* DPLL control registers */ #define DPLL_CTL (0xfffecf00) -/* DSP clock control */ +/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ #define DSP_CONFIG_REG_BASE (0xe1008000) #define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) +#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) /* * --------------------------------------------------------------------------- @@ -142,6 +144,13 @@ * Interrupts * --------------------------------------------------------------------------- */ +#ifdef CONFIG_ARCH_OMAP1 + +/* + * XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c + * or something similar.. -- PFM. + */ + #define OMAP_IH1_BASE 0xfffecb00 #define OMAP_IH2_BASE 0xfffe0000 @@ -170,6 +179,8 @@ #define IRQ_ILR0_REG_OFFSET 0x1c #define IRQ_GMR_REG_OFFSET 0xa0 +#endif + /* * ---------------------------------------------------------------------------- * System control registers @@ -260,32 +271,17 @@ /* * --------------------------------------------------------------------------- - * Serial ports - * --------------------------------------------------------------------------- - */ -#define OMAP_UART1_BASE (unsigned char *)0xfffb0000 -#define OMAP_UART2_BASE (unsigned char *)0xfffb0800 -#define OMAP_UART3_BASE (unsigned char *)0xfffb9800 -#define OMAP_MAX_NR_PORTS 3 -#define OMAP1510_BASE_BAUD (12000000/16) -#define OMAP16XX_BASE_BAUD (48000000/16) - -#define is_omap_port(p) ({int __ret = 0; \ - if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ - p == IO_ADDRESS(OMAP_UART2_BASE) || \ - p == IO_ADDRESS(OMAP_UART3_BASE)) \ - __ret = 1; \ - __ret; \ - }) - -/* - * --------------------------------------------------------------------------- * Processor specific defines * --------------------------------------------------------------------------- */ #include "omap730.h" #include "omap1510.h" + +#ifdef CONFIG_ARCH_OMAP24XX +#include "omap24xx.h" +#endif + #include "omap16xx.h" /* @@ -312,7 +308,6 @@ #ifdef CONFIG_MACH_OMAP_H4 #include "board-h4.h" -#error "Support for H4 board not yet implemented." #endif #ifdef CONFIG_MACH_OMAP_OSK diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 1c8c9fcc766..11fbf629bf7 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -49,16 +49,24 @@ * I/O mapping * ---------------------------------------------------------------------------- */ -#define IO_PHYS 0xFFFB0000 -#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ -#define IO_VIRT (IO_PHYS - IO_OFFSET) -#define IO_SIZE 0x40000 -#define IO_ADDRESS(x) ((x) - IO_OFFSET) -#define PCIO_BASE 0 +#if defined(CONFIG_ARCH_OMAP1) +#define IO_PHYS 0xFFFB0000 +#define IO_OFFSET -0x01000000 /* Virtual IO = 0xfefb0000 */ +#define IO_SIZE 0x40000 -#define io_p2v(x) ((x) - IO_OFFSET) -#define io_v2p(x) ((x) + IO_OFFSET) +#elif defined(CONFIG_ARCH_OMAP2) +#define IO_PHYS 0x48000000 /* L4 peripherals; other stuff has to be mapped * + * manually. */ +#define IO_OFFSET 0x90000000 /* Virtual IO = 0xd8000000 */ +#define IO_SIZE 0x08000000 +#endif + +#define IO_VIRT (IO_PHYS + IO_OFFSET) +#define IO_ADDRESS(x) ((x) + IO_OFFSET) +#define PCIO_BASE 0 +#define io_p2v(x) ((x) + IO_OFFSET) +#define io_v2p(x) ((x) - IO_OFFSET) #ifndef __ASSEMBLER__ @@ -96,6 +104,8 @@ typedef struct { volatile u32 offset[4096]; } __regbase32; ->offset[((vaddr)&4095)>>2] #define __REG32(paddr) __REGV32(io_p2v(paddr)) +extern void omap_map_common_io(void); + #else #define __REG8(paddr) io_p2v(paddr) diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 0d05a7c957d..74e108ccac1 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h @@ -135,7 +135,6 @@ /* * OMAP-1510 specific IRQ numbers for interrupt handler 2 */ -#define INT_1510_OS_32kHz_TIMER (22 + IH2_BASE) #define INT_1510_COM_SPI_RO (31 + IH2_BASE) /* @@ -232,6 +231,11 @@ #define INT_730_DMA_CH15 (62 + IH2_BASE) #define INT_730_NAND (63 + IH2_BASE) +#define INT_24XX_GPIO_BANK1 29 +#define INT_24XX_GPIO_BANK2 30 +#define INT_24XX_GPIO_BANK3 31 +#define INT_24XX_GPIO_BANK4 32 + /* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and * 16 MPUIO lines */ #define OMAP_MAX_GPIO_LINES 192 diff --git a/include/asm-arm/arch-omap/memory.h b/include/asm-arm/arch-omap/memory.h index f6b57dd846a..84f81e315a2 100644 --- a/include/asm-arm/arch-omap/memory.h +++ b/include/asm-arm/arch-omap/memory.h @@ -36,12 +36,11 @@ /* * Physical DRAM offset. */ +#if defined(CONFIG_ARCH_OMAP1) #define PHYS_OFFSET (0x10000000UL) - -/* - * OMAP-1510 Local Bus address offset - */ -#define OMAP1510_LB_OFFSET (0x30000000UL) +#elif defined(CONFIG_ARCH_OMAP2) +#define PHYS_OFFSET (0x80000000UL) +#endif /* * Conversion between SDRAM and fake PCI bus, used by USB @@ -64,6 +63,11 @@ */ #ifdef CONFIG_ARCH_OMAP1510 +/* + * OMAP-1510 Local Bus address offset + */ +#define OMAP1510_LB_OFFSET (0x30000000UL) + #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) #define is_lbus_device(dev) (cpu_is_omap1510() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0)) diff --git a/include/asm-arm/arch-omap/mtd-xip.h b/include/asm-arm/arch-omap/mtd-xip.h new file mode 100644 index 00000000000..a73a28571fe --- /dev/null +++ b/include/asm-arm/arch-omap/mtd-xip.h @@ -0,0 +1,61 @@ +/* + * MTD primitives for XIP support. Architecture specific functions. + * + * Do not include this file directly. It's included from linux/mtd/xip.h + * + * Author: Vladimir Barinov <vbarinov@ru.mvista.com> + * + * (c) 2005 MontaVista Software, Inc. This file is licensed under the + * terms of the GNU General Public License version 2. This program is + * licensed "as is" without any warranty of any kind, whether express or + * implied. + */ + +#ifndef __ARCH_OMAP_MTD_XIP_H__ +#define __ARCH_OMAP_MTD_XIP_H__ + +#include <asm/hardware.h> +#define OMAP_MPU_TIMER_BASE (0xfffec500) +#define OMAP_MPU_TIMER_OFFSET 0x100 + +typedef struct { + u32 cntl; /* CNTL_TIMER, R/W */ + u32 load_tim; /* LOAD_TIM, W */ + u32 read_tim; /* READ_TIM, R */ +} xip_omap_mpu_timer_regs_t; + +#define xip_omap_mpu_timer_base(n) \ +((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ + (n)*OMAP_MPU_TIMER_OFFSET)) + +static inline unsigned long xip_omap_mpu_timer_read(int nr) +{ + volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr); + return timer->read_tim; +} + +#define xip_irqpending() \ + (omap_readl(OMAP_IH1_ITR) & ~omap_readl(OMAP_IH1_MIR)) +#define xip_currtime() (~xip_omap_mpu_timer_read(0)) + +/* + * It's permitted to do approxmation for xip_elapsed_since macro + * (see linux/mtd/xip.h) + */ + +#ifdef CONFIG_MACH_OMAP_PERSEUS2 +#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7) +#else +#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6) +#endif + +/* + * xip_cpu_idle() is used when waiting for a delay equal or larger than + * the system timer tick period. This should put the CPU into idle mode + * to save power and to be woken up only when some interrupts are pending. + * As above, this should not rely upon standard kernel code. + */ + +#define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (1)) + +#endif /* __ARCH_OMAP_MTD_XIP_H__ */ diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h index 5bd3f0097fc..1b1ad410534 100644 --- a/include/asm-arm/arch-omap/mux.h +++ b/include/asm-arm/arch-omap/mux.h @@ -185,6 +185,7 @@ typedef enum { /* MPUIO */ MPUIO2, + N15_1610_MPUIO2, MPUIO4, MPUIO5, T20_1610_MPUIO5, @@ -210,6 +211,7 @@ typedef enum { /* Misc ballouts */ BALLOUT_V8_ARMIO3, + N20_HDQ, /* OMAP-1610 MMC2 */ W8_1610_MMC2_DAT0, @@ -235,6 +237,7 @@ typedef enum { P20_1610_GPIO4, V9_1610_GPIO7, W8_1610_GPIO9, + N20_1610_GPIO11, N19_1610_GPIO13, P10_1610_GPIO22, V5_1610_GPIO24, @@ -250,7 +253,7 @@ typedef enum { U18_1610_UWIRE_SDI, W21_1610_UWIRE_SDO, N14_1610_UWIRE_CS0, - P15_1610_UWIRE_CS0, + P15_1610_UWIRE_CS3, N15_1610_UWIRE_CS1, /* OMAP-1610 Flash */ @@ -411,7 +414,8 @@ MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1) MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1) /* MPUIO */ -MUX_CFG("MPUIO2", 7, 18, 0, 1, 1, 1, NA, 0, 1) +MUX_CFG("MPUIO2", 7, 18, 0, 1, 14, 1, NA, 0, 1) +MUX_CFG("N15_1610_MPUIO2", 7, 18, 0, 1, 14, 1, 1, 0, 1) MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1) MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1) @@ -438,6 +442,7 @@ MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1) /* Misc ballouts */ MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1) +MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0) /* OMAP-1610 MMC2 */ MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1) @@ -463,6 +468,7 @@ MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1) MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1) MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1) MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1) +MUX_CFG("N20_1610_GPIO11", 6, 18, 0, 1, 4, 0, 1, 1, 1) MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1) MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1) MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1) diff --git a/include/asm-arm/arch-omap/omap1510.h b/include/asm-arm/arch-omap/omap1510.h index f491a48ef2e..f086a393390 100644 --- a/include/asm-arm/arch-omap/omap1510.h +++ b/include/asm-arm/arch-omap/omap1510.h @@ -36,10 +36,6 @@ /* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ -#define OMAP1510_SRAM_BASE 0xD0000000 -#define OMAP1510_SRAM_SIZE (SZ_128K + SZ_64K) -#define OMAP1510_SRAM_START 0x20000000 - #define OMAP1510_DSP_BASE 0xE0000000 #define OMAP1510_DSP_SIZE 0x28000 #define OMAP1510_DSP_START 0xE0000000 @@ -48,14 +44,5 @@ #define OMAP1510_DSPREG_SIZE SZ_128K #define OMAP1510_DSPREG_START 0xE1000000 -/* - * ---------------------------------------------------------------------------- - * Memory used by power management - * ---------------------------------------------------------------------------- - */ - -#define OMAP1510_SRAM_IDLE_SUSPEND (OMAP1510_SRAM_BASE + OMAP1510_SRAM_SIZE - 0x200) -#define OMAP1510_SRAM_API_SUSPEND (OMAP1510_SRAM_IDLE_SUSPEND + 0x100) - #endif /* __ASM_ARCH_OMAP1510_H */ diff --git a/include/asm-arm/arch-omap/omap16xx.h b/include/asm-arm/arch-omap/omap16xx.h index 38a9b95e6a3..f0c7f0fb4dc 100644 --- a/include/asm-arm/arch-omap/omap16xx.h +++ b/include/asm-arm/arch-omap/omap16xx.h @@ -36,11 +36,6 @@ /* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ -#define OMAP16XX_SRAM_BASE 0xD0000000 -#define OMAP1610_SRAM_SIZE (SZ_16K) -#define OMAP5912_SRAM_SIZE 0x3E800 -#define OMAP16XX_SRAM_START 0x20000000 - #define OMAP16XX_DSP_BASE 0xE0000000 #define OMAP16XX_DSP_SIZE 0x28000 #define OMAP16XX_DSP_START 0xE0000000 @@ -50,17 +45,6 @@ #define OMAP16XX_DSPREG_START 0xE1000000 /* - * ---------------------------------------------------------------------------- - * Memory used by power management - * ---------------------------------------------------------------------------- - */ - -#define OMAP1610_SRAM_IDLE_SUSPEND (OMAP16XX_SRAM_BASE + OMAP1610_SRAM_SIZE - 0x200) -#define OMAP1610_SRAM_API_SUSPEND (OMAP1610_SRAM_IDLE_SUSPEND + 0x100) -#define OMAP5912_SRAM_IDLE_SUSPEND (OMAP16XX_SRAM_BASE + OMAP5912_SRAM_SIZE - 0x200) -#define OMAP5912_SRAM_API_SUSPEND (OMAP5912_SRAM_IDLE_SUSPEND + 0x100) - -/* * --------------------------------------------------------------------------- * Interrupts * --------------------------------------------------------------------------- diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h new file mode 100644 index 00000000000..a9105466a41 --- /dev/null +++ b/include/asm-arm/arch-omap/omap24xx.h @@ -0,0 +1,15 @@ +#ifndef __ASM_ARCH_OMAP24XX_H +#define __ASM_ARCH_OMAP24XX_H + +#define OMAP24XX_L4_IO_BASE 0x48000000 + +/* interrupt controller */ +#define OMAP24XX_IC_BASE (OMAP24XX_L4_IO_BASE + 0xfe000) +#define VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) + +#define OMAP24XX_IVA_INTC_BASE 0x40000000 + +#define IRQ_SIR_IRQ 0x0040 + +#endif /* __ASM_ARCH_OMAP24XX_H */ + diff --git a/include/asm-arm/arch-omap/omap730.h b/include/asm-arm/arch-omap/omap730.h index 599ab00f548..755b64c5e9f 100644 --- a/include/asm-arm/arch-omap/omap730.h +++ b/include/asm-arm/arch-omap/omap730.h @@ -36,10 +36,6 @@ /* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ -#define OMAP730_SRAM_BASE 0xD0000000 -#define OMAP730_SRAM_SIZE (SZ_128K + SZ_64K + SZ_8K) -#define OMAP730_SRAM_START 0x20000000 - #define OMAP730_DSP_BASE 0xE0000000 #define OMAP730_DSP_SIZE 0x50000 #define OMAP730_DSP_START 0xE0000000 diff --git a/include/asm-arm/arch-omap/pm.h b/include/asm-arm/arch-omap/pm.h index f209fc0953f..fbd742d0c49 100644 --- a/include/asm-arm/arch-omap/pm.h +++ b/include/asm-arm/arch-omap/pm.h @@ -61,7 +61,10 @@ #define PER_EN 0x1 #define CPU_SUSPEND_SIZE 200 -#define ULPD_LOW_POWER_EN 0x0001 +#define ULPD_LOW_PWR_EN 0x0001 +#define ULPD_DEEP_SLEEP_TRANSITION_EN 0x0010 +#define ULPD_SETUP_ANALOG_CELL_3_VAL 0 +#define ULPD_POWER_CTRL_REG_VAL 0x0219 #define DSP_IDLE_DELAY 10 #define DSP_IDLE 0x0040 @@ -86,46 +89,35 @@ #define OMAP1510_BIG_SLEEP_REQUEST 0x0cc5 #define OMAP1510_IDLE_LOOP_REQUEST 0x0c00 #define OMAP1510_IDLE_CLOCK_DOMAINS 0x2 -#define OMAP1510_ULPD_LOW_POWER_REQ 0x0001 -#define OMAP1610_DEEP_SLEEP_REQUEST 0x17c7 -#define OMAP1610_BIG_SLEEP_REQUEST TBD +/* Both big sleep and deep sleep use same values. Difference is in ULPD. */ +#define OMAP1610_IDLECT1_SLEEP_VAL 0x13c7 +#define OMAP1610_IDLECT2_SLEEP_VAL 0x09c7 +#define OMAP1610_IDLECT3_VAL 0x3f +#define OMAP1610_IDLECT3_SLEEP_ORMASK 0x2c +#define OMAP1610_IDLECT3 0xfffece24 #define OMAP1610_IDLE_LOOP_REQUEST 0x0400 -#define OMAP1610_IDLE_CLOCK_DOMAINS 0x09c7 -#define OMAP1610_ULPD_LOW_POWER_REQ 0x3 - -#ifndef OMAP1510_SRAM_IDLE_SUSPEND -#define OMAP1510_SRAM_IDLE_SUSPEND 0 -#endif -#ifndef OMAP1610_SRAM_IDLE_SUSPEND -#define OMAP1610_SRAM_IDLE_SUSPEND 0 -#endif -#ifndef OMAP5912_SRAM_IDLE_SUSPEND -#define OMAP5912_SRAM_IDLE_SUSPEND 0 -#endif - -#ifndef OMAP1510_SRAM_API_SUSPEND -#define OMAP1510_SRAM_API_SUSPEND 0 -#endif -#ifndef OMAP1610_SRAM_API_SUSPEND -#define OMAP1610_SRAM_API_SUSPEND 0 -#endif -#ifndef OMAP5912_SRAM_API_SUSPEND -#define OMAP5912_SRAM_API_SUSPEND 0 -#endif #if !defined(CONFIG_ARCH_OMAP1510) && \ - !defined(CONFIG_ARCH_OMAP16XX) + !defined(CONFIG_ARCH_OMAP16XX) && \ + !defined(CONFIG_ARCH_OMAP24XX) #error "Power management for this processor not implemented yet" #endif #ifndef __ASSEMBLER__ extern void omap_pm_idle(void); extern void omap_pm_suspend(void); -extern int omap1510_cpu_suspend(unsigned short, unsigned short); -extern int omap1610_cpu_suspend(unsigned short, unsigned short); -extern int omap1510_idle_loop_suspend(void); -extern int omap1610_idle_loop_suspend(void); +extern void omap1510_cpu_suspend(unsigned short, unsigned short); +extern void omap1610_cpu_suspend(unsigned short, unsigned short); +extern void omap1510_idle_loop_suspend(void); +extern void omap1610_idle_loop_suspend(void); + +#ifdef CONFIG_OMAP_SERIAL_WAKE +extern void omap_serial_wake_trigger(int enable); +#else +#define omap_serial_wake_trigger(x) {} +#endif /* CONFIG_OMAP_SERIAL_WAKE */ + extern unsigned int omap1510_cpu_suspend_sz; extern unsigned int omap1510_idle_loop_suspend_sz; extern unsigned int omap1610_cpu_suspend_sz; @@ -161,6 +153,7 @@ enum arm_save_state { ARM_SLEEP_SAVE_ARM_CKCTL, ARM_SLEEP_SAVE_ARM_IDLECT1, ARM_SLEEP_SAVE_ARM_IDLECT2, + ARM_SLEEP_SAVE_ARM_IDLECT3, ARM_SLEEP_SAVE_ARM_EWUPCT, ARM_SLEEP_SAVE_ARM_RSTCT1, ARM_SLEEP_SAVE_ARM_RSTCT2, diff --git a/include/asm-arm/arch-omap/serial.h b/include/asm-arm/arch-omap/serial.h new file mode 100644 index 00000000000..79a5297af9f --- /dev/null +++ b/include/asm-arm/arch-omap/serial.h @@ -0,0 +1,37 @@ +/* + * linux/include/asm-arm/arch-omap/serial.h + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_SERIAL_H +#define __ASM_ARCH_SERIAL_H + +#if defined(CONFIG_ARCH_OMAP1) +/* OMAP1 serial ports */ +#define OMAP_UART1_BASE 0xfffb0000 +#define OMAP_UART2_BASE 0xfffb0800 +#define OMAP_UART3_BASE 0xfffb9800 +#elif defined(CONFIG_ARCH_OMAP2) +/* OMAP2 serial ports */ +#define OMAP_UART1_BASE 0x4806a000 +#define OMAP_UART2_BASE 0x4806c000 +#define OMAP_UART3_BASE 0x4806e000 +#endif + +#define OMAP_MAX_NR_PORTS 3 +#define OMAP1510_BASE_BAUD (12000000/16) +#define OMAP16XX_BASE_BAUD (48000000/16) + +#define is_omap_port(p) ({int __ret = 0; \ + if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ + p == IO_ADDRESS(OMAP_UART2_BASE) || \ + p == IO_ADDRESS(OMAP_UART3_BASE)) \ + __ret = 1; \ + __ret; \ + }) + +#endif diff --git a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h index 3e640aba8c2..3545c86859c 100644 --- a/include/asm-arm/arch-omap/uncompress.h +++ b/include/asm-arm/arch-omap/uncompress.h @@ -20,7 +20,7 @@ #include <linux/config.h> #include <linux/types.h> #include <linux/serial_reg.h> -#include <asm/arch/hardware.h> +#include <asm/arch/serial.h> unsigned int system_rev; @@ -34,8 +34,9 @@ static void putstr(const char *s) { volatile u8 * uart = 0; - int shift; + int shift = 2; +#ifdef CONFIG_ARCH_OMAP #ifdef CONFIG_OMAP_LL_DEBUG_UART3 uart = (volatile u8 *)(OMAP_UART3_BASE); #elif CONFIG_OMAP_LL_DEBUG_UART2 @@ -44,6 +45,7 @@ putstr(const char *s) uart = (volatile u8 *)(OMAP_UART1_BASE); #endif +#ifdef CONFIG_ARCH_OMAP1 /* Determine which serial port to use */ do { /* MMU is not on, so cpu_is_omapXXXX() won't work here */ @@ -51,14 +53,14 @@ putstr(const char *s) if (omap_id == OMAP_ID_730) shift = 0; - else - shift = 2; if (check_port(uart, shift)) break; /* Silent boot if no serial ports are enabled. */ return; } while (0); +#endif /* CONFIG_ARCH_OMAP1 */ +#endif /* * Now, xmit each character diff --git a/include/asm-arm/arch-pxa/corgi.h b/include/asm-arm/arch-pxa/corgi.h index 324db06b5dd..4b7aa0b8391 100644 --- a/include/asm-arm/arch-pxa/corgi.h +++ b/include/asm-arm/arch-pxa/corgi.h @@ -103,18 +103,20 @@ * Shared data structures */ extern struct platform_device corgiscoop_device; +extern struct platform_device corgissp_device; +extern struct platform_device corgifb_device; /* * External Functions */ extern unsigned long corgi_ssp_ads7846_putget(unsigned long); extern unsigned long corgi_ssp_ads7846_get(void); -extern void corgi_ssp_ads7846_put(ulong data); +extern void corgi_ssp_ads7846_put(unsigned long data); extern void corgi_ssp_ads7846_lock(void); extern void corgi_ssp_ads7846_unlock(void); -extern void corgi_ssp_lcdtg_send (u8 adrs, u8 data); +extern void corgi_ssp_lcdtg_send (unsigned char adrs, unsigned char data); extern void corgi_ssp_blduty_set(int duty); -extern int corgi_ssp_max1111_get(ulong data); +extern int corgi_ssp_max1111_get(unsigned long data); #endif /* __ASM_ARCH_CORGI_H */ diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index 72b04d846a2..cf35721cfa4 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h @@ -44,24 +44,12 @@ #ifndef __ASSEMBLY__ -#if 0 -# define __REG(x) (*((volatile u32 *)io_p2v(x))) -#else -/* - * This __REG() version gives the same results as the one above, except - * that we are fooling gcc somehow so it generates far better and smaller - * assembly code for access to contigous registers. It's a shame that gcc - * doesn't guess this by itself. - */ -#include <asm/types.h> -typedef struct { volatile u32 offset[4096]; } __regbase; -# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2] -# define __REG(x) __REGP(io_p2v(x)) -#endif +# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) /* With indexed regs we don't want to feed the index through io_p2v() especially if it is a variable, otherwise horrible code will result. */ -# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) +# define __REG2(x,y) \ + (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y))) # define __PREG(x) (io_v2p((u32)&(x))) diff --git a/include/asm-arm/arch-pxa/i2c.h b/include/asm-arm/arch-pxa/i2c.h new file mode 100644 index 00000000000..46ec2243974 --- /dev/null +++ b/include/asm-arm/arch-pxa/i2c.h @@ -0,0 +1,70 @@ +/* + * i2c_pxa.h + * + * Copyright (C) 2002 Intrinsyc Software Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef _I2C_PXA_H_ +#define _I2C_PXA_H_ + +#if 0 +#define DEF_TIMEOUT 3 +#else +/* need a longer timeout if we're dealing with the fact we may well be + * looking at a multi-master environment +*/ +#define DEF_TIMEOUT 32 +#endif + +#define BUS_ERROR (-EREMOTEIO) +#define XFER_NAKED (-ECONNREFUSED) +#define I2C_RETRY (-2000) /* an error has occurred retry transmit */ + +/* ICR initialize bit values +* +* 15. FM 0 (100 Khz operation) +* 14. UR 0 (No unit reset) +* 13. SADIE 0 (Disables the unit from interrupting on slave addresses +* matching its slave address) +* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration +* in master mode) +* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) +* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) +* 9. IRFIE 1 (Enable interrupts from full buffer received) +* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) +* 7. GCD 1 (Disables i2c unit response to general call messages as a slave) +* 6. IUE 0 (Disable unit until we change settings) +* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL) +* 4. MA 0 (Only send stop with the ICR stop bit) +* 3. TB 0 (We are not transmitting a byte initially) +* 2. ACKNAK 0 (Send an ACK after the unit receives a byte) +* 1. STOP 0 (Do not send a STOP) +* 0. START 0 (Do not send a START) +* +*/ +#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) + +/* I2C status register init values + * + * 10. BED 1 (Clear bus error detected) + * 9. SAD 1 (Clear slave address detected) + * 7. IRF 1 (Clear IDBR Receive Full) + * 6. ITE 1 (Clear IDBR Transmit Empty) + * 5. ALD 1 (Clear Arbitration Loss Detected) + * 4. SSD 1 (Clear Slave Stop Detected) + */ +#define I2C_ISR_INIT 0x7FF /* status register init */ + +struct i2c_slave_client; + +struct i2c_pxa_platform_data { + unsigned int slave_addr; + struct i2c_slave_client *slave; +}; + +extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); +#endif diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h index 7492ea7ea61..88c17dd02ed 100644 --- a/include/asm-arm/arch-pxa/mmc.h +++ b/include/asm-arm/arch-pxa/mmc.h @@ -9,7 +9,9 @@ struct mmc_host; struct pxamci_platform_data { unsigned int ocr_mask; /* available voltages */ + unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */ int (*init)(struct device *, irqreturn_t (*)(int, void *, struct pt_regs *), void *); + int (*get_ro)(struct device *); void (*setpower)(struct device *, unsigned int); void (*exit)(struct device *, void *); }; diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h index 27d71e9d413..21c0e16dce5 100644 --- a/include/asm-arm/arch-pxa/pxafb.h +++ b/include/asm-arm/arch-pxa/pxafb.h @@ -66,3 +66,4 @@ struct pxafb_mach_info { }; void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); +unsigned long pxafb_get_hsync_time(struct device *dev); diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h new file mode 100644 index 00000000000..5675b1796b5 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h @@ -0,0 +1,24 @@ +/* linux/include/asm-arm/arch-s3c2410/anubis-cpld.h + * + * (c) 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * ANUBIS - CPLD control constants + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + * +*/ + +#ifndef __ASM_ARCH_ANUBISCPLD_H +#define __ASM_ARCH_ANUBISCPLD_H + +/* CTRL2 - NAND WP control, IDE Reset assert/check */ + +#define ANUBIS_CTRL1_NANDSEL (0x3) + +#endif /* __ASM_ARCH_ANUBISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-irq.h b/include/asm-arm/arch-s3c2410/anubis-irq.h new file mode 100644 index 00000000000..82f15dbd97e --- /dev/null +++ b/include/asm-arm/arch-s3c2410/anubis-irq.h @@ -0,0 +1,23 @@ +/* linux/include/asm-arm/arch-s3c2410/anubis-irq.h + * + * (c) 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * ANUBIS - IRQ Number definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: + */ + +#ifndef __ASM_ARCH_ANUBISIRQ_H +#define __ASM_ARCH_ANUBISIRQ_H + +#define IRQ_IDE0 IRQ_EINT2 +#define IRQ_IDE1 IRQ_EINT3 +#define IRQ_ASIX IRQ_EINT1 + +#endif /* __ASM_ARCH_ANUBISIRQ_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h new file mode 100644 index 00000000000..97741d6e506 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -0,0 +1,46 @@ +/* linux/include/asm-arm/arch-s3c2410/anubis-map.h + * + * (c) 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * ANUBIS - Memory map definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Changelog: +*/ + +/* needs arch/map.h including with this */ + +#ifndef __ASM_ARCH_ANUBISMAP_H +#define __ASM_ARCH_ANUBISMAP_H + +/* start peripherals off after the S3C2410 */ + +#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x02000000)) + +#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) + +/* we put the CPLD registers next, to get them out of the way */ + +#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01300000 */ +#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) + +#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01400000 */ +#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) + +#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01500000 */ +#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) + +#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01600000 */ +#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) + +#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) +#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) +#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000) +#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000) + +#endif /* __ASM_ARCH_ANUBISMAP_H */ diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h new file mode 100644 index 00000000000..ac57bc887d8 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/fb.h @@ -0,0 +1,69 @@ +/* linux/include/asm/arch-s3c2410/fb.h + * + * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org> + * + * Inspired by pxafb.h + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * + * Changelog: + * 07-Sep-2004 RTP Created file + * 03-Nov-2004 BJD Updated and minor cleanups + * 03-Aug-2005 RTP Renamed to fb.h +*/ + +#ifndef __ASM_ARM_FB_H +#define __ASM_ARM_FB_H + +#include <asm/arch/regs-lcd.h> + +struct s3c2410fb_val { + unsigned int defval; + unsigned int min; + unsigned int max; +}; + +struct s3c2410fb_hw { + unsigned long lcdcon1; + unsigned long lcdcon2; + unsigned long lcdcon3; + unsigned long lcdcon4; + unsigned long lcdcon5; +}; + +struct s3c2410fb_mach_info { + unsigned char fixed_syncs; /* do not update sync/border */ + + /* Screen size */ + int width; + int height; + + /* Screen info */ + struct s3c2410fb_val xres; + struct s3c2410fb_val yres; + struct s3c2410fb_val bpp; + + /* lcd configuration registers */ + struct s3c2410fb_hw regs; + + /* GPIOs */ + + unsigned long gpcup; + unsigned long gpcup_mask; + unsigned long gpccon; + unsigned long gpccon_mask; + unsigned long gpdup; + unsigned long gpdup_mask; + unsigned long gpdcon; + unsigned long gpdcon_mask; + + /* lpc3600 control register */ + unsigned long lpcsel; +}; + +void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info); + +#endif /* __ASM_ARM_FB_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-lcd.h b/include/asm-arm/arch-s3c2410/regs-lcd.h index 7f882ea92b2..b6b1b4e8bbe 100644 --- a/include/asm-arm/arch-s3c2410/regs-lcd.h +++ b/include/asm-arm/arch-s3c2410/regs-lcd.h @@ -51,21 +51,32 @@ #define S3C2410_LCDCON1_ENVID (1) +#define S3C2410_LCDCON1_MODEMASK 0x1E + #define S3C2410_LCDCON2_VBPD(x) ((x) << 24) #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) #define S3C2410_LCDCON2_VFPD(x) ((x) << 6) #define S3C2410_LCDCON2_VSPW(x) ((x) << 0) +#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) +#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) +#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) + #define S3C2410_LCDCON3_HBPD(x) ((x) << 19) #define S3C2410_LCDCON3_WDLY(x) ((x) << 19) #define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8) #define S3C2410_LCDCON3_HFPD(x) ((x) << 0) #define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0) +#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F) +#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF) + #define S3C2410_LCDCON4_MVAL(x) ((x) << 8) #define S3C2410_LCDCON4_HSPW(x) ((x) << 0) #define S3C2410_LCDCON4_WLH(x) ((x) << 0) +#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF) + #define S3C2410_LCDCON5_BPP24BL (1<<12) #define S3C2410_LCDCON5_FRM565 (1<<11) #define S3C2410_LCDCON5_INVVCLK (1<<10) @@ -100,10 +111,16 @@ #define S3C2410_DITHMODE S3C2410_LCDREG(0x4C) #define S3C2410_TPAL S3C2410_LCDREG(0x50) +#define S3C2410_TPAL_EN (1<<24) + /* interrupt info */ #define S3C2410_LCDINTPND S3C2410_LCDREG(0x54) #define S3C2410_LCDSRCPND S3C2410_LCDREG(0x58) #define S3C2410_LCDINTMSK S3C2410_LCDREG(0x5C) +#define S3C2410_LCDINT_FIWSEL (1<<2) +#define S3C2410_LCDINT_FRSYNC (1<<1) +#define S3C2410_LCDINT_FICNT (1<<0) + #define S3C2410_LPCSEL S3C2410_LCDREG(0x60) #define S3C2410_TFTPAL(x) S3C2410_LCDREG((0x400 + (x)*4)) diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 10c62db3436..19c3b1e186b 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -49,23 +49,9 @@ ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) #ifndef __ASSEMBLY__ -#include <asm/types.h> -#if 0 -# define __REG(x) (*((volatile u32 *)io_p2v(x))) -#else -/* - * This __REG() version gives the same results as the one above, except - * that we are fooling gcc somehow so it generates far better and smaller - * assembly code for access to contigous registers. It's a shame that gcc - * doesn't guess this by itself. - */ -typedef struct { volatile u32 offset[4096]; } __regbase; -# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2] -# define __REG(x) __REGP(io_p2v(x)) -#endif - -# define __PREG(x) (io_v2p((u32)&(x))) +# define __REG(x) (*((volatile unsigned long *)io_p2v(x))) +# define __PREG(x) (io_v2p((unsigned long)&(x))) #else diff --git a/include/asm-arm/auxvec.h b/include/asm-arm/auxvec.h new file mode 100644 index 00000000000..c0536f6b29a --- /dev/null +++ b/include/asm-arm/auxvec.h @@ -0,0 +1,4 @@ +#ifndef __ASMARM_AUXVEC_H +#define __ASMARM_AUXVEC_H + +#endif diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 035cdcff43d..e81baff4f54 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -256,7 +256,7 @@ extern void dmac_flush_range(unsigned long, unsigned long); * Convert calls to our calling convention. */ #define flush_cache_all() __cpuc_flush_kern_all() - +#ifndef CONFIG_CPU_CACHE_VIPT static inline void flush_cache_mm(struct mm_struct *mm) { if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) @@ -279,6 +279,11 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned l __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); } } +#else +extern void flush_cache_mm(struct mm_struct *mm); +extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); +extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); +#endif /* * flush_cache_user_range is used when we want to ensure that the diff --git a/include/asm-arm/fcntl.h b/include/asm-arm/fcntl.h index 485b6bdf4d7..a80b6607b2e 100644 --- a/include/asm-arm/fcntl.h +++ b/include/asm-arm/fcntl.h @@ -1,87 +1,11 @@ #ifndef _ARM_FCNTL_H #define _ARM_FCNTL_H -/* open/fcntl - O_SYNC is only implemented on blocks devices and on files - located on an ext2 file system */ -#define O_ACCMODE 0003 -#define O_RDONLY 00 -#define O_WRONLY 01 -#define O_RDWR 02 -#define O_CREAT 0100 /* not fcntl */ -#define O_EXCL 0200 /* not fcntl */ -#define O_NOCTTY 0400 /* not fcntl */ -#define O_TRUNC 01000 /* not fcntl */ -#define O_APPEND 02000 -#define O_NONBLOCK 04000 -#define O_NDELAY O_NONBLOCK -#define O_SYNC 010000 -#define FASYNC 020000 /* fcntl, for BSD compatibility */ #define O_DIRECTORY 040000 /* must be a directory */ #define O_NOFOLLOW 0100000 /* don't follow links */ #define O_DIRECT 0200000 /* direct disk access hint - currently ignored */ #define O_LARGEFILE 0400000 -#define O_NOATIME 01000000 -#define F_DUPFD 0 /* dup */ -#define F_GETFD 1 /* get close_on_exec */ -#define F_SETFD 2 /* set/clear close_on_exec */ -#define F_GETFL 3 /* get file->f_flags */ -#define F_SETFL 4 /* set file->f_flags */ -#define F_GETLK 5 -#define F_SETLK 6 -#define F_SETLKW 7 +#include <asm-generic/fcntl.h> -#define F_SETOWN 8 /* for sockets. */ -#define F_GETOWN 9 /* for sockets. */ -#define F_SETSIG 10 /* for sockets. */ -#define F_GETSIG 11 /* for sockets. */ - -#define F_GETLK64 12 /* using 'struct flock64' */ -#define F_SETLK64 13 -#define F_SETLKW64 14 - -/* for F_[GET|SET]FL */ -#define FD_CLOEXEC 1 /* actually anything with low bit set goes */ - -/* for posix fcntl() and lockf() */ -#define F_RDLCK 0 -#define F_WRLCK 1 -#define F_UNLCK 2 - -/* for old implementation of bsd flock () */ -#define F_EXLCK 4 /* or 3 */ -#define F_SHLCK 8 /* or 4 */ - -/* for leases */ -#define F_INPROGRESS 16 - -/* operations for bsd flock(), also used by the kernel implementation */ -#define LOCK_SH 1 /* shared lock */ -#define LOCK_EX 2 /* exclusive lock */ -#define LOCK_NB 4 /* or'd with one of the above to prevent - blocking */ -#define LOCK_UN 8 /* remove lock */ - -#define LOCK_MAND 32 /* This is a mandatory flock */ -#define LOCK_READ 64 /* ... Which allows concurrent read operations */ -#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */ -#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */ - -struct flock { - short l_type; - short l_whence; - off_t l_start; - off_t l_len; - pid_t l_pid; -}; - -struct flock64 { - short l_type; - short l_whence; - loff_t l_start; - loff_t l_len; - pid_t l_pid; -}; - -#define F_LINUX_SPECIFIC_BASE 1024 #endif diff --git a/include/asm-arm/futex.h b/include/asm-arm/futex.h new file mode 100644 index 00000000000..2cac5ecd9d0 --- /dev/null +++ b/include/asm-arm/futex.h @@ -0,0 +1,53 @@ +#ifndef _ASM_FUTEX_H +#define _ASM_FUTEX_H + +#ifdef __KERNEL__ + +#include <linux/futex.h> +#include <asm/errno.h> +#include <asm/uaccess.h> + +static inline int +futex_atomic_op_inuser (int encoded_op, int __user *uaddr) +{ + int op = (encoded_op >> 28) & 7; + int cmp = (encoded_op >> 24) & 15; + int oparg = (encoded_op << 8) >> 20; + int cmparg = (encoded_op << 20) >> 20; + int oldval = 0, ret, tem; + if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) + oparg = 1 << oparg; + + if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + + inc_preempt_count(); + + switch (op) { + case FUTEX_OP_SET: + case FUTEX_OP_ADD: + case FUTEX_OP_OR: + case FUTEX_OP_ANDN: + case FUTEX_OP_XOR: + default: + ret = -ENOSYS; + } + + dec_preempt_count(); + + if (!ret) { + switch (cmp) { + case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; + case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; + case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; + case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; + case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; + case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; + default: ret = -ENOSYS; + } + } + return ret; +} + +#endif +#endif diff --git a/include/asm-arm/hdreg.h b/include/asm-arm/hdreg.h deleted file mode 100644 index 7f7fd1af0af..00000000000 --- a/include/asm-arm/hdreg.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-generic/hdreg.h> diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index 38ea5899a58..ead3ced38cb 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h @@ -64,6 +64,19 @@ extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, struct pci_bus_region *region); +static inline struct resource * +pcibios_select_root(struct pci_dev *pdev, struct resource *res) +{ + struct resource *root = NULL; + + if (res->flags & IORESOURCE_IO) + root = &ioport_resource; + if (res->flags & IORESOURCE_MEM) + root = &iomem_resource; + + return root; +} + static inline void pcibios_add_platform_entries(struct pci_dev *dev) { } diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h index 1f906d09b68..cb4906b4555 100644 --- a/include/asm-arm/spinlock.h +++ b/include/asm-arm/spinlock.h @@ -16,21 +16,14 @@ * Unlocked value: 0 * Locked value: 1 */ -typedef struct { - volatile unsigned int lock; -#ifdef CONFIG_PREEMPT - unsigned int break_lock; -#endif -} spinlock_t; -#define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } +#define __raw_spin_is_locked(x) ((x)->lock != 0) +#define __raw_spin_unlock_wait(lock) \ + do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) -#define spin_lock_init(x) do { *(x) = SPIN_LOCK_UNLOCKED; } while (0) -#define spin_is_locked(x) ((x)->lock != 0) -#define spin_unlock_wait(x) do { barrier(); } while (spin_is_locked(x)) -#define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) +#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) -static inline void _raw_spin_lock(spinlock_t *lock) +static inline void __raw_spin_lock(raw_spinlock_t *lock) { unsigned long tmp; @@ -47,7 +40,7 @@ static inline void _raw_spin_lock(spinlock_t *lock) smp_mb(); } -static inline int _raw_spin_trylock(spinlock_t *lock) +static inline int __raw_spin_trylock(raw_spinlock_t *lock) { unsigned long tmp; @@ -67,7 +60,7 @@ static inline int _raw_spin_trylock(spinlock_t *lock) } } -static inline void _raw_spin_unlock(spinlock_t *lock) +static inline void __raw_spin_unlock(raw_spinlock_t *lock) { smp_mb(); @@ -80,23 +73,14 @@ static inline void _raw_spin_unlock(spinlock_t *lock) /* * RWLOCKS - */ -typedef struct { - volatile unsigned int lock; -#ifdef CONFIG_PREEMPT - unsigned int break_lock; -#endif -} rwlock_t; - -#define RW_LOCK_UNLOCKED (rwlock_t) { 0 } -#define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while (0) -#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0) - -/* + * + * * Write locks are easy - we just set bit 31. When unlocking, we can * just write zero since the lock is exclusively held. */ -static inline void _raw_write_lock(rwlock_t *rw) +#define rwlock_is_locked(x) (*((volatile unsigned int *)(x)) != 0) + +static inline void __raw_write_lock(rwlock_t *rw) { unsigned long tmp; @@ -113,7 +97,7 @@ static inline void _raw_write_lock(rwlock_t *rw) smp_mb(); } -static inline int _raw_write_trylock(rwlock_t *rw) +static inline int __raw_write_trylock(rwlock_t *rw) { unsigned long tmp; @@ -133,7 +117,7 @@ static inline int _raw_write_trylock(rwlock_t *rw) } } -static inline void _raw_write_unlock(rwlock_t *rw) +static inline void __raw_write_unlock(raw_rwlock_t *rw) { smp_mb(); @@ -156,7 +140,7 @@ static inline void _raw_write_unlock(rwlock_t *rw) * currently active. However, we know we won't have any write * locks. */ -static inline void _raw_read_lock(rwlock_t *rw) +static inline void __raw_read_lock(raw_rwlock_t *rw) { unsigned long tmp, tmp2; @@ -173,7 +157,7 @@ static inline void _raw_read_lock(rwlock_t *rw) smp_mb(); } -static inline void _raw_read_unlock(rwlock_t *rw) +static inline void __raw_read_unlock(rwlock_t *rw) { unsigned long tmp, tmp2; @@ -190,6 +174,6 @@ static inline void _raw_read_unlock(rwlock_t *rw) : "cc"); } -#define _raw_read_trylock(lock) generic_raw_read_trylock(lock) +#define __raw_read_trylock(lock) generic__raw_read_trylock(lock) #endif /* __ASM_SPINLOCK_H */ diff --git a/include/asm-arm/spinlock_types.h b/include/asm-arm/spinlock_types.h new file mode 100644 index 00000000000..43e83f6d2ee --- /dev/null +++ b/include/asm-arm/spinlock_types.h @@ -0,0 +1,20 @@ +#ifndef __ASM_SPINLOCK_TYPES_H +#define __ASM_SPINLOCK_TYPES_H + +#ifndef __LINUX_SPINLOCK_TYPES_H +# error "please don't include this file directly" +#endif + +typedef struct { + volatile unsigned int lock; +} raw_spinlock_t; + +#define __RAW_SPIN_LOCK_UNLOCKED { 0 } + +typedef struct { + volatile unsigned int lock; +} raw_rwlock_t; + +#define __RAW_RW_LOCK_UNLOCKED { 0 } + +#endif diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h index a7c018b8a0d..a2fdad0138b 100644 --- a/include/asm-arm/uaccess.h +++ b/include/asm-arm/uaccess.h @@ -77,12 +77,6 @@ static inline void set_fs (mm_segment_t fs) #define access_ok(type,addr,size) (__range_ok(addr,size) == 0) -/* this function will go away soon - use access_ok() instead */ -static inline int __deprecated verify_area(int type, const void __user *addr, unsigned long size) -{ - return access_ok(type, addr, size) ? 0 : -EFAULT; -} - /* * Single-value transfer routines. They automatically use the right * size if we just have the right pointer type. Note that the functions diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 278de61224d..c49df635a80 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -355,6 +355,9 @@ #define __NR_inotify_init (__NR_SYSCALL_BASE+316) #define __NR_inotify_add_watch (__NR_SYSCALL_BASE+317) #define __NR_inotify_rm_watch (__NR_SYSCALL_BASE+318) +#define __NR_mbind (__NR_SYSCALL_BASE+319) +#define __NR_get_mempolicy (__NR_SYSCALL_BASE+320) +#define __NR_set_mempolicy (__NR_SYSCALL_BASE+321) /* * The following SWIs are ARM private. |