diff options
Diffstat (limited to 'drivers')
| -rwxr-xr-x | drivers/ata/sata_dwc_pmp.c | 16 | ||||
| -rw-r--r-- | drivers/char/hw_random/trng4xx.c | 2 | ||||
| -rw-r--r-- | drivers/crypto/amcc/crypto4xx_alg.c | 50 | ||||
| -rw-r--r-- | drivers/crypto/amcc/crypto4xx_core.c | 47 | ||||
| -rw-r--r-- | drivers/crypto/amcc/crypto4xx_core.h | 44 | ||||
| -rw-r--r-- | drivers/md/raid0.c | 2 | ||||
| -rw-r--r-- | drivers/md/raid5.c | 31 | ||||
| -rw-r--r-- | drivers/mtd/maps/physmap_of.c | 9 | ||||
| -rw-r--r-- | drivers/mtd/nand/ndfc.c | 2 | ||||
| -rw-r--r-- | drivers/net/ibm_newemac/core.c | 23 | ||||
| -rw-r--r-- | drivers/net/ibm_newemac/phy.c | 26 |
11 files changed, 207 insertions, 45 deletions
diff --git a/drivers/ata/sata_dwc_pmp.c b/drivers/ata/sata_dwc_pmp.c index c1b0cff6ae6..df3b490f86e 100755 --- a/drivers/ata/sata_dwc_pmp.c +++ b/drivers/ata/sata_dwc_pmp.c @@ -104,8 +104,8 @@ #define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length */ #endif -#if defined(CONFIG_APM82181) - extern void signal_hdd_led(int, int); +#if defined(CONFIG_APOLLO3G) +extern void signal_hdd_led(int, int); #endif struct dmareg { u32 low; /* Low bits 0-31 */ @@ -1033,8 +1033,8 @@ static void dma_dwc_xfer_start(int dma_ch) #endif -#if defined(CONFIG_APM82181) - signal_hdd_led(1 /*blink=yes*/, 2 /* _3G_LED_GREEN */); +#if defined(CONFIG_APOLLO3G) + signal_hdd_led(1 /*blink=yes*/, 2 /* _3G_LED_GREEN */); #endif } @@ -1742,7 +1742,9 @@ static irqreturn_t sata_dwc_isr(int irq, void *dev_instance) if (intpr & SATA_DWC_INTPR_ERR) { sata_dwc_error_intr(ap, hsdev, intpr); handled = 1; - signal_hdd_led(0 /*off blink*/, 1 /*red color*/); +#if defined(CONFIG_APOLLO3G) + signal_hdd_led(0 /*off blink*/, 1 /*red color*/); +#endif goto done_irqrestore; } @@ -1928,8 +1930,8 @@ still_busy: done_irqrestore: spin_unlock_irqrestore(&host->lock, flags); -#if defined(CONFIG_APM82181) - signal_hdd_led(0 /*off blink*/, -1 /* no color */); +#if defined(CONFIG_APOLLO3G) + signal_hdd_led(0 /*off blink*/, -1 /* no color */); #endif return IRQ_RETVAL(handled); } diff --git a/drivers/char/hw_random/trng4xx.c b/drivers/char/hw_random/trng4xx.c index ece45e74aa1..ae62cc20693 100644 --- a/drivers/char/hw_random/trng4xx.c +++ b/drivers/char/hw_random/trng4xx.c @@ -162,7 +162,7 @@ static void trng4xx_chk_overflow(void) } __attribute__((packed)); - rc = trng4xx_hw_write32(TRNG4XX_ALARMCNT_ADDR, val); + rc = trng4xx_hw_read32(TRNG4XX_ALARMCNT_ADDR, &val); if (rc != 0) return; diff --git a/drivers/crypto/amcc/crypto4xx_alg.c b/drivers/crypto/amcc/crypto4xx_alg.c index 9d81d8f7571..79fe7ec3306 100644 --- a/drivers/crypto/amcc/crypto4xx_alg.c +++ b/drivers/crypto/amcc/crypto4xx_alg.c @@ -366,7 +366,6 @@ int crypto4xx_compute_gcm_hash_key_sw(struct crypto4xx_ctx *ctx, goto out; crypto4xx_memcpy_le(ctx->sa_in + get_dynamic_sa_offset_inner_digest(ctx), src, 16); - out: crypto_free_blkcipher(aes_tfm); return rc; @@ -471,6 +470,7 @@ static int crypto4xx_setkey_3des(struct crypto_ablkcipher *cipher, sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; } @@ -516,6 +516,8 @@ int crypto4xx_encrypt(struct ablkcipher_request *req) ctx->is_hash = 0; ctx->pd_ctl = 0x1; + CRYPTO4XX_TXLOG("encrypt %s nbytes %d", + req->base.tfm->__crt_alg->cra_name, req->nbytes); return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, req->nbytes, NULL, 0, req->info, get_dynamic_sa_iv_size(ctx)); @@ -530,6 +532,8 @@ int crypto4xx_decrypt(struct ablkcipher_request *req) ctx->pd_ctl = 0x1; ctx->direction = DIR_INBOUND; + CRYPTO4XX_TXLOG("decrypt %s nbytes %d", + req->base.tfm->__crt_alg->cra_name, req->nbytes); return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, req->nbytes, NULL, 0, req->info, get_dynamic_sa_iv_size(ctx)); @@ -545,6 +549,8 @@ int crypto4xx_encrypt_ctr(struct ablkcipher_request *req) ctx->pd_ctl = 0x1; ctx->direction = DIR_OUTBOUND; + CRYPTO4XX_TXLOG("encrypt %s nbytes %d", + req->base.tfm->__crt_alg->cra_name, req->nbytes); return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, req->nbytes, NULL, 0, req->info, @@ -561,6 +567,8 @@ int crypto4xx_decrypt_ctr(struct ablkcipher_request *req) ctx->pd_ctl = 0x1; ctx->direction = DIR_INBOUND; + CRYPTO4XX_TXLOG("decrypt %s nbytes %d", + req->base.tfm->__crt_alg->cra_name, req->nbytes); return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, req->nbytes, NULL, 0, req->info, @@ -637,6 +645,7 @@ static int crypto4xx_setkey_aes(struct crypto_ablkcipher *cipher, sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; } @@ -728,6 +737,7 @@ int crypto4xx_setkey_aes_ctr(struct crypto_ablkcipher *cipher, sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; } @@ -856,7 +866,8 @@ int crypto4xx_setkey_aes_gcm(struct crypto_aead *cipher, sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; sa->sa_command_0.bf.opcode = SA_OPCODE_ENCRYPT_HASH; - + + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err: crypto4xx_free_sa(ctx); @@ -871,6 +882,8 @@ int crypto4xx_encrypt_aes_gcm(struct aead_request *req) ctx->direction = DIR_OUTBOUND; ctx->append_icv = 1; + CRYPTO4XX_TXLOG("encrypt %s nbytes %d", + req->base.tfm->__crt_alg->cra_name, req->cryptlen); return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, req->cryptlen, req->assoc, req->assoclen, req->iv, crypto_aead_ivsize(aead)); @@ -882,6 +895,8 @@ int crypto4xx_decrypt_aes_gcm(struct aead_request *req) struct crypto4xx_ctx *ctx = crypto_tfm_ctx(req->base.tfm); int len = req->cryptlen - crypto_aead_authsize(aead); + CRYPTO4XX_TXLOG("decrypt %s nbytes %d", + req->base.tfm->__crt_alg->cra_name, req->cryptlen); ctx->direction = DIR_INBOUND; ctx->append_icv = 0; return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, @@ -993,7 +1008,7 @@ int crypto4xx_setkey_aes_ccm(struct crypto_aead *cipher, const u8 *key, SA_SEQ_MASK_OFF, SA_MC_ENABLE, SA_NOT_COPY_PAD, SA_COPY_PAYLOAD, SA_NOT_COPY_HDR); - + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; } @@ -1153,6 +1168,7 @@ int crypto4xx_setkey_kasumi(struct crypto_ablkcipher *cipher, sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; } @@ -1185,6 +1201,8 @@ int crypto4xx_encrypt_kasumi(struct ablkcipher_request *req) ctx->direction = DIR_OUTBOUND; ctx->pd_ctl = 0x1; + CRYPTO4XX_TXLOG("encrypt %s nbytes %d", + req->base.tfm->__crt_alg->cra_name, req->nbytes); return crypto4xx_build_pd(&req->base, ctx, req->src, req->dst, req->nbytes, NULL, 0, NULL, 0); } @@ -1315,7 +1333,7 @@ int crypto4xx_setkey_arc4(struct crypto_ablkcipher *cipher, sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; - + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; } @@ -1460,6 +1478,11 @@ int crypto4xx_hash_digest(struct ahash_request *req) ctx->pd_ctl = 0x11; ctx->direction = DIR_INBOUND; +#if 0 + ESP_PHD(KERN_CONT, "", DUMP_PREFIX_OFFSET, + 16, 1, + (void*)req, sizeof(struct ahash_request), false); +#endif return crypto4xx_build_pd(&req->base, ctx, req->src, (struct scatterlist *) req->result, req->nbytes, NULL, 0, NULL, 0); @@ -1550,7 +1573,8 @@ int crypto4xx_hash_hmac_setkey(struct crypto_ahash *hash, memcpy(ctx->sa_out, ctx->sa_in, ctx->sa_len * 4); sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; - + + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err: crypto4xx_free_sa(ctx); @@ -1799,7 +1823,7 @@ int crypto4xx_xcbc_setkey(struct crypto_ahash *hash, memcpy(ctx->sa_out, ctx->sa_in, ctx->sa_len * 4); sa = (struct dynamic_sa_ctl *) ctx->sa_out; sa->sa_command_0.bf.dir = DIR_OUTBOUND; - + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err: crypto4xx_free_sa(ctx); @@ -1872,7 +1896,7 @@ int crypto4xx_kasumi_f9_setkey(struct crypto_ahash *hash, ctx->hash_final = 1; ctx->pd_ctl = 0x11; ctx->bypass = 4; - + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; } @@ -2093,7 +2117,7 @@ int crypto4xx_setkey_esp_tunnel(struct crypto_aead *cipher, ctx->is_hash = 0; ctx->pad_ctl = param->pad_block_size/4; ctx->append_icv = 0; - + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err_nomem_sr: @@ -3021,7 +3045,7 @@ int crypto4xx_setkey_macsec_gcm(struct crypto_aead *cipher, ctx->hash_final = 1; ctx->is_hash = 0; ctx->bypass = 0; - + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err_nomem_sr: @@ -3177,6 +3201,7 @@ static int crypto4xx_setkey_dtls(struct crypto_aead *cipher, CRYPTO_FEEDBACK_MODE_NO_FB, SA_EXTENDED_SN_ON, SA_SEQ_MASK_OFF, SA_MC_ENABLE, SA_COPY_PAD, SA_COPY_PAYLOAD, SA_COPY_HDR); + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err_nomem_sr: @@ -3413,7 +3438,7 @@ static int crypto4xx_setkey_ssl_tls(struct crypto_aead *cipher, SA_COPY_PAD, SA_COPY_PAYLOAD, SA_COPY_HDR); - + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err_nomem_sr: @@ -3617,7 +3642,8 @@ int crypto4xx_setkey_ssl_tls_arc4(struct crypto_aead *cipher, sa->sa_command_1.bf.arc4_stateful = 1; sa->sa_command_1.bf.save_arc4_state = 1; - + + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err_nomem_arc4: @@ -4070,11 +4096,11 @@ int crypto4xx_setkey_transport_esp_rfc4106_gcm(struct crypto_aead *cipher, ctx->authenc = 0; ctx->hash_final = 1; ctx->is_hash = 0; - printk("param->pad_block_size = %d\n", param->pad_block_size); //ctx->pad_ctl = param->pad_block_size / 4; ctx->pad_ctl = 0x08; ctx->append_icv = 0; + CRYPTO4XX_DEBUG("alg %s setkey", crypto_tfm_alg_name(tfm)); return 0; err_nomem_sr: diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c index 8c00e30e9e6..f1721e85770 100644 --- a/drivers/crypto/amcc/crypto4xx_core.c +++ b/drivers/crypto/amcc/crypto4xx_core.c @@ -1279,9 +1279,10 @@ u32 crypto4xx_build_pd(struct crypto_async_request *req, */ crypto4xx_memcpy_le(pd_uinfo->sr_va + CTR_RFC3686_NONCE_SIZE, iv, iv_len); - } else + } else { crypto4xx_memcpy_le(pd_uinfo->sr_va, iv, iv_len); + } } if (ctx->is_gcm || ctx->ctr_aes) { u32 seq = 1; @@ -1444,14 +1445,15 @@ u32 crypto4xx_build_pd(struct crypto_async_request *req, pd_uinfo->state = PD_ENTRY_INUSE; wmb(); /* write any value to push engine to read a pd */ + if (dev->core_dev->revb_ver == 1) { #ifndef CONFIG_SEC_HW_POLL writel(1, dev->ce_base + CRYPTO4XX_INT_DESCR_RD); #endif - } else + } else { writel(1, dev->ce_base + CRYPTO4XX_INT_DESCR_RD); + } - dev->pkt_cnt++; return -EINPROGRESS; } @@ -1596,14 +1598,16 @@ static irqreturn_t crypto4xx_ce_interrupt_handler(int irq, void *data) { struct device *dev = (struct device *)data; struct crypto4xx_core_device *core_dev = dev_get_drvdata(dev); - //u32 int_status; + u32 int_status, dev_status; if (core_dev->dev->ce_base == 0) return 0; - //int_status = readl(core_dev->dev->ce_base + CRYPTO4XX_INT_UNMASK_STAT); - //printk("Interrupt status = 0x%08x\n", int_status); + int_status = readl(core_dev->dev->ce_base + CRYPTO4XX_INT_UNMASK_STAT); + printk("Interrupt status = 0x%08x\n", int_status); + dev_status = readl(core_dev->dev->ce_base + CRYPTO4XX_DEVICE_INFO); + printk("dev status = 0x%08x\n", dev_status); /* For RevB, 460EX and 460ExR Rev B */ if (core_dev->revb_ver == 1) { writel(PPC4XX_INTERRUPT_CLR_REVB, @@ -1625,7 +1629,7 @@ static irqreturn_t crypto4xx_ce_interrupt_handler(int irq, void *data) */ struct crypto4xx_alg_common crypto4xx_alg[] = { /* Crypto DES ECB, CBC, modes */ -#if 1 +#if 0 { .type = CRYPTO_ALG_TYPE_ABLKCIPHER, .u.cipher = { .cra_name = "cbc(des)", .cra_driver_name = "ppc4xx-cbc-des", @@ -1885,6 +1889,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } } }}, +#endif /* Hash MD5 */ { .type = CRYPTO_ALG_TYPE_AHASH, .u.hash = { @@ -1907,8 +1912,8 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { .cra_module = THIS_MODULE, } }}, -#endif -#if 1 + +#if 0 /* Hash MD5-HMAC */ { .type = CRYPTO_ALG_TYPE_AHASH, .u.hash = { .init = crypto4xx_hash_init, @@ -1972,7 +1977,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, -#if 1 +#if 0 { .type = CRYPTO_ALG_TYPE_AHASH, .u.hash = { .init = crypto4xx_hash_init, .update = crypto4xx_hash_update, @@ -2117,7 +2122,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 { .type = CRYPTO_ALG_TYPE_AHASH, .u.hash = { .init = crypto4xx_hash_init, .update = crypto4xx_hash_update, @@ -2157,7 +2162,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { .cra_module = THIS_MODULE, } }}, - +#endif /* Crypto Kasumi and Kasumi F8 */ { .type = CRYPTO_ALG_TYPE_ABLKCIPHER, .u.cipher = { .cra_name = "kasumi", @@ -2224,8 +2229,8 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { .cra_module = THIS_MODULE, } }}, -#endif -#if 1 + +#if 0 /* Crypto ARC4 - stateless */ { .type = CRYPTO_ALG_TYPE_ABLKCIPHER, .u.cipher = { .cra_name = "ecb(arc4)", @@ -2273,7 +2278,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 /* IPSec combined hash and crypto Algorithms */ { .type = CRYPTO_ALG_TYPE_AEAD, .u.cipher = { .cra_name = "tunnel(esp(authenc(hmac(md5),cbc(aes))))", @@ -2323,7 +2328,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 /* IPSec combined hash and crypto Algorithms */ { .type = CRYPTO_ALG_TYPE_AEAD, .u.cipher = { .cra_name = "tunnel(esp(authenc(hmac(sha224),cbc(aes))))", @@ -2349,7 +2354,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 /* IPSec combined hash and crypto Algorithms */ { .type = CRYPTO_ALG_TYPE_AEAD, .u.cipher = { .cra_name = "tunnel(esp(authenc(hmac(sha256),cbc(aes))))", @@ -3108,7 +3113,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 /* IPSec combined hash and crypto Algorithms */ { .type = CRYPTO_ALG_TYPE_AEAD, .u.cipher = { .cra_name = "transport(esp(authenc(hmac(sha256),cbc(des3_ede))))", @@ -3251,7 +3256,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 { .type = CRYPTO_ALG_TYPE_AEAD, .u.cipher = { .cra_name = "dtls(aes-sha1)", .cra_driver_name = "dtls-ppc4xx", @@ -3278,7 +3283,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 { .type = CRYPTO_ALG_TYPE_AEAD, .u.cipher = { .cra_name = "dtls(des-sha1)", .cra_driver_name = "ppc4xx-dtls-des-sha1", @@ -3305,7 +3310,7 @@ struct crypto4xx_alg_common crypto4xx_alg[] = { } }}, #endif -#if 1 +#if 0 { .type = CRYPTO_ALG_TYPE_AEAD, .u.cipher = { .cra_name = "dtls(des3-sha1)", .cra_driver_name = "ppc4xx-dtls-des3-sha1", diff --git a/drivers/crypto/amcc/crypto4xx_core.h b/drivers/crypto/amcc/crypto4xx_core.h index 658a2416294..fea57ff139e 100644 --- a/drivers/crypto/amcc/crypto4xx_core.h +++ b/drivers/crypto/amcc/crypto4xx_core.h @@ -50,6 +50,50 @@ #define PD_ENTRY_FREE 0 #define ERING_WAS_FULL 0xffffffff +#if 0 +#define CRYPTO4XX_DEBUG_LOG +#define CRYPTO4XX_TXDEBUG +#endif + +/* Debugging Macro */ +#define CRYPTO4XX_HDR "CRYPTO4XX: " + +#define CRYPTO4XX_ERR(fmt, ...) \ + printk(KERN_ERR CRYPTO4XX_HDR fmt "\n", ##__VA_ARGS__); +#define CRYPTO4XX_LOG(fmt, ...) \ + printk(KERN_INFO CRYPTO4XX_HDR fmt "\n", ##__VA_ARGS__); + +#if !defined(CRYPTO4XX_TXDEBUG) +# define CRYPTO4XX_TXLOG(fmt, ...) +# define CRYPTO4XX_TXDUMP(hdr, d, l) +#else +# define CRYPTO4XX_TXLOG(fmt, ...) \ + do { \ + printk(KERN_INFO CRYPTO4XX_HDR fmt "\n", ##__VA_ARGS__); \ +} while(0); +# define CRYPTO4XX_TXDUMP(hdr, d, l) \ + do { \ + print_hex_dump(KERN_INFO, CRYPTO4XX_HDR hdr, \ + DUMP_PREFIX_ADDRESS, 16, 4, d, l, 1); \ +} while(0); +#endif + +#if !defined(CRYPTO4XX_DEBUG_LOG) +# define CRYPTO4XX_DEBUG(fmt, ...) +# define CRYPTO4XX_DEBUG_DUMP(hdr, fmt, ...) +#else +# define CRYPTO4XX_DEBUG(fmt, ...) \ + do { \ + printk(KERN_INFO CRYPTO4XX_HDR fmt "\n", ##__VA_ARGS__); \ +} while(0); +# define CRYPTO4XX_DEBUG_DUMP(hdr, d, l) \ + do { \ + print_hex_dump(KERN_INFO, CRYPTO4XX_HDR hdr, \ + DUMP_PREFIX_ADDRESS, 16, 4, d, l, 1); \ +} while(0); +#endif + + struct crypto4xx_device; struct pd_uinfo { diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c index 122d07af5b5..d3a4ce06015 100644 --- a/drivers/md/raid0.c +++ b/drivers/md/raid0.c @@ -453,7 +453,7 @@ static int raid0_make_request(struct request_queue *q, struct bio *bio) int cpu; if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) { - md_barrier_request(mddev, bio); + bio_endio(bio, -EOPNOTSUPP); return 0; } diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 0d403ca12ae..1cb830da54d 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c @@ -96,6 +96,16 @@ #define printk_rl(args...) ((void) (printk_ratelimit() && printk(args))) +#ifdef CONFIG_MD_RAID_SKIP_BIO_COPY +/* Define SKIP_BIO_COPY_ERR to enable work around for the issue + * SKIP_BIO_COPY malfunction when RAID degrades + */ +#define SKIP_BIO_COPY_ERR +#if defined(SKIP_BIO_COPY_ERR) +static int degraded = 0; +#endif +#endif + /* * We maintain a biased count of active stripes in the bottom 16 bits of * bi_phys_segments, and a count of processed stripes in the upper 16 bits @@ -956,6 +966,12 @@ ops_run_biodrain(struct stripe_head *sh, struct dma_async_tx_descriptor *tx) (unsigned long long)sh->sector); #ifdef CONFIG_MD_RAID_SKIP_BIO_COPY +#ifdef SKIP_BIO_COPY_ERR + if(degraded){ + fswrite = 0; + goto not_use_skip_bio; + } +#endif /* initially assume that the operation is a full-stripe write*/ for (i = disks; i-- ;) { struct r5dev *dev = &sh->dev[i]; @@ -1018,6 +1034,9 @@ do_copy: async_tx_issue_pending_all(); } #endif +#ifdef SKIP_BIO_COPY_ERR +not_use_skip_bio: +#endif for (i = disks; i--; ) { struct r5dev *dev = &sh->dev[i]; @@ -1127,7 +1146,7 @@ ops_run_reconstruct5(struct stripe_head *sh, struct raid5_percpu *percpu, * set ASYNC_TX_XOR_DROP_DST and ASYNC_TX_XOR_ZERO_DST * for the synchronous xor case */ - flags = ASYNC_TX_ACK | + flags = ASYNC_TX_FENCE | ASYNC_TX_ACK | (prexor ? ASYNC_TX_XOR_DROP_DST : ASYNC_TX_XOR_ZERO_DST); atomic_inc(&sh->count); @@ -1718,6 +1737,7 @@ static void error(mddev_t *mddev, mdk_rdev_t *rdev) */ set_bit(MD_RECOVERY_INTR, &mddev->recovery); } + degraded = 1; set_bit(Faulty, &rdev->flags); printk(KERN_ALERT "raid5: Disk failure on %s, disabling device.\n" @@ -3977,6 +3997,12 @@ static int make_request(struct request_queue *q, struct bio * bi) const int rw = bio_data_dir(bi); int cpu, remaining; +#if defined(SKIP_BIO_COPY_ERR) + if(mddev->degraded) + degraded = 1; + else + degraded = 0; +#endif if (unlikely(bio_rw_flagged(bi, BIO_RW_BARRIER))) { /* Drain all pending writes. We only really need * to ensure they have been submitted, but this is @@ -5235,6 +5261,9 @@ static int stop(mddev_t *mddev) blk_sync_queue(mddev->queue); /* the unplug fn references 'conf'*/ free_conf(conf); mddev->private = &raid5_attrs_group; +#if defined(SKIP_BIO_COPY_ERR) + degraded = 0; +#endif return 0; } diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c index efb2d3699e4..4b2f062218b 100644 --- a/drivers/mtd/maps/physmap_of.c +++ b/drivers/mtd/maps/physmap_of.c @@ -228,6 +228,7 @@ static int __devinit of_flash_probe(struct of_device *dev, " tree\n"); goto err_out; } + dev_dbg(&dev->dev, "of_flash device: %.8llx-%.8llx\n", (unsigned long long)res.start, (unsigned long long)res.end); @@ -345,6 +346,12 @@ err_flash_remove: } static struct of_device_id of_flash_match[] = { +#ifndef CONFIG_APOLLO3G + { + .compatible = "cfi-flash", + .data = (void *)"cfi_probe", + }, +#endif { /* FIXME: JEDEC chips can't be safely and reliably * probed, although the mtd code gets it right in @@ -356,10 +363,12 @@ static struct of_device_id of_flash_match[] = { .compatible = "jedec-flash", .data = (void *)"jedec_probe", }, +#ifdef CONFIG_APOLLO3G { .compatible = "cfi-flash", .data = (void *)"cfi_probe", }, +#endif { .compatible = "mtd-ram", .data = (void *)"map_ram", diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 568608d638c..c1d4ddd3458 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -102,7 +102,7 @@ static int ndfc_calculate_ecc(struct mtd_info *mtd, wmb(); ecc = in_be32(ndfc->ndfcbase + NDFC_ECC); /* The NDFC uses Smart Media (SMC) bytes order */ -#if !defined(CONFIG_APM82181) +#if !defined(CONFIG_APOLLO3G) ecc_code[0] = p[1]; ecc_code[1] = p[2]; ecc_code[2] = p[3]; diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c index fb9049bcbce..eabad755e4a 100644 --- a/drivers/net/ibm_newemac/core.c +++ b/drivers/net/ibm_newemac/core.c @@ -1365,9 +1365,11 @@ static int emac_open(struct net_device *ndev) { struct emac_instance *dev = netdev_priv(ndev); int err, i; + unsigned long flags; DBG(dev, "open" NL); + /* Setup error IRQ handler */ err = request_irq(dev->emac_irq, emac_irq, 0, "EMAC", dev); if (err) { @@ -1385,6 +1387,7 @@ static int emac_open(struct net_device *ndev) return err; } } + /* Allocate RX ring */ for (i = 0; i < NUM_RX_BUFF; ++i) if (emac_alloc_rx_skb(dev, i, GFP_KERNEL)) { @@ -1443,17 +1446,24 @@ static int emac_open(struct net_device *ndev) /* Required for Pause packet support in EMAC */ dev_mc_add(ndev, default_mcast_addr, sizeof(default_mcast_addr), 1); + local_irq_save(flags); /* disable interrupts */ emac_configure(dev); + mal_poll_add(dev->mal, &dev->commac); mal_enable_tx_channel(dev->mal, dev->mal_tx_chan); mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(ndev->mtu)); + mal_enable_rx_channel(dev->mal, dev->mal_rx_chan); emac_tx_enable(dev); emac_rx_enable(dev); + local_irq_restore(flags); + emac_netif_start(dev); + mutex_unlock(&dev->link_lock); + return 0; oom: emac_clean_rx_ring(dev); @@ -1962,6 +1972,9 @@ static inline int emac_rx_sg_append(struct emac_instance *dev, int slot) dev_kfree_skb(dev->rx_sg_skb); dev->rx_sg_skb = NULL; } else { + if(unlikely((dev->rx_sg_skb->tail + len) > dev->rx_sg_skb->end)) + goto out; + cacheable_memcpy(skb_tail_pointer(dev->rx_sg_skb), dev->rx_skb[slot]->data, len); skb_put(dev->rx_sg_skb, len); @@ -1969,6 +1982,7 @@ static inline int emac_rx_sg_append(struct emac_instance *dev, int slot) return 0; } } +out: emac_recycle_rx_skb(dev, slot, 0); return -1; } @@ -2027,6 +2041,7 @@ static int emac_poll_rx(void *param, int budget) goto oom; skb_put(skb, len); + push_packet: skb->dev = dev->ndev; skb->protocol = eth_type_trans(skb, dev->ndev); @@ -3071,7 +3086,7 @@ static int __devinit emac_init_phy(struct emac_instance *dev) } emac_configure(dev); - + if (dev->phy_address != 0xffffffff) phy_map = ~(1 << dev->phy_address); @@ -3105,6 +3120,7 @@ static int __devinit emac_init_phy(struct emac_instance *dev) /* Disable any PHY features not supported by the platform */ dev->phy.def->features &= ~dev->phy_feat_exc; + dev->phy.features &= ~dev->phy_feat_exc; /* Setup initial link parameters */ if (dev->phy.features & SUPPORTED_Autoneg) { @@ -3537,6 +3553,11 @@ static int __devinit emac_probe(struct of_device *ofdev, INIT_DELAYED_WORK(&dev->link_work, emac_link_timer); /* Find PHY if any */ +#if defined(CONFIG_APM82181) + dev->phy_feat_exc = (SUPPORTED_1000baseT_Half | + SUPPORTED_100baseT_Half | + SUPPORTED_10baseT_Half); +#endif err = emac_init_phy(dev); if (err != 0) goto err_detach_tah; diff --git a/drivers/net/ibm_newemac/phy.c b/drivers/net/ibm_newemac/phy.c index 635cb96ef64..2db264e1b21 100644 --- a/drivers/net/ibm_newemac/phy.c +++ b/drivers/net/ibm_newemac/phy.c @@ -631,6 +631,31 @@ static struct mii_phy_def m88e1141_phy_def = { .ops = &m88e1141_phy_ops, }; +static int rtl8211cl_init(struct mii_phy *phy) +{ + phy_write(phy, 31,0x0002); + phy_write(phy, 24,0xA1E0); + phy_write(phy, 31,0x0000); + + return 0; +} + +static struct mii_phy_ops rtl8211cl_phy_ops = { + .init = rtl8211cl_init, + .setup_aneg = genmii_setup_aneg, + .setup_forced = genmii_setup_forced, + .poll_link = genmii_poll_link, + .read_link = genmii_read_link +}; + +static struct mii_phy_def rtl8211cl_phy_def = { + .phy_id = 0x001CC910, /* 0x01cc912 */ + .phy_id_mask = 0xfffffff0, + .name = "Realtek 8211CL Ethernet", + .ops = &rtl8211cl_phy_ops, +}; + + static struct mii_phy_def *mii_phy_table[] = { &et1011c_phy_def, &cis8201_phy_def, @@ -641,6 +666,7 @@ static struct mii_phy_def *mii_phy_table[] = { &m88e1111_phy_def, &m88e1112_phy_def, &m88e1141_phy_def, + &rtl8211cl_phy_def, &genmii_phy_def, NULL }; |