diff options
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/Kconfig | 36 | ||||
| -rw-r--r-- | drivers/video/Makefile | 3 | ||||
| -rw-r--r-- | drivers/video/acornfb.c | 2 | ||||
| -rw-r--r-- | drivers/video/broadsheetfb.c | 568 | ||||
| -rw-r--r-- | drivers/video/cyber2000fb.c | 4 | ||||
| -rw-r--r-- | drivers/video/imxfb.c | 108 | ||||
| -rw-r--r-- | drivers/video/mx3fb.c | 2300 | ||||
| -rw-r--r-- | drivers/video/pxafb.c | 15 | ||||
| -rw-r--r-- | drivers/video/s3c2410fb.c | 4 | ||||
| -rw-r--r-- | drivers/video/sa1100fb.c | 23 |
10 files changed, 1862 insertions, 1201 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index fb19803060c..41c27a44bd8 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -397,7 +397,7 @@ config FB_SA1100 config FB_IMX tristate "Motorola i.MX LCD support" - depends on FB && ARM && ARCH_IMX + depends on FB && (ARCH_IMX || ARCH_MX2) select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT @@ -2120,16 +2120,30 @@ config FB_PRE_INIT_FB the bootloader. config FB_MX3 - tristate "MX3 Framebuffer support" - depends on FB && MX3_IPU - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - default y - help - This is a framebuffer device for the i.MX31 LCD Controller. So - far only synchronous displays are supported. If you plan to use - an LCD display with your i.MX31 system, say Y here. + tristate "MX3 Framebuffer support" + depends on FB && MX3_IPU + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + default y + help + This is a framebuffer device for the i.MX31 LCD Controller. So + far only synchronous displays are supported. If you plan to use + an LCD display with your i.MX31 system, say Y here. + +config FB_BROADSHEET + tristate "E-Ink Broadsheet/Epson S1D13521 controller support" + depends on FB + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_SYS_FOPS + select FB_DEFERRED_IO + help + This driver implements support for the E-Ink Broadsheet + controller. The release name for this device was Epson S1D13521 + and could also have been called by other names when coupled with + a bridge adapter. source "drivers/video/omap/Kconfig" diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 2a998ca6181..bb265eca7d5 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -106,6 +106,7 @@ obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o obj-$(CONFIG_FB_MAXINE) += maxinefb.o obj-$(CONFIG_FB_METRONOME) += metronomefb.o +obj-$(CONFIG_FB_BROADSHEET) += broadsheetfb.o obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o obj-$(CONFIG_FB_SH7760) += sh7760fb.o obj-$(CONFIG_FB_IMX) += imxfb.o @@ -132,7 +133,7 @@ obj-$(CONFIG_FB_VGA16) += vga16fb.o obj-$(CONFIG_FB_OF) += offb.o obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o -obj-$(CONFIG_FB_MX3) += mx3fb.o +obj-$(CONFIG_FB_MX3) += mx3fb.o # the test framebuffer is last obj-$(CONFIG_FB_VIRTUAL) += vfb.o diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c index 61c3d3f40fd..6995fe1e86d 100644 --- a/drivers/video/acornfb.c +++ b/drivers/video/acornfb.c @@ -28,9 +28,9 @@ #include <linux/fb.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> +#include <linux/io.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/irq.h> #include <asm/mach-types.h> #include <asm/pgtable.h> diff --git a/drivers/video/broadsheetfb.c b/drivers/video/broadsheetfb.c new file mode 100644 index 00000000000..509cb92e873 --- /dev/null +++ b/drivers/video/broadsheetfb.c @@ -0,0 +1,568 @@ +/* + * broadsheetfb.c -- FB driver for E-Ink Broadsheet controller + * + * Copyright (C) 2008, Jaya Kumar + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + * + * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven. + * + * This driver is written to be used with the Broadsheet display controller. + * + * It is intended to be architecture independent. A board specific driver + * must be used to perform all the physical IO interactions. + * + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/string.h> +#include <linux/mm.h> +#include <linux/slab.h> +#include <linux/vmalloc.h> +#include <linux/delay.h> +#include <linux/interrupt.h> +#include <linux/fb.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/list.h> +#include <linux/uaccess.h> + +#include <video/broadsheetfb.h> + +/* Display specific information */ +#define DPY_W 800 +#define DPY_H 600 + +static struct fb_fix_screeninfo broadsheetfb_fix __devinitdata = { + .id = "broadsheetfb", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_STATIC_PSEUDOCOLOR, + .xpanstep = 0, + .ypanstep = 0, + .ywrapstep = 0, + .line_length = DPY_W, + .accel = FB_ACCEL_NONE, +}; + +static struct fb_var_screeninfo broadsheetfb_var __devinitdata = { + .xres = DPY_W, + .yres = DPY_H, + .xres_virtual = DPY_W, + .yres_virtual = DPY_H, + .bits_per_pixel = 8, + .grayscale = 1, + .red = { 0, 4, 0 }, + .green = { 0, 4, 0 }, + .blue = { 0, 4, 0 }, + .transp = { 0, 0, 0 }, +}; + +/* main broadsheetfb functions */ +static void broadsheet_issue_data(struct broadsheetfb_par *par, u16 data) +{ + par->board->set_ctl(par, BS_WR, 0); + par->board->set_hdb(par, data); + par->board->set_ctl(par, BS_WR, 1); +} + +static void broadsheet_issue_cmd(struct broadsheetfb_par *par, u16 data) +{ + par->board->set_ctl(par, BS_DC, 0); + broadsheet_issue_data(par, data); +} + +static void broadsheet_send_command(struct broadsheetfb_par *par, u16 data) +{ + par->board->wait_for_rdy(par); + + par->board->set_ctl(par, BS_CS, 0); + broadsheet_issue_cmd(par, data); + par->board->set_ctl(par, BS_DC, 1); + par->board->set_ctl(par, BS_CS, 1); +} + +static void broadsheet_send_cmdargs(struct broadsheetfb_par *par, u16 cmd, + int argc, u16 *argv) +{ + int i; + + par->board->wait_for_rdy(par); + + par->board->set_ctl(par, BS_CS, 0); + broadsheet_issue_cmd(par, cmd); + par->board->set_ctl(par, BS_DC, 1); + + for (i = 0; i < argc; i++) + broadsheet_issue_data(par, argv[i]); + par->board->set_ctl(par, BS_CS, 1); +} + +static void broadsheet_burst_write(struct broadsheetfb_par *par, int size, + u16 *data) +{ + int i; + u16 tmp; + + par->board->set_ctl(par, BS_CS, 0); + par->board->set_ctl(par, BS_DC, 1); + + for (i = 0; i < size; i++) { + par->board->set_ctl(par, BS_WR, 0); + tmp = (data[i] & 0x0F) << 4; + tmp |= (data[i] & 0x0F00) << 4; + par->board->set_hdb(par, tmp); + par->board->set_ctl(par, BS_WR, 1); + } + + par->board->set_ctl(par, BS_CS, 1); +} + +static u16 broadsheet_get_data(struct broadsheetfb_par *par) +{ + u16 res; + /* wait for ready to go hi. (lo is busy) */ + par->board->wait_for_rdy(par); + + /* cs lo, dc lo for cmd, we lo for each data, db as usual */ + par->board->set_ctl(par, BS_DC, 1); + par->board->set_ctl(par, BS_CS, 0); + par->board->set_ctl(par, BS_WR, 0); + + res = par->board->get_hdb(par); + + /* strobe wr */ + par->board->set_ctl(par, BS_WR, 1); + par->board->set_ctl(par, BS_CS, 1); + + return res; +} + +static void broadsheet_write_reg(struct broadsheetfb_par *par, u16 reg, + u16 data) +{ + /* wait for ready to go hi. (lo is busy) */ + par->board->wait_for_rdy(par); + + /* cs lo, dc lo for cmd, we lo for each data, db as usual */ + par->board->set_ctl(par, BS_CS, 0); + + broadsheet_issue_cmd(par, BS_CMD_WR_REG); + + par->board->set_ctl(par, BS_DC, 1); + + broadsheet_issue_data(par, reg); + broadsheet_issue_data(par, data); + + par->board->set_ctl(par, BS_CS, 1); +} + +static u16 broadsheet_read_reg(struct broadsheetfb_par *par, u16 reg) +{ + broadsheet_send_command(par, reg); + msleep(100); + return broadsheet_get_data(par); +} + +static void __devinit broadsheet_init_display(struct broadsheetfb_par *par) +{ + u16 args[5]; + + args[0] = DPY_W; + args[1] = DPY_H; + args[2] = (100 | (1 << 8) | (1 << 9)); /* sdcfg */ + args[3] = 2; /* gdrv cfg */ + args[4] = (4 | (1 << 7)); /* lut index format */ + broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args); + + /* did the controller really set it? */ + broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_CFG, 5, args); + + args[0] = 4; /* fsync len */ + args[1] = (10 << 8) | 4; /* fend/fbegin len */ + args[2] = 10; /* line sync len */ + args[3] = (100 << 8) | 4; /* line end/begin len */ + args[4] = 6; /* pixel clock cfg */ + broadsheet_send_cmdargs(par, BS_CMD_INIT_DSPE_TMG, 5, args); + + /* setup waveform */ + args[0] = 0x886; + args[1] = 0; + broadsheet_send_cmdargs(par, BS_CMD_RD_WFM_INFO, 2, args); + + broadsheet_send_command(par, BS_CMD_UPD_GDRV_CLR); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG); + + broadsheet_write_reg(par, 0x330, 0x84); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG); + + args[0] = (0x3 << 4); + broadsheet_send_cmdargs(par, BS_CMD_LD_IMG, 1, args); + + args[0] = 0x154; + broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args); + + broadsheet_burst_write(par, DPY_W*DPY_H/2, + (u16 *) par->info->screen_base); + + broadsheet_send_command(par, BS_CMD_LD_IMG_END); + + args[0] = 0x4300; + broadsheet_send_cmdargs(par, BS_CMD_UPD_FULL, 1, args); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND); + + par->board->wait_for_rdy(par); +} + +static void __devinit broadsheet_init(struct broadsheetfb_par *par) +{ + broadsheet_send_command(par, BS_CMD_INIT_SYS_RUN); + /* the controller needs a second */ + msleep(1000); + broadsheet_init_display(par); +} + +static void broadsheetfb_dpy_update_pages(struct broadsheetfb_par *par, + u16 y1, u16 y2) +{ + u16 args[5]; + unsigned char *buf = (unsigned char *)par->info->screen_base; + + /* y1 must be a multiple of 4 so drop the lower bits */ + y1 &= 0xFFFC; + /* y2 must be a multiple of 4 , but - 1 so up the lower bits */ + y2 |= 0x0003; + + args[0] = 0x3 << 4; + args[1] = 0; + args[2] = y1; + args[3] = cpu_to_le16(par->info->var.xres); + args[4] = y2; + broadsheet_send_cmdargs(par, BS_CMD_LD_IMG_AREA, 5, args); + + args[0] = 0x154; + broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args); + + buf += y1 * par->info->var.xres; + broadsheet_burst_write(par, ((1 + y2 - y1) * par->info->var.xres)/2, + (u16 *) buf); + + broadsheet_send_command(par, BS_CMD_LD_IMG_END); + + args[0] = 0x4300; + broadsheet_send_cmdargs(par, BS_CMD_UPD_FULL, 1, args); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND); + + par->board->wait_for_rdy(par); + +} + +static void broadsheetfb_dpy_update(struct broadsheetfb_par *par) +{ + u16 args[5]; + + args[0] = 0x3 << 4; + broadsheet_send_cmdargs(par, BS_CMD_LD_IMG, 1, args); + + args[0] = 0x154; + broadsheet_send_cmdargs(par, BS_CMD_WR_REG, 1, args); + broadsheet_burst_write(par, DPY_W*DPY_H/2, + (u16 *) par->info->screen_base); + + broadsheet_send_command(par, BS_CMD_LD_IMG_END); + + args[0] = 0x4300; + broadsheet_send_cmdargs(par, BS_CMD_UPD_FULL, 1, args); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_TRG); + + broadsheet_send_command(par, BS_CMD_WAIT_DSPE_FREND); + + par->board->wait_for_rdy(par); + +} + +/* this is called back from the deferred io workqueue */ +static void broadsheetfb_dpy_deferred_io(struct fb_info *info, + struct list_head *pagelist) +{ + u16 y1 = 0, h = 0; + int prev_index = -1; + struct page *cur; + struct fb_deferred_io *fbdefio = info->fbdefio; + int h_inc; + u16 yres = info->var.yres; + u16 xres = info->var.xres; + + /* height increment is fixed per page */ + h_inc = DIV_ROUND_UP(PAGE_SIZE , xres); + + /* walk the written page list and swizzle the data */ + list_for_each_entry(cur, &fbdefio->pagelist, lru) { + if (prev_index < 0) { + /* just starting so assign first page */ + y1 = (cur->index << PAGE_SHIFT) / xres; + h = h_inc; + } else if ((prev_index + 1) == cur->index) { + /* this page is consecutive so increase our height */ + h += h_inc; + } else { + /* page not consecutive, issue previous update first */ + broadsheetfb_dpy_update_pages(info->par, y1, y1 + h); + /* start over with our non consecutive page */ + y1 = (cur->index << PAGE_SHIFT) / xres; + h = h_inc; + } + prev_index = cur->index; + } + + /* if we still have any pages to update we do so now */ + if (h >= yres) { + /* its a full screen update, just do it */ + broadsheetfb_dpy_update(info->par); + } else { + broadsheetfb_dpy_update_pages(info->par, y1, + min((u16) (y1 + h), yres)); + } +} + +static void broadsheetfb_fillrect(struct fb_info *info, + const struct fb_fillrect *rect) +{ + struct broadsheetfb_par *par = info->par; + + sys_fillrect(info, rect); + + broadsheetfb_dpy_update(par); +} + +static void broadsheetfb_copyarea(struct fb_info *info, + const struct fb_copyarea *area) +{ + struct broadsheetfb_par *par = info->par; + + sys_copyarea(info, area); + + broadsheetfb_dpy_update(par); +} + +static void broadsheetfb_imageblit(struct fb_info *info, + const struct fb_image *image) +{ + struct broadsheetfb_par *par = info->par; + + sys_imageblit(info, image); + + broadsheetfb_dpy_update(par); +} + +/* + * this is the slow path from userspace. they can seek and write to + * the fb. it's inefficient to do anything less than a full screen draw + */ +static ssize_t broadsheetfb_write(struct fb_info *info, const char __user *buf, + size_t count, loff_t *ppos) +{ + struct broadsheetfb_par *par = info->par; + unsigned long p = *ppos; + void *dst; + int err = 0; + unsigned long total_size; + + if (info->state != FBINFO_STATE_RUNNING) + return -EPERM; + + total_size = info->fix.smem_len; + + if (p > total_size) + return -EFBIG; + + if (count > total_size) { + err = -EFBIG; + count = total_size; + } + + if (count + p > total_size) { + if (!err) + err = -ENOSPC; + + count = total_size - p; + } + + dst = (void *)(info->screen_base + p); + + if (copy_from_user(dst, buf, count)) + err = -EFAULT; + + if (!err) + *ppos += count; + + broadsheetfb_dpy_update(par); + + return (err) ? err : count; +} + +static struct fb_ops broadsheetfb_ops = { + .owner = THIS_MODULE, + .fb_read = fb_sys_read, + .fb_write = broadsheetfb_write, + .fb_fillrect = broadsheetfb_fillrect, + .fb_copyarea = broadsheetfb_copyarea, + .fb_imageblit = broadsheetfb_imageblit, +}; + +static struct fb_deferred_io broadsheetfb_defio = { + .delay = HZ/4, + .deferred_io = broadsheetfb_dpy_deferred_io, +}; + +static int __devinit broadsheetfb_probe(struct platform_device *dev) +{ + struct fb_info *info; + struct broadsheet_board *board; + int retval = -ENOMEM; + int videomemorysize; + unsigned char *videomemory; + struct broadsheetfb_par *par; + int i; + + /* pick up board specific routines */ + board = dev->dev.platform_data; + if (!board) + return -EINVAL; + + /* try to count device specific driver, if can't, platform recalls */ + if (!try_module_get(board->owner)) + return -ENODEV; + + info = framebuffer_alloc(sizeof(struct broadsheetfb_par), &dev->dev); + if (!info) + goto err; + + videomemorysize = (DPY_W*DPY_H); + videomemory = vmalloc(videomemorysize); + if (!videomemory) + goto err_fb_rel; + + memset(videomemory, 0, videomemorysize); + + info->screen_base = (char *)videomemory; + info->fbops = &broadsheetfb_ops; + + info->var = broadsheetfb_var; + info->fix = broadsheetfb_fix; + info->fix.smem_len = videomemorysize; + par = info->par; + par->info = info; + par->board = board; + par->write_reg = broadsheet_write_reg; + par->read_reg = broadsheet_read_reg; + init_waitqueue_head(&par->waitq); + + info->flags = FBINFO_FLAG_DEFAULT; + + info->fbdefio = &broadsheetfb_defio; + fb_deferred_io_init(info); + + retval = fb_alloc_cmap(&info->cmap, 16, 0); + if (retval < 0) { + dev_err(&dev->dev, "Failed to allocate colormap\n"); + goto err_vfree; + } + + /* set cmap */ + for (i = 0; i < 16; i++) + info->cmap.red[i] = (((2*i)+1)*(0xFFFF))/32; + memcpy(info->cmap.green, info->cmap.red, sizeof(u16)*16); + memcpy(info->cmap.blue, info->cmap.red, sizeof(u16)*16); + + retval = par->board->setup_irq(info); + if (retval < 0) + goto err_cmap; + + /* this inits the dpy */ + retval = board->init(par); + if (retval < 0) + goto err_free_irq; + + broadsheet_init(par); + + retval = register_framebuffer(info); + if (retval < 0) + goto err_free_irq; + platform_set_drvdata(dev, info); + + printk(KERN_INFO + "fb%d: Broadsheet frame buffer, using %dK of video memory\n", + info->node, videomemorysize >> 10); + + + return 0; + +err_free_irq: + board->cleanup(par); +err_cmap: + fb_dealloc_cmap(&info->cmap); +err_vfree: + vfree(videomemory); +err_fb_rel: + framebuffer_release(info); +err: + module_put(board->owner); + return retval; + +} + +static int __devexit broadsheetfb_remove(struct platform_device *dev) +{ + struct fb_info *info = platform_get_drvdata(dev); + + if (info) { + struct broadsheetfb_par *par = info->par; + unregister_framebuffer(info); + fb_deferred_io_cleanup(info); + par->board->cleanup(par); + fb_dealloc_cmap(&info->cmap); + vfree((void *)info->screen_base); + module_put(par->board->owner); + framebuffer_release(info); + } + return 0; +} + +static struct platform_driver broadsheetfb_driver = { + .probe = broadsheetfb_probe, + .remove = broadsheetfb_remove, + .driver = { + .owner = THIS_MODULE, + .name = "broadsheetfb", + }, +}; + +static int __init broadsheetfb_init(void) +{ + return platform_driver_register(&broadsheetfb_driver); +} + +static void __exit broadsheetfb_exit(void) +{ + platform_driver_unregister(&broadsheetfb_driver); +} + +module_init(broadsheetfb_init); +module_exit(broadsheetfb_exit); + +MODULE_DESCRIPTION("fbdev driver for Broadsheet controller"); +MODULE_AUTHOR("Jaya Kumar"); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c index 7a9e42e3a9a..83c5cefc266 100644 --- a/drivers/video/cyber2000fb.c +++ b/drivers/video/cyber2000fb.c @@ -46,8 +46,8 @@ #include <linux/fb.h> #include <linux/pci.h> #include <linux/init.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/pgtable.h> #include <asm/system.h> @@ -1425,7 +1425,7 @@ static void cyberpro_common_resume(struct cfb_info *cfb) #ifdef CONFIG_ARCH_SHARK -#include <mach/hardware.h> +#include <mach/framebuffer.h> static int __devinit cyberpro_vl_probe(void) { diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index d58c68cd456..15a0ee6d8e2 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c @@ -14,7 +14,6 @@ * linux-arm-kernel@lists.arm.linux.org.uk */ - #include <linux/module.h> #include <linux/kernel.h> #include <linux/errno.h> @@ -27,9 +26,11 @@ #include <linux/init.h> #include <linux/ioport.h> #include <linux/cpufreq.h> +#include <linux/clk.h> #include <linux/platform_device.h> #include <linux/dma-mapping.h> #include <linux/io.h> +#include <linux/math64.h> #include <mach/imxfb.h> @@ -44,7 +45,12 @@ #define LCDC_SIZE 0x04 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) + +#ifdef CONFIG_ARCH_MX1 #define SIZE_YMAX(y) ((y) & 0x1ff) +#else +#define SIZE_YMAX(y) ((y) & 0x3ff) +#endif #define LCDC_VPW 0x08 #define VPW_VPW(x) ((x) & 0x3ff) @@ -54,7 +60,12 @@ #define CPOS_CC0 (1<<30) #define CPOS_OP (1<<28) #define CPOS_CXP(x) (((x) & 3ff) << 16) + +#ifdef CONFIG_ARCH_MX1 #define CPOS_CYP(y) ((y) & 0x1ff) +#else +#define CPOS_CYP(y) ((y) & 0x3ff) +#endif #define LCDC_LCWHB 0x10 #define LCWHB_BK_EN (1<<31) @@ -63,9 +74,16 @@ #define LCWHB_BD(x) ((x) & 0xff) #define LCDC_LCHCC 0x14 + +#ifdef CONFIG_ARCH_MX1 #define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) #define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) #define LCHCC_CUR_COL_B(b) ((b) & 0x1f) +#else +#define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12) +#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6) +#define LCHCC_CUR_COL_B(b) ((b) & 0x3f) +#endif #define LCDC_PCR 0x18 @@ -92,7 +110,13 @@ /* bit fields in imxfb.h */ #define LCDC_RMCR 0x34 + +#ifdef CONFIG_ARCH_MX1 #define RMCR_LCDC_EN (1<<1) +#else +#define RMCR_LCDC_EN 0 +#endif + #define RMCR_SELF_REF (1<<0) #define LCDC_LCDICR 0x38 @@ -119,6 +143,7 @@ struct imxfb_rgb { struct imxfb_info { struct platform_device *pdev; void __iomem *regs; + struct clk *clk; u_int max_bpp; u_int max_xres; @@ -159,6 +184,17 @@ struct imxfb_info { #define MIN_XRES 64 #define MIN_YRES 64 +/* Actually this really is 18bit support, the lowest 2 bits of each colour + * are unused in hardware. We claim to have 24bit support to make software + * like X work, which does not support 18bit. + */ +static struct imxfb_rgb def_rgb_18 = { + .red = {.offset = 16, .length = 8,}, + .green = {.offset = 8, .length = 8,}, + .blue = {.offset = 0, .length = 8,}, + .transp = {.offset = 0, .length = 0,}, +}; + static struct imxfb_rgb def_rgb_16_tft = { .red = {.offset = 11, .length = 5,}, .green = {.offset = 5, .length = 6,}, @@ -286,9 +322,12 @@ static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel); switch (var->bits_per_pixel) { + case 32: + rgb = &def_rgb_18; + break; case 16: default: - if (readl(fbi->regs + LCDC_PCR) & PCR_TFT) + if (fbi->pcr & PCR_TFT) rgb = &def_rgb_16_tft; else rgb = &def_rgb_16_stn; @@ -327,9 +366,7 @@ static int imxfb_set_par(struct fb_info *info) struct imxfb_info *fbi = info->par; struct fb_var_screeninfo *var = &info->var; - pr_debug("set_par\n"); - - if (var->bits_per_pixel == 16) + if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32) info->fix.visual = FB_VISUAL_TRUECOLOR; else if (!fbi->cmap_static) info->fix.visual = FB_VISUAL_PSEUDOCOLOR; @@ -354,10 +391,6 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) { pr_debug("Enabling LCD controller\n"); - /* initialize LCDC */ - writel(readl(fbi->regs + LCDC_RMCR) & ~RMCR_LCDC_EN, - fbi->regs + LCDC_RMCR); /* just to be safe... */ - writel(fbi->screen_dma, fbi->regs + LCDC_SSA); /* physical screen start address */ @@ -373,6 +406,8 @@ static void imxfb_enable_controller(struct imxfb_info *fbi) writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR); + clk_enable(fbi->clk); + if (fbi->backlight_power) fbi->backlight_power(1); if (fbi->lcd_power) @@ -388,6 +423,8 @@ static void imxfb_disable_controller(struct imxfb_info *fbi) if (fbi->lcd_power) fbi->lcd_power(0); + clk_disable(fbi->clk); + writel(0, fbi->regs + LCDC_RMCR); } @@ -431,6 +468,9 @@ static struct fb_ops imxfb_ops = { static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info) { struct imxfb_info *fbi = info->par; + unsigned int pcr, lcd_clk; + unsigned long long tmp; + pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n", var->xres, var->hsync_len, var->left_margin, var->right_margin); @@ -465,9 +505,9 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf info->fix.id, var->lower_margin); #endif - writel(HCR_H_WIDTH(var->hsync_len) | - HCR_H_WAIT_1(var->right_margin) | - HCR_H_WAIT_2(var->left_margin), + writel(HCR_H_WIDTH(var->hsync_len - 1) | + HCR_H_WAIT_1(var->right_margin - 1) | + HCR_H_WAIT_2(var->left_margin - 3), fbi->regs + LCDC_HCR); writel(VCR_V_WIDTH(var->vsync_len) | @@ -477,7 +517,23 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf writel(SIZE_XMAX(var->xres) | SIZE_YMAX(var->yres), fbi->regs + LCDC_SIZE); - writel(fbi->pcr, fbi->regs + LCDC_PCR); + + lcd_clk = clk_get_rate(fbi->clk); + tmp = var->pixclock * (unsigned long long)lcd_clk; + do_div(tmp, 1000000); + if (do_div(tmp, 1000000) > 500000) + tmp++; + pcr = (unsigned int)tmp; + if (--pcr > 0x3F) { + pcr = 0x3F; + printk(KERN_WARNING "Must limit pixel clock to %uHz\n", + lcd_clk / pcr); + } + + /* add sync polarities */ + pcr |= fbi->pcr & ~0x3F; + + writel(pcr, fbi->regs + LCDC_PCR); writel(fbi->pwmr, fbi->regs + LCDC_PWMR); writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); writel(fbi->dmacr, fbi->regs + LCDC_DMACR); @@ -619,6 +675,13 @@ static int __init imxfb_probe(struct platform_device *pdev) goto failed_req; } + fbi->clk = clk_get(&pdev->dev, NULL); + if (IS_ERR(fbi->clk)) { + ret = PTR_ERR(fbi->clk);; + dev_err(&pdev->dev, "unable to get clock: %d\n", ret); + goto failed_getclock; + } + fbi->regs = ioremap(res->start, resource_size(res)); if (fbi->regs == NULL) { printk(KERN_ERR"Cannot map frame buffer registers\n"); @@ -650,6 +713,12 @@ static int __init imxfb_probe(struct platform_device *pdev) info->fix.smem_start = fbi->screen_dma; } + if (pdata->init) { + ret = pdata->init(fbi->pdev); + if (ret) + goto failed_platform_init; + } + /* * This makes sure that our colour bitfield * descriptors are correctly initialised. @@ -674,10 +743,15 @@ static int __init imxfb_probe(struct platform_device *pdev) failed_register: fb_dealloc_cmap(&info->cmap); failed_cmap: + if (pdata->exit) + pdata->exit(fbi->pdev); +failed_platform_init: if (!pdata->fixed_screen_cpu) dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, fbi->map_dma); failed_map: + clk_put(fbi->clk); +failed_getclock: iounmap(fbi->regs); failed_ioremap: release_mem_region(res->start, res->end - res->start); @@ -691,6 +765,7 @@ failed_init: static int __devexit imxfb_remove(struct platform_device *pdev) { + struct imx_fb_platform_data *pdata; struct fb_info *info = platform_get_drvdata(pdev); struct imxfb_info *fbi = info->par; struct resource *res; @@ -701,12 +776,19 @@ static int __devexit imxfb_remove(struct platform_device *pdev) unregister_framebuffer(info); + pdata = pdev->dev.platform_data; + if (pdata->exit) + pdata->exit(fbi->pdev); + fb_dealloc_cmap(&info->cmap); kfree(info->pseudo_palette); framebuffer_release(info); iounmap(fbi->regs); release_mem_region(res->start, res->end - res->start + 1); + clk_disable(fbi->clk); + clk_put(fbi->clk); + platform_set_drvdata(pdev, NULL); return 0; diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index 8a75d05f433..fa1a512ce03 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -34,240 +34,240 @@ #include <asm/io.h> #include <asm/uaccess.h> -#define MX3FB_NAME "mx3_sdc_fb" +#define MX3FB_NAME "mx3_sdc_fb" -#define MX3FB_REG_OFFSET 0xB4 +#define MX3FB_REG_OFFSET 0xB4 /* SDC Registers */ -#define SDC_COM_CONF (0xB4 - MX3FB_REG_OFFSET) -#define SDC_GW_CTRL (0xB8 - MX3FB_REG_OFFSET) -#define SDC_FG_POS (0xBC - MX3FB_REG_OFFSET) -#define SDC_BG_POS (0xC0 - MX3FB_REG_OFFSET) -#define SDC_CUR_POS (0xC4 - MX3FB_REG_OFFSET) -#define SDC_PWM_CTRL (0xC8 - MX3FB_REG_OFFSET) -#define SDC_CUR_MAP (0xCC - MX3FB_REG_OFFSET) -#define SDC_HOR_CONF (0xD0 - MX3FB_REG_OFFSET) -#define SDC_VER_CONF (0xD4 - MX3FB_REG_OFFSET) -#define SDC_SHARP_CONF_1 (0xD8 - MX3FB_REG_OFFSET) -#define SDC_SHARP_CONF_2 (0xDC - MX3FB_REG_OFFSET) +#define SDC_COM_CONF (0xB4 - MX3FB_REG_OFFSET) +#define SDC_GW_CTRL (0xB8 - MX3FB_REG_OFFSET) +#define SDC_FG_POS (0xBC - MX3FB_REG_OFFSET) +#define SDC_BG_POS (0xC0 - MX3FB_REG_OFFSET) +#define SDC_CUR_POS (0xC4 - MX3FB_REG_OFFSET) +#define SDC_PWM_CTRL (0xC8 - MX3FB_REG_OFFSET) +#define SDC_CUR_MAP (0xCC - MX3FB_REG_OFFSET) +#define SDC_HOR_CONF (0xD0 - MX3FB_REG_OFFSET) +#define SDC_VER_CONF (0xD4 - MX3FB_REG_OFFSET) +#define SDC_SHARP_CONF_1 (0xD8 - MX3FB_REG_OFFSET) +#define SDC_SHARP_CONF_2 (0xDC - MX3FB_REG_OFFSET) /* Register bits */ -#define SDC_COM_TFT_COLOR 0x00000001UL -#define SDC_COM_FG_EN 0x00000010UL -#define SDC_COM_GWSEL 0x00000020UL -#define SDC_COM_GLB_A 0x00000040UL -#define SDC_COM_KEY_COLOR_G 0x00000080UL -#define SDC_COM_BG_EN 0x00000200UL -#define SDC_COM_SHARP 0x00001000UL +#define SDC_COM_TFT_COLOR 0x00000001UL +#define SDC_COM_FG_EN 0x00000010UL +#define SDC_COM_GWSEL 0x00000020UL +#define SDC_COM_GLB_A 0x00000040UL +#define SDC_COM_KEY_COLOR_G 0x00000080UL +#define SDC_COM_BG_EN 0x00000200UL +#define SDC_COM_SHARP 0x00001000UL -#define SDC_V_SYNC_WIDTH_L 0x00000001UL +#define SDC_V_SYNC_WIDTH_L 0x00000001UL /* Display Interface registers */ -#define DI_DISP_IF_CONF (0x0124 - MX3FB_REG_OFFSET) -#define DI_DISP_SIG_POL (0x0128 - MX3FB_REG_OFFSET) -#define DI_SER_DISP1_CONF (0x012C - MX3FB_REG_OFFSET) -#define DI_SER_DISP2_CONF (0x0130 - MX3FB_REG_OFFSET) -#define DI_HSP_CLK_PER (0x0134 - MX3FB_REG_OFFSET) -#define DI_DISP0_TIME_CONF_1 (0x0138 - MX3FB_REG_OFFSET) -#define DI_DISP0_TIME_CONF_2 (0x013C - MX3FB_REG_OFFSET) -#define DI_DISP0_TIME_CONF_3 (0x0140 - MX3FB_REG_OFFSET) -#define DI_DISP1_TIME_CONF_1 (0x0144 - MX3FB_REG_OFFSET) -#define DI_DISP1_TIME_CONF_2 (0x0148 - MX3FB_REG_OFFSET) -#define DI_DISP1_TIME_CONF_3 (0x014C - MX3FB_REG_OFFSET) -#define DI_DISP2_TIME_CONF_1 (0x0150 - MX3FB_REG_OFFSET) -#define DI_DISP2_TIME_CONF_2 (0x0154 - MX3FB_REG_OFFSET) -#define DI_DISP2_TIME_CONF_3 (0x0158 - MX3FB_REG_OFFSET) -#define DI_DISP3_TIME_CONF (0x015C - MX3FB_REG_OFFSET) -#define DI_DISP0_DB0_MAP (0x0160 - MX3FB_REG_OFFSET) -#define DI_DISP0_DB1_MAP (0x0164 - MX3FB_REG_OFFSET) -#define DI_DISP0_DB2_MAP (0x0168 - MX3FB_REG_OFFSET) -#define DI_DISP0_CB0_MAP (0x016C - MX3FB_REG_OFFSET) -#define DI_DISP0_CB1_MAP (0x0170 - MX3FB_REG_OFFSET) -#define DI_DISP0_CB2_MAP (0x0174 - MX3FB_REG_OFFSET) -#define DI_DISP1_DB0_MAP (0x0178 - MX3FB_REG_OFFSET) -#define DI_DISP1_DB1_MAP (0x017C - MX3FB_REG_OFFSET) -#define DI_DISP1_DB2_MAP (0x0180 - MX3FB_REG_OFFSET) -#define DI_DISP1_CB0_MAP (0x0184 - MX3FB_REG_OFFSET) -#define DI_DISP1_CB1_MAP (0x0188 - MX3FB_REG_OFFSET) -#define DI_DISP1_CB2_MAP (0x018C - MX3FB_REG_OFFSET) -#define DI_DISP2_DB0_MAP (0x0190 - MX3FB_REG_OFFSET) -#define DI_DISP2_DB1_MAP (0x0194 - MX3FB_REG_OFFSET) -#define DI_DISP2_DB2_MAP (0x0198 - MX3FB_REG_OFFSET) -#define DI_DISP2_CB0_MAP (0x019C - MX3FB_REG_OFFSET) -#define DI_DISP2_CB1_MAP (0x01A0 - MX3FB_REG_OFFSET) |