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-rw-r--r--drivers/sh/Kconfig34
-rw-r--r--drivers/sh/Makefile2
-rw-r--r--drivers/sh/intc.c1776
-rw-r--r--drivers/sh/intc/access.c237
-rw-r--r--drivers/sh/intc/balancing.c97
-rw-r--r--drivers/sh/intc/chip.c215
-rw-r--r--drivers/sh/intc/core.c469
-rw-r--r--drivers/sh/intc/dynamic.c135
-rw-r--r--drivers/sh/intc/handle.c307
-rw-r--r--drivers/sh/intc/internals.h185
-rw-r--r--drivers/sh/intc/userimask.c83
-rw-r--r--drivers/sh/intc/virq-debugfs.c64
-rw-r--r--drivers/sh/intc/virq.c255
13 files changed, 2051 insertions, 1808 deletions
diff --git a/drivers/sh/Kconfig b/drivers/sh/Kconfig
index e01ae42774a..f168a615996 100644
--- a/drivers/sh/Kconfig
+++ b/drivers/sh/Kconfig
@@ -1,33 +1,5 @@
-config INTC_USERIMASK
- bool "Userspace interrupt masking support"
- depends on ARCH_SHMOBILE || (SUPERH && CPU_SH4A)
- help
- This enables support for hardware-assisted userspace hardirq
- masking.
+menu "SuperH / SH-Mobile Driver Options"
- SH-4A and newer interrupt blocks all support a special shadowed
- page with all non-masking registers obscured when mapped in to
- userspace. This is primarily for use by userspace device
- drivers that are using special priority levels.
+source "drivers/sh/intc/Kconfig"
- If in doubt, say N.
-
-config INTC_BALANCING
- bool "Hardware IRQ balancing support"
- depends on SMP && SUPERH && CPU_SHX3
- help
- This enables support for IRQ auto-distribution mode on SH-X3
- SMP parts. All of the balancing and CPU wakeup decisions are
- taken care of automatically by hardware for distributed
- vectors.
-
- If in doubt, say N.
-
-config INTC_MAPPING_DEBUG
- bool "Expose IRQ to per-controller id mapping via debugfs"
- depends on DEBUG_FS
- help
- This will create a debugfs entry for showing the relationship
- between system IRQs and the per-controller id tables.
-
- If in doubt, say N.
+endmenu
diff --git a/drivers/sh/Makefile b/drivers/sh/Makefile
index 08fc653a825..50dd5a65f72 100644
--- a/drivers/sh/Makefile
+++ b/drivers/sh/Makefile
@@ -1,7 +1,7 @@
#
# Makefile for the SuperH specific drivers.
#
-obj-y := clk.o intc.o
+obj-y := clk.o intc/
obj-$(CONFIG_SUPERHYWAY) += superhyway/
obj-$(CONFIG_MAPLE) += maple/
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
deleted file mode 100644
index d4325c70cf6..00000000000
--- a/drivers/sh/intc.c
+++ /dev/null
@@ -1,1776 +0,0 @@
-/*
- * Shared interrupt handling code for IPR and INTC2 types of IRQs.
- *
- * Copyright (C) 2007, 2008 Magnus Damm
- * Copyright (C) 2009, 2010 Paul Mundt
- *
- * Based on intc2.c and ipr.c
- *
- * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
- * Copyright (C) 2000 Kazumoto Kojima
- * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
- * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
- * Copyright (C) 2005, 2006 Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/sh_intc.h>
-#include <linux/sysdev.h>
-#include <linux/list.h>
-#include <linux/topology.h>
-#include <linux/bitmap.h>
-#include <linux/cpumask.h>
-#include <linux/spinlock.h>
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-#include <linux/radix-tree.h>
-#include <linux/mutex.h>
-#include <linux/rcupdate.h>
-#include <asm/sizes.h>
-
-#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
- ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
- ((addr_e) << 16) | ((addr_d << 24)))
-
-#define _INTC_SHIFT(h) (h & 0x1f)
-#define _INTC_WIDTH(h) ((h >> 5) & 0xf)
-#define _INTC_FN(h) ((h >> 9) & 0xf)
-#define _INTC_MODE(h) ((h >> 13) & 0x7)
-#define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
-#define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
-
-struct intc_handle_int {
- unsigned int irq;
- unsigned long handle;
-};
-
-struct intc_window {
- phys_addr_t phys;
- void __iomem *virt;
- unsigned long size;
-};
-
-struct intc_map_entry {
- intc_enum enum_id;
- struct intc_desc_int *desc;
-};
-
-struct intc_subgroup_entry {
- unsigned int pirq;
- intc_enum enum_id;
- unsigned long handle;
-};
-
-struct intc_desc_int {
- struct list_head list;
- struct sys_device sysdev;
- struct radix_tree_root tree;
- pm_message_t state;
- spinlock_t lock;
- unsigned int index;
- unsigned long *reg;
-#ifdef CONFIG_SMP
- unsigned long *smp;
-#endif
- unsigned int nr_reg;
- struct intc_handle_int *prio;
- unsigned int nr_prio;
- struct intc_handle_int *sense;
- unsigned int nr_sense;
- struct intc_window *window;
- unsigned int nr_windows;
- struct irq_chip chip;
-};
-
-static LIST_HEAD(intc_list);
-static unsigned int nr_intc_controllers;
-
-/*
- * The intc_irq_map provides a global map of bound IRQ vectors for a
- * given platform. Allocation of IRQs are either static through the CPU
- * vector map, or dynamic in the case of board mux vectors or MSI.
- *
- * As this is a central point for all IRQ controllers on the system,
- * each of the available sources are mapped out here. This combined with
- * sparseirq makes it quite trivial to keep the vector map tightly packed
- * when dynamically creating IRQs, as well as tying in to otherwise
- * unused irq_desc positions in the sparse array.
- */
-static DECLARE_BITMAP(intc_irq_map, NR_IRQS);
-static struct intc_map_entry intc_irq_xlate[NR_IRQS];
-static DEFINE_SPINLOCK(vector_lock);
-static DEFINE_SPINLOCK(xlate_lock);
-
-#ifdef CONFIG_SMP
-#define IS_SMP(x) x.smp
-#define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
-#define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
-#else
-#define IS_SMP(x) 0
-#define INTC_REG(d, x, c) (d->reg[(x)])
-#define SMP_NR(d, x) 1
-#endif
-
-static unsigned int intc_prio_level[NR_IRQS]; /* for now */
-static unsigned int default_prio_level = 2; /* 2 - 16 */
-static unsigned long ack_handle[NR_IRQS];
-#ifdef CONFIG_INTC_BALANCING
-static unsigned long dist_handle[NR_IRQS];
-#endif
-
-struct intc_virq_list {
- unsigned int irq;
- struct intc_virq_list *next;
-};
-
-#define for_each_virq(entry, head) \
- for (entry = head; entry; entry = entry->next)
-
-static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
-{
- struct irq_chip *chip = get_irq_chip(irq);
-
- return container_of(chip, struct intc_desc_int, chip);
-}
-
-static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc)
-{
- generic_handle_irq((unsigned int)get_irq_data(irq));
-}
-
-static inline void activate_irq(int irq)
-{
-#ifdef CONFIG_ARM
- /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
- * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
- */
- set_irq_flags(irq, IRQF_VALID);
-#else
- /* same effect on other architectures */
- set_irq_noprobe(irq);
-#endif
-}
-
-static unsigned long intc_phys_to_virt(struct intc_desc_int *d,
- unsigned long address)
-{
- struct intc_window *window;
- int k;
-
- /* scan through physical windows and convert address */
- for (k = 0; k < d->nr_windows; k++) {
- window = d->window + k;
-
- if (address < window->phys)
- continue;
-
- if (address >= (window->phys + window->size))
- continue;
-
- address -= window->phys;
- address += (unsigned long)window->virt;
-
- return address;
- }
-
- /* no windows defined, register must be 1:1 mapped virt:phys */
- return address;
-}
-
-static unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address)
-{
- unsigned int k;
-
- address = intc_phys_to_virt(d, address);
-
- for (k = 0; k < d->nr_reg; k++) {
- if (d->reg[k] == address)
- return k;
- }
-
- BUG();
- return 0;
-}
-
-static inline unsigned int set_field(unsigned int value,
- unsigned int field_value,
- unsigned int handle)
-{
- unsigned int width = _INTC_WIDTH(handle);
- unsigned int shift = _INTC_SHIFT(handle);
-
- value &= ~(((1 << width) - 1) << shift);
- value |= field_value << shift;
- return value;
-}
-
-static inline unsigned long get_field(unsigned int value, unsigned int handle)
-{
- unsigned int width = _INTC_WIDTH(handle);
- unsigned int shift = _INTC_SHIFT(handle);
- unsigned int mask = ((1 << width) - 1) << shift;
-
- return (value & mask) >> shift;
-}
-
-static unsigned long test_8(unsigned long addr, unsigned long h,
- unsigned long ignore)
-{
- return get_field(__raw_readb(addr), h);
-}
-
-static unsigned long test_16(unsigned long addr, unsigned long h,
- unsigned long ignore)
-{
- return get_field(__raw_readw(addr), h);
-}
-
-static unsigned long test_32(unsigned long addr, unsigned long h,
- unsigned long ignore)
-{
- return get_field(__raw_readl(addr), h);
-}
-
-static unsigned long write_8(unsigned long addr, unsigned long h,
- unsigned long data)
-{
- __raw_writeb(set_field(0, data, h), addr);
- (void)__raw_readb(addr); /* Defeat write posting */
- return 0;
-}
-
-static unsigned long write_16(unsigned long addr, unsigned long h,
- unsigned long data)
-{
- __raw_writew(set_field(0, data, h), addr);
- (void)__raw_readw(addr); /* Defeat write posting */
- return 0;
-}
-
-static unsigned long write_32(unsigned long addr, unsigned long h,
- unsigned long data)
-{
- __raw_writel(set_field(0, data, h), addr);
- (void)__raw_readl(addr); /* Defeat write posting */
- return 0;
-}
-
-static unsigned long modify_8(unsigned long addr, unsigned long h,
- unsigned long data)
-{
- unsigned long flags;
- local_irq_save(flags);
- __raw_writeb(set_field(__raw_readb(addr), data, h), addr);
- (void)__raw_readb(addr); /* Defeat write posting */
- local_irq_restore(flags);
- return 0;
-}
-
-static unsigned long modify_16(unsigned long addr, unsigned long h,
- unsigned long data)
-{
- unsigned long flags;
- local_irq_save(flags);
- __raw_writew(set_field(__raw_readw(addr), data, h), addr);
- (void)__raw_readw(addr); /* Defeat write posting */
- local_irq_restore(flags);
- return 0;
-}
-
-static unsigned long modify_32(unsigned long addr, unsigned long h,
- unsigned long data)
-{
- unsigned long flags;
- local_irq_save(flags);
- __raw_writel(set_field(__raw_readl(addr), data, h), addr);
- (void)__raw_readl(addr); /* Defeat write posting */
- local_irq_restore(flags);
- return 0;
-}
-
-enum {
- REG_FN_ERR = 0,
- REG_FN_TEST_BASE = 1,
- REG_FN_WRITE_BASE = 5,
- REG_FN_MODIFY_BASE = 9
-};
-
-static unsigned long (*intc_reg_fns[])(unsigned long addr,
- unsigned long h,
- unsigned long data) = {
- [REG_FN_TEST_BASE + 0] = test_8,
- [REG_FN_TEST_BASE + 1] = test_16,
- [REG_FN_TEST_BASE + 3] = test_32,
- [REG_FN_WRITE_BASE + 0] = write_8,
- [REG_FN_WRITE_BASE + 1] = write_16,
- [REG_FN_WRITE_BASE + 3] = write_32,
- [REG_FN_MODIFY_BASE + 0] = modify_8,
- [REG_FN_MODIFY_BASE + 1] = modify_16,
- [REG_FN_MODIFY_BASE + 3] = modify_32,
-};
-
-enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */
- MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */
- MODE_DUAL_REG, /* Two registers, set bit to enable / disable */
- MODE_PRIO_REG, /* Priority value written to enable interrupt */
- MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */
-};
-
-static unsigned long intc_mode_field(unsigned long addr,
- unsigned long handle,
- unsigned long (*fn)(unsigned long,
- unsigned long,
- unsigned long),
- unsigned int irq)
-{
- return fn(addr, handle, ((1 << _INTC_WIDTH(handle)) - 1));
-}
-
-static unsigned long intc_mode_zero(unsigned long addr,
- unsigned long handle,
- unsigned long (*fn)(unsigned long,
- unsigned long,
- unsigned long),
- unsigned int irq)
-{
- return fn(addr, handle, 0);
-}
-
-static unsigned long intc_mode_prio(unsigned long addr,
- unsigned long handle,
- unsigned long (*fn)(unsigned long,
- unsigned long,
- unsigned long),
- unsigned int irq)
-{
- return fn(addr, handle, intc_prio_level[irq]);
-}
-
-static unsigned long (*intc_enable_fns[])(unsigned long addr,
- unsigned long handle,
- unsigned long (*fn)(unsigned long,
- unsigned long,
- unsigned long),
- unsigned int irq) = {
- [MODE_ENABLE_REG] = intc_mode_field,
- [MODE_MASK_REG] = intc_mode_zero,
- [MODE_DUAL_REG] = intc_mode_field,
- [MODE_PRIO_REG] = intc_mode_prio,
- [MODE_PCLR_REG] = intc_mode_prio,
-};
-
-static unsigned long (*intc_disable_fns[])(unsigned long addr,
- unsigned long handle,
- unsigned long (*fn)(unsigned long,
- unsigned long,
- unsigned long),
- unsigned int irq) = {
- [MODE_ENABLE_REG] = intc_mode_zero,
- [MODE_MASK_REG] = intc_mode_field,
- [MODE_DUAL_REG] = intc_mode_field,
- [MODE_PRIO_REG] = intc_mode_zero,
- [MODE_PCLR_REG] = intc_mode_field,
-};
-
-#ifdef CONFIG_INTC_BALANCING
-static inline void intc_balancing_enable(unsigned int irq)
-{
- struct intc_desc_int *d = get_intc_desc(irq);
- unsigned long handle = dist_handle[irq];
- unsigned long addr;
-
- if (irq_balancing_disabled(irq) || !handle)
- return;
-
- addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
- intc_reg_fns[_INTC_FN(handle)](addr, handle, 1);
-}
-
-static inline void intc_balancing_disable(unsigned int irq)
-{
- struct intc_desc_int *d = get_intc_desc(irq);
- unsigned long handle = dist_handle[irq];
- unsigned long addr;
-
- if (irq_balancing_disabled(irq) || !handle)
- return;
-
- addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
- intc_reg_fns[_INTC_FN(handle)](addr, handle, 0);
-}
-
-static unsigned int intc_dist_data(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id)
-{
- struct intc_mask_reg *mr = desc->hw.mask_regs;
- unsigned int i, j, fn, mode;
- unsigned long reg_e, reg_d;
-
- for (i = 0; mr && enum_id && i < desc->hw.nr_mask_regs; i++) {
- mr = desc->hw.mask_regs + i;
-
- /*
- * Skip this entry if there's no auto-distribution
- * register associated with it.
- */
- if (!mr->dist_reg)
- continue;
-
- for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
- if (mr->enum_ids[j] != enum_id)
- continue;
-
- fn = REG_FN_MODIFY_BASE;
- mode = MODE_ENABLE_REG;
- reg_e = mr->dist_reg;
- reg_d = mr->dist_reg;
-
- fn += (mr->reg_width >> 3) - 1;
- return _INTC_MK(fn, mode,
- intc_get_reg(d, reg_e),
- intc_get_reg(d, reg_d),
- 1,
- (mr->reg_width - 1) - j);
- }
- }
-
- /*
- * It's possible we've gotten here with no distribution options
- * available for the IRQ in question, so we just skip over those.
- */
- return 0;
-}
-#else
-static inline void intc_balancing_enable(unsigned int irq)
-{
-}
-
-static inline void intc_balancing_disable(unsigned int irq)
-{
-}
-#endif
-
-static inline void _intc_enable(unsigned int irq, unsigned long handle)
-{
- struct intc_desc_int *d = get_intc_desc(irq);
- unsigned long addr;
- unsigned int cpu;
-
- for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
-#ifdef CONFIG_SMP
- if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity))
- continue;
-#endif
- addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
- intc_enable_fns[_INTC_MODE(handle)](addr, handle, intc_reg_fns\
- [_INTC_FN(handle)], irq);
- }
-
- intc_balancing_enable(irq);
-}
-
-static void intc_enable(unsigned int irq)
-{
- _intc_enable(irq, (unsigned long)get_irq_chip_data(irq));
-}
-
-static void intc_disable(unsigned int irq)
-{
- struct intc_desc_int *d = get_intc_desc(irq);
- unsigned long handle = (unsigned long)get_irq_chip_data(irq);
- unsigned long addr;
- unsigned int cpu;
-
- intc_balancing_disable(irq);
-
- for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
-#ifdef CONFIG_SMP
- if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity))
- continue;
-#endif
- addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
- intc_disable_fns[_INTC_MODE(handle)](addr, handle,intc_reg_fns\
- [_INTC_FN(handle)], irq);
- }
-}
-
-static unsigned long
-(*intc_enable_noprio_fns[])(unsigned long addr,
- unsigned long handle,
- unsigned long (*fn)(unsigned long,
- unsigned long,
- unsigned long),
- unsigned int irq) = {
- [MODE_ENABLE_REG] = intc_mode_field,
- [MODE_MASK_REG] = intc_mode_zero,
- [MODE_DUAL_REG] = intc_mode_field,
- [MODE_PRIO_REG] = intc_mode_field,
- [MODE_PCLR_REG] = intc_mode_field,
-};
-
-static void intc_enable_disable(struct intc_desc_int *d,
- unsigned long handle, int do_enable)
-{
- unsigned long addr;
- unsigned int cpu;
- unsigned long (*fn)(unsigned long, unsigned long,
- unsigned long (*)(unsigned long, unsigned long,
- unsigned long),
- unsigned int);
-
- if (do_enable) {
- for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
- addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
- fn = intc_enable_noprio_fns[_INTC_MODE(handle)];
- fn(addr, handle, intc_reg_fns[_INTC_FN(handle)], 0);
- }
- } else {
- for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
- addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
- fn = intc_disable_fns[_INTC_MODE(handle)];
- fn(addr, handle, intc_reg_fns[_INTC_FN(handle)], 0);
- }
- }
-}
-
-static int intc_set_wake(unsigned int irq, unsigned int on)
-{
- return 0; /* allow wakeup, but setup hardware in intc_suspend() */
-}
-
-#ifdef CONFIG_SMP
-/*
- * This is held with the irq desc lock held, so we don't require any
- * additional locking here at the intc desc level. The affinity mask is
- * later tested in the enable/disable paths.
- */
-static int intc_set_affinity(unsigned int irq, const struct cpumask *cpumask)
-{
- if (!cpumask_intersects(cpumask, cpu_online_mask))
- return -1;
-
- cpumask_copy(irq_to_desc(irq)->affinity, cpumask);
-
- return 0;
-}
-#endif
-
-static void intc_mask_ack(unsigned int irq)
-{
- struct intc_desc_int *d = get_intc_desc(irq);
- unsigned long handle = ack_handle[irq];
- unsigned long addr;
-
- intc_disable(irq);
-
- /* read register and write zero only to the associated bit */
- if (handle) {
- addr = INTC_REG(d, _INTC_ADDR_D(handle), 0);
- switch (_INTC_FN(handle)) {
- case REG_FN_MODIFY_BASE + 0: /* 8bit */
- __raw_readb(addr);
- __raw_writeb(0xff ^ set_field(0, 1, handle), addr);
- break;
- case REG_FN_MODIFY_BASE + 1: /* 16bit */
- __raw_readw(addr);
- __raw_writew(0xffff ^ set_field(0, 1, handle), addr);
- break;
- case REG_FN_MODIFY_BASE + 3: /* 32bit */
- __raw_readl(addr);
- __raw_writel(0xffffffff ^ set_field(0, 1, handle), addr);
- break;
- default:
- BUG();
- break;
- }
- }
-}
-
-static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
- unsigned int nr_hp,
- unsigned int irq)
-{
- int i;
-
- /*
- * this doesn't scale well, but...
- *
- * this function should only be used for cerain uncommon
- * operations such as intc_set_priority() and intc_set_sense()
- * and in those rare cases performance doesn't matter that much.
- * keeping the memory footprint low is more important.
- *
- * one rather simple way to speed this up and still keep the
- * memory footprint down is to make sure the array is sorted
- * and then perform a bisect to lookup the irq.
- */
- for (i = 0; i < nr_hp; i++) {
- if ((hp + i)->irq != irq)
- continue;
-
- return hp + i;
- }
-
- return NULL;
-}
-
-int intc_set_priority(unsigned int irq, unsigned int prio)
-{
- struct intc_desc_int *d = get_intc_desc(irq);
- struct intc_handle_int *ihp;
-
- if (!intc_prio_level[irq] || prio <= 1)
- return -EINVAL;
-
- ihp = intc_find_irq(d->prio, d->nr_prio, irq);
- if (ihp) {
- if (prio >= (1 << _INTC_WIDTH(ihp->handle)))
- return -EINVAL;
-
- intc_prio_level[irq] = prio;
-
- /*
- * only set secondary masking method directly
- * primary masking method is using intc_prio_level[irq]
- * priority level will be set during next enable()
- */
- if (_INTC_FN(ihp->handle) != REG_FN_ERR)
- _intc_enable(irq, ihp->handle);
- }
- return 0;
-}
-
-#define VALID(x) (x | 0x80)
-
-static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
- [IRQ_TYPE_EDGE_FALLING] = VALID(0),
- [IRQ_TYPE_EDGE_RISING] = VALID(1),
- [IRQ_TYPE_LEVEL_LOW] = VALID(2),
- /* SH7706, SH7707 and SH7709 do not support high level triggered */
-#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \
- !defined(CONFIG_CPU_SUBTYPE_SH7707) && \
- !defined(CONFIG_CPU_SUBTYPE_SH7709)
- [IRQ_TYPE_LEVEL_HIGH] = VALID(3),
-#endif
-};
-
-static int intc_set_sense(unsigned int irq, unsigned int type)
-{
- struct intc_desc_int *d = get_intc_desc(irq);
- unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
- struct intc_handle_int *ihp;
- unsigned long addr;
-
- if (!value)
- return -EINVAL;
-
- ihp = intc_find_irq(d->sense, d->nr_sense, irq);
- if (ihp) {
- addr = INTC_REG(d, _INTC_ADDR_E(ihp->handle), 0);
- intc_reg_fns[_INTC_FN(ihp->handle)](addr, ihp->handle, value);
- }
- return 0;
-}
-
-static intc_enum __init intc_grp_id(struct intc_desc *desc,
- intc_enum enum_id)
-{
- struct intc_group *g = desc->hw.groups;
- unsigned int i, j;
-
- for (i = 0; g && enum_id && i < desc->hw.nr_groups; i++) {
- g = desc->hw.groups + i;
-
- for (j = 0; g->enum_ids[j]; j++) {
- if (g->enum_ids[j] != enum_id)
- continue;
-
- return g->enum_id;
- }
- }
-
- return 0;
-}
-
-static unsigned int __init _intc_mask_data(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id,
- unsigned int *reg_idx,
- unsigned int *fld_idx)
-{
- struct intc_mask_reg *mr = desc->hw.mask_regs;
- unsigned int fn, mode;
- unsigned long reg_e, reg_d;
-
- while (mr && enum_id && *reg_idx < desc->hw.nr_mask_regs) {
- mr = desc->hw.mask_regs + *reg_idx;
-
- for (; *fld_idx < ARRAY_SIZE(mr->enum_ids); (*fld_idx)++) {
- if (mr->enum_ids[*fld_idx] != enum_id)
- continue;
-
- if (mr->set_reg && mr->clr_reg) {
- fn = REG_FN_WRITE_BASE;
- mode = MODE_DUAL_REG;
- reg_e = mr->clr_reg;
- reg_d = mr->set_reg;
- } else {
- fn = REG_FN_MODIFY_BASE;
- if (mr->set_reg) {
- mode = MODE_ENABLE_REG;
- reg_e = mr->set_reg;
- reg_d = mr->set_reg;
- } else {
- mode = MODE_MASK_REG;
- reg_e = mr->clr_reg;
- reg_d = mr->clr_reg;
- }
- }
-
- fn += (mr->reg_width >> 3) - 1;
- return _INTC_MK(fn, mode,
- intc_get_reg(d, reg_e),
- intc_get_reg(d, reg_d),
- 1,
- (mr->reg_width - 1) - *fld_idx);
- }
-
- *fld_idx = 0;
- (*reg_idx)++;
- }
-
- return 0;
-}
-
-static unsigned int __init intc_mask_data(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id, int do_grps)
-{
- unsigned int i = 0;
- unsigned int j = 0;
- unsigned int ret;
-
- ret = _intc_mask_data(desc, d, enum_id, &i, &j);
- if (ret)
- return ret;
-
- if (do_grps)
- return intc_mask_data(desc, d, intc_grp_id(desc, enum_id), 0);
-
- return 0;
-}
-
-static unsigned int __init _intc_prio_data(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id,
- unsigned int *reg_idx,
- unsigned int *fld_idx)
-{
- struct intc_prio_reg *pr = desc->hw.prio_regs;
- unsigned int fn, n, mode, bit;
- unsigned long reg_e, reg_d;
-
- while (pr && enum_id && *reg_idx < desc->hw.nr_prio_regs) {
- pr = desc->hw.prio_regs + *reg_idx;
-
- for (; *fld_idx < ARRAY_SIZE(pr->enum_ids); (*fld_idx)++) {
- if (pr->enum_ids[*fld_idx] != enum_id)
- continue;
-
- if (pr->set_reg && pr->clr_reg) {
- fn = REG_FN_WRITE_BASE;
- mode = MODE_PCLR_REG;
- reg_e = pr->set_reg;
- reg_d = pr->clr_reg;
- } else {
- fn = REG_FN_MODIFY_BASE;
- mode = MODE_PRIO_REG;
- if (!pr->set_reg)
- BUG();
- reg_e = pr->set_reg;
- reg_d = pr->set_reg;
- }
-
- fn += (pr->reg_width >> 3) - 1;
- n = *fld_idx + 1;
-
- BUG_ON(n * pr->field_width > pr->reg_width);
-
- bit = pr->reg_width - (n * pr->field_width);
-
- return _INTC_MK(fn, mode,
- intc_get_reg(d, reg_e),
- intc_get_reg(d, reg_d),
- pr->field_width, bit);
- }
-
- *fld_idx = 0;
- (*reg_idx)++;
- }
-
- return 0;
-}
-
-static unsigned int __init intc_prio_data(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id, int do_grps)
-{
- unsigned int i = 0;
- unsigned int j = 0;
- unsigned int ret;
-
- ret = _intc_prio_data(desc, d, enum_id, &i, &j);
- if (ret)
- return ret;
-
- if (do_grps)
- return intc_prio_data(desc, d, intc_grp_id(desc, enum_id), 0);
-
- return 0;
-}
-
-static void __init intc_enable_disable_enum(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id, int enable)
-{
- unsigned int i, j, data;
-
- /* go through and enable/disable all mask bits */
- i = j = 0;
- do {
- data = _intc_mask_data(desc, d, enum_id, &i, &j);
- if (data)
- intc_enable_disable(d, data, enable);
- j++;
- } while (data);
-
- /* go through and enable/disable all priority fields */
- i = j = 0;
- do {
- data = _intc_prio_data(desc, d, enum_id, &i, &j);
- if (data)
- intc_enable_disable(d, data, enable);
-
- j++;
- } while (data);
-}
-
-static unsigned int __init intc_ack_data(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id)
-{
- struct intc_mask_reg *mr = desc->hw.ack_regs;
- unsigned int i, j, fn, mode;
- unsigned long reg_e, reg_d;
-
- for (i = 0; mr && enum_id && i < desc->hw.nr_ack_regs; i++) {
- mr = desc->hw.ack_regs + i;
-
- for (j = 0; j < ARRAY_SIZE(mr->enum_ids); j++) {
- if (mr->enum_ids[j] != enum_id)
- continue;
-
- fn = REG_FN_MODIFY_BASE;
- mode = MODE_ENABLE_REG;
- reg_e = mr->set_reg;
- reg_d = mr->set_reg;
-
- fn += (mr->reg_width >> 3) - 1;
- return _INTC_MK(fn, mode,
- intc_get_reg(d, reg_e),
- intc_get_reg(d, reg_d),
- 1,
- (mr->reg_width - 1) - j);
- }
- }
-
- return 0;
-}
-
-static unsigned int __init intc_sense_data(struct intc_desc *desc,
- struct intc_desc_int *d,
- intc_enum enum_id)
-{
- struct intc_sense_reg *sr = desc->hw.sense_regs;
- unsigned int i, j, fn, bit;
-
- for (i = 0; sr && enum_id && i < desc->hw.nr_sense_regs; i++) {
- sr = desc->hw.sense_regs + i;
-
- for (j = 0; j < ARRAY_SIZE(sr->enum_ids); j++) {
- if (sr->enum_ids[j] != enum_id)
- continue;
-
- fn = REG_FN_MODIFY_BASE;
- fn += (sr->reg_width >> 3) - 1;
-
- BUG_ON((j + 1) * sr->field_width > sr->reg_width);
-
- bit = sr->reg_width - ((j + 1) * sr->field_width);
-
- return _INTC_MK(fn, 0, intc_get_reg(d, sr->reg),
- 0, sr->field_width, bit);
- }
- }
-
- return 0;
-}
-
-#define INTC_TAG_VIRQ_NEEDS_ALLOC 0
-
-int intc_irq_lookup(const char *chipname, intc_enum enum_id)
-{
- struct intc_map_entry *ptr;
- struct intc_desc_int *d;
- int irq = -1;
-
- list_for_each_entry(d, &intc_list, list) {
- int tagged;
-
- if (strcmp(d->chip.name, chipname) != 0)
- continue;
-
- /*
- * Catch early lookups for subgroup VIRQs that have not
- * yet been allocated an IRQ. This already includes a
- * fast-path out if the tree is untagged, so there is no
- * need to explicitly test the root tree.
- */
- tagged = radix_tree_tag_get(&d->tree, enum_id,
- INTC_TAG_VIRQ_NEEDS_ALLOC);
- if (unlikely(tagged))
- break;
-
- ptr = radix_tree_lookup(&d->tree, enum_id);
- if (ptr) {
- irq = ptr - intc_irq_xlate;
- break;
- }
- }
-
- return irq;
-}
-EXPORT_SYMBOL_GPL(intc_irq_lookup);
-
-static int add_virq_to_pirq(unsigned int irq, unsigned int virq)
-{
- struct intc_virq_list **last, *entry;
- struct irq_desc *desc = irq_to_desc(irq);
-
- /* scan for duplicates */
- last = (struct intc_virq_list **)&desc->handler_data;
- for_each_virq(entry, desc->handler_data) {
- if (entry->irq == virq)
- return 0;
- last = &entry->next;
- }
-
- entry = kzalloc(sizeof(struct intc_virq_list), GFP_ATOMIC);
- if (!entry) {
- pr_err("can't allocate VIRQ mapping for %d\n", virq);
- return -ENOMEM;
- }
-
- entry->irq = virq;
-
- *last = entry;
-
- return 0;
-}
-
-static void intc_virq_handler(unsigned int irq, struct irq_desc *desc)
-{
- struct intc_virq_list *entry, *vlist = get_irq_data(irq);
- struct intc_desc_int *d = get_intc_desc(irq);
-
- desc->chip->mask_ack(irq);
-
- for_each_virq(entry, vlist) {
- unsigned long addr, handle;
-
- handle = (unsigned long)get_irq_data(entry->irq);
- addr = INTC_REG(d, _INTC_ADDR_E(handle), 0);
-
- if (intc_reg_fns[_INTC_FN(handle)](addr, handle, 0))
- generic_handle_irq(entry->irq);
- }
-
- desc->chip->unmask(irq);
-}
-
-static unsigned long __init intc_subgroup_data(struct intc_subgroup *subgroup,
- struct intc_desc_int *d,
- unsigned int index)
-{
- unsigned int fn = REG_FN_TEST_BASE + (subgroup->reg_width >> 3) - 1;
-
- return _INTC_MK(fn, MODE_ENABLE_REG, intc_get_reg(d, subgroup->reg),
- 0, 1, (subgroup->reg_width - 1) - index);
-}
-
-static void __init intc_subgroup_init_one(struct intc_desc *desc,
- struct intc_desc_int *d,
- struct intc_subgroup *subgroup)
-{
- struct intc_map_entry *mapped;
- unsigned int pirq;
- unsigned long flags;
- int i;
-
- mapped = radix_tree_lookup(&d->tree, subgroup->parent_id);
- if (!mapped) {
- WARN_ON(1);
- return;
- }
-
- pirq = mapped - intc_irq_xlate;
-
- spin_lock_irqsave(&d->lock, flags);
-
- for (i = 0; i < ARRAY_SIZE(subgroup->enum_ids); i++) {
- struct intc_subgroup_entry *entry;
- int err;
-