diff options
Diffstat (limited to 'drivers/serial/crisv10.c')
-rw-r--r-- | drivers/serial/crisv10.c | 4573 |
1 files changed, 0 insertions, 4573 deletions
diff --git a/drivers/serial/crisv10.c b/drivers/serial/crisv10.c deleted file mode 100644 index bcc31f2140a..00000000000 --- a/drivers/serial/crisv10.c +++ /dev/null @@ -1,4573 +0,0 @@ -/* - * Serial port driver for the ETRAX 100LX chip - * - * Copyright (C) 1998-2007 Axis Communications AB - * - * Many, many authors. Based once upon a time on serial.c for 16x50. - * - */ - -static char *serial_version = "$Revision: 1.25 $"; - -#include <linux/types.h> -#include <linux/errno.h> -#include <linux/signal.h> -#include <linux/sched.h> -#include <linux/timer.h> -#include <linux/interrupt.h> -#include <linux/tty.h> -#include <linux/tty_flip.h> -#include <linux/major.h> -#include <linux/string.h> -#include <linux/fcntl.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/mutex.h> -#include <linux/bitops.h> -#include <linux/seq_file.h> -#include <linux/delay.h> -#include <linux/module.h> -#include <linux/uaccess.h> -#include <linux/io.h> - -#include <asm/irq.h> -#include <asm/dma.h> -#include <asm/system.h> - -#include <arch/svinto.h> - -/* non-arch dependent serial structures are in linux/serial.h */ -#include <linux/serial.h> -/* while we keep our own stuff (struct e100_serial) in a local .h file */ -#include "crisv10.h" -#include <asm/fasttimer.h> -#include <arch/io_interface_mux.h> - -#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER -#ifndef CONFIG_ETRAX_FAST_TIMER -#error "Enable FAST_TIMER to use SERIAL_FAST_TIMER" -#endif -#endif - -#if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \ - (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0) -#error "RX_TIMEOUT_TICKS == 0 not allowed, use 1" -#endif - -#if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G) -#error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G" -#endif - -/* - * All of the compatibilty code so we can compile serial.c against - * older kernels is hidden in serial_compat.h - */ -#if defined(LOCAL_HEADERS) -#include "serial_compat.h" -#endif - -struct tty_driver *serial_driver; - -/* number of characters left in xmit buffer before we ask for more */ -#define WAKEUP_CHARS 256 - -//#define SERIAL_DEBUG_INTR -//#define SERIAL_DEBUG_OPEN -//#define SERIAL_DEBUG_FLOW -//#define SERIAL_DEBUG_DATA -//#define SERIAL_DEBUG_THROTTLE -//#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */ -//#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */ - -/* Enable this to use serial interrupts to handle when you - expect the first received event on the serial port to - be an error, break or similar. Used to be able to flash IRMA - from eLinux */ -#define SERIAL_HANDLE_EARLY_ERRORS - -/* Currently 16 descriptors x 128 bytes = 2048 bytes */ -#define SERIAL_DESCR_BUF_SIZE 256 - -#define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */ -#define DEF_BAUD_BASE SERIAL_PRESCALE_BASE - -/* We don't want to load the system with massive fast timer interrupt - * on high baudrates so limit it to 250 us (4kHz) */ -#define MIN_FLUSH_TIME_USEC 250 - -/* Add an x here to log a lot of timer stuff */ -#define TIMERD(x) -/* Debug details of interrupt handling */ -#define DINTR1(x) /* irq on/off, errors */ -#define DINTR2(x) /* tx and rx */ -/* Debug flip buffer stuff */ -#define DFLIP(x) -/* Debug flow control and overview of data flow */ -#define DFLOW(x) -#define DBAUD(x) -#define DLOG_INT_TRIG(x) - -//#define DEBUG_LOG_INCLUDED -#ifndef DEBUG_LOG_INCLUDED -#define DEBUG_LOG(line, string, value) -#else -struct debug_log_info -{ - unsigned long time; - unsigned long timer_data; -// int line; - const char *string; - int value; -}; -#define DEBUG_LOG_SIZE 4096 - -struct debug_log_info debug_log[DEBUG_LOG_SIZE]; -int debug_log_pos = 0; - -#define DEBUG_LOG(_line, _string, _value) do { \ - if ((_line) == SERIAL_DEBUG_LINE) {\ - debug_log_func(_line, _string, _value); \ - }\ -}while(0) - -void debug_log_func(int line, const char *string, int value) -{ - if (debug_log_pos < DEBUG_LOG_SIZE) { - debug_log[debug_log_pos].time = jiffies; - debug_log[debug_log_pos].timer_data = *R_TIMER_DATA; -// debug_log[debug_log_pos].line = line; - debug_log[debug_log_pos].string = string; - debug_log[debug_log_pos].value = value; - debug_log_pos++; - } - /*printk(string, value);*/ -} -#endif - -#ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS -/* Default number of timer ticks before flushing rx fifo - * When using "little data, low latency applications: use 0 - * When using "much data applications (PPP)" use ~5 - */ -#define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5 -#endif - -unsigned long timer_data_to_ns(unsigned long timer_data); - -static void change_speed(struct e100_serial *info); -static void rs_throttle(struct tty_struct * tty); -static void rs_wait_until_sent(struct tty_struct *tty, int timeout); -static int rs_write(struct tty_struct *tty, - const unsigned char *buf, int count); -#ifdef CONFIG_ETRAX_RS485 -static int e100_write_rs485(struct tty_struct *tty, - const unsigned char *buf, int count); -#endif -static int get_lsr_info(struct e100_serial *info, unsigned int *value); - - -#define DEF_BAUD 115200 /* 115.2 kbit/s */ -#define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) -#define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */ -/* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */ -#define DEF_TX 0x80 /* or SERIAL_CTRL_B */ - -/* offsets from R_SERIALx_CTRL */ - -#define REG_DATA 0 -#define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */ -#define REG_TR_DATA 0 -#define REG_STATUS 1 -#define REG_TR_CTRL 1 -#define REG_REC_CTRL 2 -#define REG_BAUD 3 -#define REG_XOFF 4 /* this is a 32 bit register */ - -/* The bitfields are the same for all serial ports */ -#define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd) -#define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail) -#define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err) -#define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err) -#define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun) - -#define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK) - -/* Values for info->errorcode */ -#define ERRCODE_SET_BREAK (TTY_BREAK) -#define ERRCODE_INSERT 0x100 -#define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK) - -#define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop; - -/* - * General note regarding the use of IO_* macros in this file: - * - * We will use the bits defined for DMA channel 6 when using various - * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are - * the same for all channels (which of course they are). - * - * We will also use the bits defined for serial port 0 when writing commands - * to the different ports, as these bits too are the same for all ports. - */ - - -/* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */ -static const unsigned long e100_ser_int_mask = 0 -#ifdef CONFIG_ETRAX_SERIAL_PORT0 -| IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready) -#endif -#ifdef CONFIG_ETRAX_SERIAL_PORT1 -| IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready) -#endif -#ifdef CONFIG_ETRAX_SERIAL_PORT2 -| IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready) -#endif -#ifdef CONFIG_ETRAX_SERIAL_PORT3 -| IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready) -#endif -; -unsigned long r_alt_ser_baudrate_shadow = 0; - -/* this is the data for the four serial ports in the etrax100 */ -/* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */ -/* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */ - -static struct e100_serial rs_table[] = { - { .baud = DEF_BAUD, - .ioport = (unsigned char *)R_SERIAL0_CTRL, - .irq = 1U << 12, /* uses DMA 6 and 7 */ - .oclrintradr = R_DMA_CH6_CLR_INTR, - .ofirstadr = R_DMA_CH6_FIRST, - .ocmdadr = R_DMA_CH6_CMD, - .ostatusadr = R_DMA_CH6_STATUS, - .iclrintradr = R_DMA_CH7_CLR_INTR, - .ifirstadr = R_DMA_CH7_FIRST, - .icmdadr = R_DMA_CH7_CMD, - .idescradr = R_DMA_CH7_DESCR, - .flags = STD_FLAGS, - .rx_ctrl = DEF_RX, - .tx_ctrl = DEF_TX, - .iseteop = 2, - .dma_owner = dma_ser0, - .io_if = if_serial_0, -#ifdef CONFIG_ETRAX_SERIAL_PORT0 - .enabled = 1, -#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT - .dma_out_enabled = 1, - .dma_out_nbr = SER0_TX_DMA_NBR, - .dma_out_irq_nbr = SER0_DMA_TX_IRQ_NBR, - .dma_out_irq_flags = IRQF_DISABLED, - .dma_out_irq_description = "serial 0 dma tr", -#else - .dma_out_enabled = 0, - .dma_out_nbr = UINT_MAX, - .dma_out_irq_nbr = 0, - .dma_out_irq_flags = 0, - .dma_out_irq_description = NULL, -#endif -#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN - .dma_in_enabled = 1, - .dma_in_nbr = SER0_RX_DMA_NBR, - .dma_in_irq_nbr = SER0_DMA_RX_IRQ_NBR, - .dma_in_irq_flags = IRQF_DISABLED, - .dma_in_irq_description = "serial 0 dma rec", -#else - .dma_in_enabled = 0, - .dma_in_nbr = UINT_MAX, - .dma_in_irq_nbr = 0, - .dma_in_irq_flags = 0, - .dma_in_irq_description = NULL, -#endif -#else - .enabled = 0, - .io_if_description = NULL, - .dma_out_enabled = 0, - .dma_in_enabled = 0 -#endif - -}, /* ttyS0 */ -#ifndef CONFIG_SVINTO_SIM - { .baud = DEF_BAUD, - .ioport = (unsigned char *)R_SERIAL1_CTRL, - .irq = 1U << 16, /* uses DMA 8 and 9 */ - .oclrintradr = R_DMA_CH8_CLR_INTR, - .ofirstadr = R_DMA_CH8_FIRST, - .ocmdadr = R_DMA_CH8_CMD, - .ostatusadr = R_DMA_CH8_STATUS, - .iclrintradr = R_DMA_CH9_CLR_INTR, - .ifirstadr = R_DMA_CH9_FIRST, - .icmdadr = R_DMA_CH9_CMD, - .idescradr = R_DMA_CH9_DESCR, - .flags = STD_FLAGS, - .rx_ctrl = DEF_RX, - .tx_ctrl = DEF_TX, - .iseteop = 3, - .dma_owner = dma_ser1, - .io_if = if_serial_1, -#ifdef CONFIG_ETRAX_SERIAL_PORT1 - .enabled = 1, - .io_if_description = "ser1", -#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT - .dma_out_enabled = 1, - .dma_out_nbr = SER1_TX_DMA_NBR, - .dma_out_irq_nbr = SER1_DMA_TX_IRQ_NBR, - .dma_out_irq_flags = IRQF_DISABLED, - .dma_out_irq_description = "serial 1 dma tr", -#else - .dma_out_enabled = 0, - .dma_out_nbr = UINT_MAX, - .dma_out_irq_nbr = 0, - .dma_out_irq_flags = 0, - .dma_out_irq_description = NULL, -#endif -#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN - .dma_in_enabled = 1, - .dma_in_nbr = SER1_RX_DMA_NBR, - .dma_in_irq_nbr = SER1_DMA_RX_IRQ_NBR, - .dma_in_irq_flags = IRQF_DISABLED, - .dma_in_irq_description = "serial 1 dma rec", -#else - .dma_in_enabled = 0, - .dma_in_enabled = 0, - .dma_in_nbr = UINT_MAX, - .dma_in_irq_nbr = 0, - .dma_in_irq_flags = 0, - .dma_in_irq_description = NULL, -#endif -#else - .enabled = 0, - .io_if_description = NULL, - .dma_in_irq_nbr = 0, - .dma_out_enabled = 0, - .dma_in_enabled = 0 -#endif -}, /* ttyS1 */ - - { .baud = DEF_BAUD, - .ioport = (unsigned char *)R_SERIAL2_CTRL, - .irq = 1U << 4, /* uses DMA 2 and 3 */ - .oclrintradr = R_DMA_CH2_CLR_INTR, - .ofirstadr = R_DMA_CH2_FIRST, - .ocmdadr = R_DMA_CH2_CMD, - .ostatusadr = R_DMA_CH2_STATUS, - .iclrintradr = R_DMA_CH3_CLR_INTR, - .ifirstadr = R_DMA_CH3_FIRST, - .icmdadr = R_DMA_CH3_CMD, - .idescradr = R_DMA_CH3_DESCR, - .flags = STD_FLAGS, - .rx_ctrl = DEF_RX, - .tx_ctrl = DEF_TX, - .iseteop = 0, - .dma_owner = dma_ser2, - .io_if = if_serial_2, -#ifdef CONFIG_ETRAX_SERIAL_PORT2 - .enabled = 1, - .io_if_description = "ser2", -#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT - .dma_out_enabled = 1, - .dma_out_nbr = SER2_TX_DMA_NBR, - .dma_out_irq_nbr = SER2_DMA_TX_IRQ_NBR, - .dma_out_irq_flags = IRQF_DISABLED, - .dma_out_irq_description = "serial 2 dma tr", -#else - .dma_out_enabled = 0, - .dma_out_nbr = UINT_MAX, - .dma_out_irq_nbr = 0, - .dma_out_irq_flags = 0, - .dma_out_irq_description = NULL, -#endif -#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN - .dma_in_enabled = 1, - .dma_in_nbr = SER2_RX_DMA_NBR, - .dma_in_irq_nbr = SER2_DMA_RX_IRQ_NBR, - .dma_in_irq_flags = IRQF_DISABLED, - .dma_in_irq_description = "serial 2 dma rec", -#else - .dma_in_enabled = 0, - .dma_in_nbr = UINT_MAX, - .dma_in_irq_nbr = 0, - .dma_in_irq_flags = 0, - .dma_in_irq_description = NULL, -#endif -#else - .enabled = 0, - .io_if_description = NULL, - .dma_out_enabled = 0, - .dma_in_enabled = 0 -#endif - }, /* ttyS2 */ - - { .baud = DEF_BAUD, - .ioport = (unsigned char *)R_SERIAL3_CTRL, - .irq = 1U << 8, /* uses DMA 4 and 5 */ - .oclrintradr = R_DMA_CH4_CLR_INTR, - .ofirstadr = R_DMA_CH4_FIRST, - .ocmdadr = R_DMA_CH4_CMD, - .ostatusadr = R_DMA_CH4_STATUS, - .iclrintradr = R_DMA_CH5_CLR_INTR, - .ifirstadr = R_DMA_CH5_FIRST, - .icmdadr = R_DMA_CH5_CMD, - .idescradr = R_DMA_CH5_DESCR, - .flags = STD_FLAGS, - .rx_ctrl = DEF_RX, - .tx_ctrl = DEF_TX, - .iseteop = 1, - .dma_owner = dma_ser3, - .io_if = if_serial_3, -#ifdef CONFIG_ETRAX_SERIAL_PORT3 - .enabled = 1, - .io_if_description = "ser3", -#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT - .dma_out_enabled = 1, - .dma_out_nbr = SER3_TX_DMA_NBR, - .dma_out_irq_nbr = SER3_DMA_TX_IRQ_NBR, - .dma_out_irq_flags = IRQF_DISABLED, - .dma_out_irq_description = "serial 3 dma tr", -#else - .dma_out_enabled = 0, - .dma_out_nbr = UINT_MAX, - .dma_out_irq_nbr = 0, - .dma_out_irq_flags = 0, - .dma_out_irq_description = NULL, -#endif -#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN - .dma_in_enabled = 1, - .dma_in_nbr = SER3_RX_DMA_NBR, - .dma_in_irq_nbr = SER3_DMA_RX_IRQ_NBR, - .dma_in_irq_flags = IRQF_DISABLED, - .dma_in_irq_description = "serial 3 dma rec", -#else - .dma_in_enabled = 0, - .dma_in_nbr = UINT_MAX, - .dma_in_irq_nbr = 0, - .dma_in_irq_flags = 0, - .dma_in_irq_description = NULL -#endif -#else - .enabled = 0, - .io_if_description = NULL, - .dma_out_enabled = 0, - .dma_in_enabled = 0 -#endif - } /* ttyS3 */ -#endif -}; - - -#define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial)) - -#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER -static struct fast_timer fast_timers[NR_PORTS]; -#endif - -#ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY -#define PROCSTAT(x) x -struct ser_statistics_type { - int overrun_cnt; - int early_errors_cnt; - int ser_ints_ok_cnt; - int errors_cnt; - unsigned long int processing_flip; - unsigned long processing_flip_still_room; - unsigned long int timeout_flush_cnt; - int rx_dma_ints; - int tx_dma_ints; - int rx_tot; - int tx_tot; -}; - -static struct ser_statistics_type ser_stat[NR_PORTS]; - -#else - -#define PROCSTAT(x) - -#endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */ - -/* RS-485 */ -#if defined(CONFIG_ETRAX_RS485) -#ifdef CONFIG_ETRAX_FAST_TIMER -static struct fast_timer fast_timers_rs485[NR_PORTS]; -#endif -#if defined(CONFIG_ETRAX_RS485_ON_PA) -static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT; -#endif -#if defined(CONFIG_ETRAX_RS485_ON_PORT_G) -static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT; -#endif -#endif - -/* Info and macros needed for each ports extra control/status signals. */ -#define E100_STRUCT_PORT(line, pinname) \ - ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \ - (R_PORT_PA_DATA): ( \ - (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \ - (R_PORT_PB_DATA):&dummy_ser[line])) - -#define E100_STRUCT_SHADOW(line, pinname) \ - ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \ - (&port_pa_data_shadow): ( \ - (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \ - (&port_pb_data_shadow):&dummy_ser[line])) -#define E100_STRUCT_MASK(line, pinname) \ - ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \ - (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \ - (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \ - (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK)) - -#define DUMMY_DTR_MASK 1 -#define DUMMY_RI_MASK 2 -#define DUMMY_DSR_MASK 4 -#define DUMMY_CD_MASK 8 -static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF}; - -/* If not all status pins are used or disabled, use mixed mode */ -#ifdef CONFIG_ETRAX_SERIAL_PORT0 - -#define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT) - -#if SER0_PA_BITSUM != -4 -# if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT) - -#if SER0_PB_BITSUM != -4 -# if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#endif /* PORT0 */ - - -#ifdef CONFIG_ETRAX_SERIAL_PORT1 - -#define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT) - -#if SER1_PA_BITSUM != -4 -# if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT) - -#if SER1_PB_BITSUM != -4 -# if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#endif /* PORT1 */ - -#ifdef CONFIG_ETRAX_SERIAL_PORT2 - -#define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT) - -#if SER2_PA_BITSUM != -4 -# if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT) - -#if SER2_PB_BITSUM != -4 -# if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#endif /* PORT2 */ - -#ifdef CONFIG_ETRAX_SERIAL_PORT3 - -#define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT) - -#if SER3_PA_BITSUM != -4 -# if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT) - -#if SER3_PB_BITSUM != -4 -# if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -# if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1 -# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED -# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1 -# endif -# endif -#endif - -#endif /* PORT3 */ - - -#if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \ - defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \ - defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \ - defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED) -#define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED -#endif - -#ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED -/* The pins can be mixed on PA and PB */ -#define CONTROL_PINS_PORT_NOT_USED(line) \ - &dummy_ser[line], &dummy_ser[line], \ - &dummy_ser[line], &dummy_ser[line], \ - &dummy_ser[line], &dummy_ser[line], \ - &dummy_ser[line], &dummy_ser[line], \ - DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK - - -struct control_pins -{ - volatile unsigned char *dtr_port; - unsigned char *dtr_shadow; - volatile unsigned char *ri_port; - unsigned char *ri_shadow; - volatile unsigned char *dsr_port; - unsigned char *dsr_shadow; - volatile unsigned char *cd_port; - unsigned char *cd_shadow; - - unsigned char dtr_mask; - unsigned char ri_mask; - unsigned char dsr_mask; - unsigned char cd_mask; -}; - -static const struct control_pins e100_modem_pins[NR_PORTS] = -{ - /* Ser 0 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT0 - E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR), - E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI), - E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR), - E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD), - E100_STRUCT_MASK(0,DTR), - E100_STRUCT_MASK(0,RI), - E100_STRUCT_MASK(0,DSR), - E100_STRUCT_MASK(0,CD) -#else - CONTROL_PINS_PORT_NOT_USED(0) -#endif - }, - - /* Ser 1 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT1 - E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR), - E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI), - E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR), - E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD), - E100_STRUCT_MASK(1,DTR), - E100_STRUCT_MASK(1,RI), - E100_STRUCT_MASK(1,DSR), - E100_STRUCT_MASK(1,CD) -#else - CONTROL_PINS_PORT_NOT_USED(1) -#endif - }, - - /* Ser 2 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT2 - E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR), - E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI), - E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR), - E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD), - E100_STRUCT_MASK(2,DTR), - E100_STRUCT_MASK(2,RI), - E100_STRUCT_MASK(2,DSR), - E100_STRUCT_MASK(2,CD) -#else - CONTROL_PINS_PORT_NOT_USED(2) -#endif - }, - - /* Ser 3 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT3 - E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR), - E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI), - E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR), - E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD), - E100_STRUCT_MASK(3,DTR), - E100_STRUCT_MASK(3,RI), - E100_STRUCT_MASK(3,DSR), - E100_STRUCT_MASK(3,CD) -#else - CONTROL_PINS_PORT_NOT_USED(3) -#endif - } -}; -#else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */ - -/* All pins are on either PA or PB for each serial port */ -#define CONTROL_PINS_PORT_NOT_USED(line) \ - &dummy_ser[line], &dummy_ser[line], \ - DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK - - -struct control_pins -{ - volatile unsigned char *port; - unsigned char *shadow; - - unsigned char dtr_mask; - unsigned char ri_mask; - unsigned char dsr_mask; - unsigned char cd_mask; -}; - -#define dtr_port port -#define dtr_shadow shadow -#define ri_port port -#define ri_shadow shadow -#define dsr_port port -#define dsr_shadow shadow -#define cd_port port -#define cd_shadow shadow - -static const struct control_pins e100_modem_pins[NR_PORTS] = -{ - /* Ser 0 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT0 - E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR), - E100_STRUCT_MASK(0,DTR), - E100_STRUCT_MASK(0,RI), - E100_STRUCT_MASK(0,DSR), - E100_STRUCT_MASK(0,CD) -#else - CONTROL_PINS_PORT_NOT_USED(0) -#endif - }, - - /* Ser 1 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT1 - E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR), - E100_STRUCT_MASK(1,DTR), - E100_STRUCT_MASK(1,RI), - E100_STRUCT_MASK(1,DSR), - E100_STRUCT_MASK(1,CD) -#else - CONTROL_PINS_PORT_NOT_USED(1) -#endif - }, - - /* Ser 2 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT2 - E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR), - E100_STRUCT_MASK(2,DTR), - E100_STRUCT_MASK(2,RI), - E100_STRUCT_MASK(2,DSR), - E100_STRUCT_MASK(2,CD) -#else - CONTROL_PINS_PORT_NOT_USED(2) -#endif - }, - - /* Ser 3 */ - { -#ifdef CONFIG_ETRAX_SERIAL_PORT3 - E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR), - E100_STRUCT_MASK(3,DTR), - E100_STRUCT_MASK(3,RI), - E100_STRUCT_MASK(3,DSR), - E100_STRUCT_MASK(3,CD) -#else - CONTROL_PINS_PORT_NOT_USED(3) -#endif - } -}; -#endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */ - -#define E100_RTS_MASK 0x20 -#define E100_CTS_MASK 0x40 - -/* All serial port signals are active low: - * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level - * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level - * - * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip - */ - -/* Output */ -#define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK) -/* Input */ -#define E100_CTS_GET(info) ((info)->ioport[REG_STATUS] & E100_CTS_MASK) - -/* These are typically PA or PB and 0 means 0V, 1 means 3.3V */ -/* Is an output */ -#define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask) - -/* Normally inputs */ -#define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask) -#define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask) - -/* Input */ -#define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask) - - -/* - * tmp_buf is used as a temporary buffer by serial_write. We need to - * lock it in case the memcpy_fromfs blocks while swapping in a page, - * and some other program tries to do a serial write at the same time. - * Since the lock will only come under contention when the system is - * swapping and available memory is low, it makes sense to share one - * buffer across all the serial ports, since it significantly saves - * memory if large numbers of serial ports are open. - */ -static unsigned char *tmp_buf; -static DEFINE_MUTEX(tmp_buf_mutex); - -/* Calculate the chartime depending on baudrate, numbor of bits etc. */ -static void update_char_time(struct e100_serial * info) -{ - tcflag_t cflags = info->port.tty->termios->c_cflag; - int bits; - - /* calc. number of bits / data byte */ - /* databits + startbit and 1 stopbit */ - if ((cflags & CSIZE) == CS7) - bits = 9; - else - bits = 10; - - if (cflags & CSTOPB) /* 2 stopbits ? */ - bits++; - - if (cflags & PARENB) /* parity bit ? */ - bits++; - - /* calc timeout */ - info->char_time_usec = ((bits * 1000000) / info->baud) + 1; - info->flush_time_usec = 4*info->char_time_usec; - if (info->flush_time_usec < MIN_FLUSH_TIME_USEC) - info->flush_time_usec = MIN_FLUSH_TIME_USEC; - -} - -/* - * This function maps from the Bxxxx defines in asm/termbits.h into real - * baud rates. - */ - -static int -cflag_to_baud(unsigned int cflag) -{ - static int baud_table[] = { - 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, - 4800, 9600, 19200, 38400 }; - - static int ext_baud_table[] = { - 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000, - 0, 0, 0, 0, 0, 0, 0, 0 }; - - if (cflag & CBAUDEX) - return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX]; - else - return baud_table[cflag & CBAUD]; -} - -/* and this maps to an etrax100 hardware baud constant */ - -static unsigned char -cflag_to_etrax_baud(unsigned int cflag) -{ - char retval; - - static char baud_table[] = { - -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 }; - - static char ext_baud_table[] = { - -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 }; - - if (cflag & CBAUDEX) - retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX]; - else - retval = baud_table[cflag & CBAUD]; - - if (retval < 0) { - printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag); - retval = 5; /* choose default 9600 instead */ - } - - return retval | (retval << 4); /* choose same for both TX and RX */ -} - - -/* Various static support functions */ - -/* Functions to set or clear DTR/RTS on the requested line */ -/* It is complicated by the fact that RTS is a serial port register, while - * DTR might not be implemented in the HW at all, and if it is, it can be on - * any general port. - */ - - -static inline void -e100_dtr(struct e100_serial *info, int set) -{ -#ifndef CONFIG_SVINTO_SIM - unsigned char mask = e100_modem_pins[info->line].dtr_mask; - -#ifdef SERIAL_DEBUG_IO - printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask); - printk("ser%i shadow before 0x%02X get: %i\n", - info->line, *e100_modem_pins[info->line].dtr_shadow, - E100_DTR_GET(info)); -#endif - /* DTR is active low */ - { - unsigned long flags; - - local_irq_save(flags); - *e100_modem_pins[info->line].dtr_shadow &= ~mask; - *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask); - *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow; - local_irq_restore(flags); - } - -#ifdef SERIAL_DEBUG_IO - printk("ser%i shadow after 0x%02X get: %i\n", - info->line, *e100_modem_pins[info->line].dtr_shadow, - E100_DTR_GET(info)); -#endif -#endif -} - -/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive - * 0=0V , 1=3.3V - */ -static inline void -e100_rts(struct e100_serial *info, int set) -{ -#ifndef CONFIG_SVINTO_SIM - unsigned long flags; - local_irq_save(flags); - info->rx_ctrl &= ~E100_RTS_MASK; - info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */ - info->ioport[REG_REC_CTRL] = info->rx_ctrl; - local_irq_restore(flags); -#ifdef SERIAL_DEBUG_IO - printk("ser%i rts %i\n", info->line, set); -#endif -#endif -} - - -/* If this behaves as a modem, RI and CD is an output */ -static inline void -e100_ri_out(struct e100_serial *info, int set) -{ -#ifndef CONFIG_SVINTO_SIM - /* RI is active low */ - { - unsigned char mask = e100_modem_pins[info->line].ri_mask; - unsigned long flags; - - local_irq_save(flags); - *e100_modem_pins[info->line].ri_shadow &= ~mask; - *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask); - *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow; - local_irq_restore(flags); - } -#endif -} -static inline void -e100_cd_out(struct e100_serial *info, int set) -{ -#ifndef CONFIG_SVINTO_SIM - /* CD is active low */ - { - unsigned char mask = e100_modem_pins[info->line].cd_mask; - unsigned long flags; - - local_irq_save(flags); - *e100_modem_pins[info->line].cd_shadow &= ~mask; - *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask); - *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow; - local_irq_restore(flags) |