diff options
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-4965.c')
| -rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-4965.c | 1551 |
1 files changed, 895 insertions, 656 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index 891f90d2f01..04db34ba814 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c @@ -36,13 +36,13 @@ #include <linux/wireless.h> #include <net/mac80211.h> #include <linux/etherdevice.h> +#include <asm/unaligned.h> -#define IWL 4965 - -#include "iwlwifi.h" #include "iwl-4965.h" #include "iwl-helpers.h" +static void iwl4965_hw_card_show_info(struct iwl4965_priv *priv); + #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \ [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ IWL_RATE_SISO_##s##M_PLCP, \ @@ -63,7 +63,7 @@ * maps to IWL_RATE_INVALID * */ -const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = { +const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = { IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */ IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */ IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */ @@ -85,16 +85,16 @@ static int is_fat_channel(__le32 rxon_flags) (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK); } -static u8 is_single_stream(struct iwl_priv *priv) +static u8 is_single_stream(struct iwl4965_priv *priv) { -#ifdef CONFIG_IWLWIFI_HT - if (!priv->is_ht_enabled || !priv->current_assoc_ht.is_ht || - (priv->active_rate_ht[1] == 0) || +#ifdef CONFIG_IWL4965_HT + if (!priv->current_ht_config.is_ht || + (priv->current_ht_config.supp_mcs_set[1] == 0) || (priv->ps_mode == IWL_MIMO_PS_STATIC)) return 1; #else return 1; -#endif /*CONFIG_IWLWIFI_HT */ +#endif /*CONFIG_IWL4965_HT */ return 0; } @@ -104,7 +104,7 @@ static u8 is_single_stream(struct iwl_priv *priv) * MIMO (dual stream) requires at least 2, but works better with 3. * This does not determine *which* chains to use, just how many. */ -static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv, +static int iwl4965_get_rx_chain_counter(struct iwl4965_priv *priv, u8 *idle_state, u8 *rx_state) { u8 is_single = is_single_stream(priv); @@ -133,32 +133,32 @@ static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv, return 0; } -int iwl_hw_rxq_stop(struct iwl_priv *priv) +int iwl4965_hw_rxq_stop(struct iwl4965_priv *priv) { int rc; unsigned long flags; spin_lock_irqsave(&priv->lock, flags); - rc = iwl_grab_restricted_access(priv); + rc = iwl4965_grab_nic_access(priv); if (rc) { spin_unlock_irqrestore(&priv->lock, flags); return rc; } - /* stop HW */ - iwl_write_restricted(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); - rc = iwl_poll_restricted_bit(priv, FH_MEM_RSSR_RX_STATUS_REG, + /* stop Rx DMA */ + iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); + rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG, (1 << 24), 1000); if (rc < 0) IWL_ERROR("Can't stop Rx DMA.\n"); - iwl_release_restricted_access(priv); + iwl4965_release_nic_access(priv); spin_unlock_irqrestore(&priv->lock, flags); return 0; } -u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr) +u8 iwl4965_hw_find_station(struct iwl4965_priv *priv, const u8 *addr) { int i; int start = 0; @@ -190,104 +190,114 @@ u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr) return ret; } -static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max) +static int iwl4965_nic_set_pwr_src(struct iwl4965_priv *priv, int pwr_max) { - int rc = 0; + int ret; unsigned long flags; spin_lock_irqsave(&priv->lock, flags); - rc = iwl_grab_restricted_access(priv); - if (rc) { + ret = iwl4965_grab_nic_access(priv); + if (ret) { spin_unlock_irqrestore(&priv->lock, flags); - return rc; + return ret; } if (!pwr_max) { u32 val; - rc = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, + ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, &val); if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) - iwl_set_bits_mask_restricted_reg( - priv, APMG_PS_CTRL_REG, + iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_PWR_SRC_VAUX, ~APMG_PS_CTRL_MSK_PWR_SRC); } else - iwl_set_bits_mask_restricted_reg( - priv, APMG_PS_CTRL_REG, + iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, ~APMG_PS_CTRL_MSK_PWR_SRC); - iwl_release_restricted_access(priv); + iwl4965_release_nic_access(priv); spin_unlock_irqrestore(&priv->lock, flags); - return rc; + return ret; } -static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq) +static int iwl4965_rx_init(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq) { int rc; unsigned long flags; + unsigned int rb_size; spin_lock_irqsave(&priv->lock, flags); - rc = iwl_grab_restricted_access(priv); + rc = iwl4965_grab_nic_access(priv); if (rc) { spin_unlock_irqrestore(&priv->lock, flags); return rc; } - /* stop HW */ - iwl_write_restricted(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); + if (iwl4965_param_amsdu_size_8K) + rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K; + else + rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K; + + /* Stop Rx DMA */ + iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); + + /* Reset driver's Rx queue write index */ + iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); - iwl_write_restricted(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); - iwl_write_restricted(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG, + /* Tell device where to find RBD circular buffer in DRAM */ + iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG, rxq->dma_addr >> 8); - iwl_write_restricted(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG, + /* Tell device where in DRAM to update its Rx status */ + iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG, (priv->hw_setting.shared_phys + - offsetof(struct iwl_shared, val0)) >> 4); + offsetof(struct iwl4965_shared, val0)) >> 4); - iwl_write_restricted(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, + /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */ + iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | - IWL_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K | + rb_size | /*0x10 << 4 | */ (RX_QUEUE_SIZE_LOG << FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT)); /* - * iwl_write32(priv,CSR_INT_COAL_REG,0); + * iwl4965_write32(priv,CSR_INT_COAL_REG,0); */ - iwl_release_restricted_access(priv); + iwl4965_release_nic_access(priv); spin_unlock_irqrestore(&priv->lock, flags); return 0; } -static int iwl4965_kw_init(struct iwl_priv *priv) +/* Tell 4965 where to find the "keep warm" buffer */ +static int iwl4965_kw_init(struct iwl4965_priv *priv) { unsigned long flags; int rc; spin_lock_irqsave(&priv->lock, flags); - rc = iwl_grab_restricted_access(priv); + rc = iwl4965_grab_nic_access(priv); if (rc) goto out; - iwl_write_restricted(priv, IWL_FH_KW_MEM_ADDR_REG, + iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG, priv->kw.dma_addr >> 4); - iwl_release_restricted_access(priv); + iwl4965_release_nic_access(priv); out: spin_unlock_irqrestore(&priv->lock, flags); return rc; } -static int iwl4965_kw_alloc(struct iwl_priv *priv) +static int iwl4965_kw_alloc(struct iwl4965_priv *priv) { struct pci_dev *dev = priv->pci_dev; - struct iwl_kw *kw = &priv->kw; + struct iwl4965_kw *kw = &priv->kw; kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */ kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr); @@ -300,14 +310,19 @@ static int iwl4965_kw_alloc(struct iwl_priv *priv) #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \ ? # x " " : "") -int iwl4965_set_fat_chan_info(struct iwl_priv *priv, int phymode, u16 channel, - const struct iwl_eeprom_channel *eeprom_ch, +/** + * iwl4965_set_fat_chan_info - Copy fat channel info into driver's priv. + * + * Does not set up a command, or touch hardware. + */ +int iwl4965_set_fat_chan_info(struct iwl4965_priv *priv, int phymode, u16 channel, + const struct iwl4965_eeprom_channel *eeprom_ch, u8 fat_extension_channel) { - struct iwl_channel_info *ch_info; + struct iwl4965_channel_info *ch_info; - ch_info = (struct iwl_channel_info *) - iwl_get_channel_info(priv, phymode, channel); + ch_info = (struct iwl4965_channel_info *) + iwl4965_get_channel_info(priv, phymode, channel); if (!is_channel_valid(ch_info)) return -1; @@ -340,10 +355,13 @@ int iwl4965_set_fat_chan_info(struct iwl_priv *priv, int phymode, u16 channel, return 0; } -static void iwl4965_kw_free(struct iwl_priv *priv) +/** + * iwl4965_kw_free - Free the "keep warm" buffer + */ +static void iwl4965_kw_free(struct iwl4965_priv *priv) { struct pci_dev *dev = priv->pci_dev; - struct iwl_kw *kw = &priv->kw; + struct iwl4965_kw *kw = &priv->kw; if (kw->v_addr) { pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr); @@ -358,7 +376,7 @@ static void iwl4965_kw_free(struct iwl_priv *priv) * @param priv * @return error code */ -static int iwl4965_txq_ctx_reset(struct iwl_priv *priv) +static int iwl4965_txq_ctx_reset(struct iwl4965_priv *priv) { int rc = 0; int txq_id, slots_num; @@ -366,9 +384,10 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv) iwl4965_kw_free(priv); - iwl_hw_txq_ctx_free(priv); + /* Free all tx/cmd queues and keep-warm buffer */ + iwl4965_hw_txq_ctx_free(priv); - /* Tx CMD queue */ + /* Alloc keep-warm buffer */ rc = iwl4965_kw_alloc(priv); if (rc) { IWL_ERROR("Keep Warm allocation failed"); @@ -377,28 +396,31 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv) spin_lock_irqsave(&priv->lock, flags); - rc = iwl_grab_restricted_access(priv); + rc = iwl4965_grab_nic_access(priv); if (unlikely(rc)) { IWL_ERROR("TX reset failed"); spin_unlock_irqrestore(&priv->lock, flags); goto error_reset; } - iwl_write_restricted_reg(priv, SCD_TXFACT, 0); - iwl_release_restricted_access(priv); + /* Turn off all Tx DMA channels */ + iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0); + iwl4965_release_nic_access(priv); spin_unlock_irqrestore(&priv->lock, flags); + /* Tell 4965 where to find the keep-warm buffer */ rc = iwl4965_kw_init(priv); if (rc) { IWL_ERROR("kw_init failed\n"); goto error_reset; } - /* Tx queue(s) */ + /* Alloc and init all (default 16) Tx queues, + * including the command queue (#4) */ for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) { slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; - rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num, + rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num, txq_id); if (rc) { IWL_ERROR("Tx %d queue init failed\n", txq_id); @@ -409,32 +431,32 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv) return rc; error: - iwl_hw_txq_ctx_free(priv); + iwl4965_hw_txq_ctx_free(priv); error_reset: iwl4965_kw_free(priv); error_kw: return rc; } -int iwl_hw_nic_init(struct iwl_priv *priv) +int iwl4965_hw_nic_init(struct iwl4965_priv *priv) { int rc; unsigned long flags; - struct iwl_rx_queue *rxq = &priv->rxq; + struct iwl4965_rx_queue *rxq = &priv->rxq; u8 rev_id; u32 val; u8 val_link; - iwl_power_init_handle(priv); + iwl4965_power_init_handle(priv); /* nic_init */ spin_lock_irqsave(&priv->lock, flags); - iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, + iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS, CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); - iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); - rc = iwl_poll_bit(priv, CSR_GP_CNTRL, + iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); + rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); if (rc < 0) { @@ -443,26 +465,26 @@ int iwl_hw_nic_init(struct iwl_priv *priv) return rc; } - rc = iwl_grab_restricted_access(priv); + rc = iwl4965_grab_nic_access(priv); if (rc) { spin_unlock_irqrestore(&priv->lock, flags); return rc; } - iwl_read_restricted_reg(priv, APMG_CLK_CTRL_REG); + iwl4965_read_prph(priv, APMG_CLK_CTRL_REG); - iwl_write_restricted_reg(priv, APMG_CLK_CTRL_REG, + iwl4965_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); - iwl_read_restricted_reg(priv, APMG_CLK_CTRL_REG); + iwl4965_read_prph(priv, APMG_CLK_CTRL_REG); udelay(20); - iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG, + iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG, APMG_PCIDEV_STT_VAL_L1_ACT_DIS); - iwl_release_restricted_access(priv); - iwl_write32(priv, CSR_INT_COALESCING, 512 / 32); + iwl4965_release_nic_access(priv); + iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32); spin_unlock_irqrestore(&priv->lock, flags); /* Determine HW type */ @@ -484,11 +506,6 @@ int iwl_hw_nic_init(struct iwl_priv *priv) spin_unlock_irqrestore(&priv->lock, flags); - /* Read the EEPROM */ - rc = iwl_eeprom_init(priv); - if (rc) - return rc; - if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) { IWL_ERROR("Older EEPROM detected! Aborting.\n"); return -EINVAL; @@ -503,51 +520,53 @@ int iwl_hw_nic_init(struct iwl_priv *priv) /* set CSR_HW_CONFIG_REG for uCode use */ - iwl_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R | + iwl4965_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); - rc = iwl_grab_restricted_access(priv); + rc = iwl4965_grab_nic_access(priv); if (rc < 0) { spin_unlock_irqrestore(&priv->lock, flags); IWL_DEBUG_INFO("Failed to init the card\n"); return rc; } - iwl_read_restricted_reg(priv, APMG_PS_CTRL_REG); - iwl_set_bits_restricted_reg(priv, APMG_PS_CTRL_REG, + iwl4965_read_prph(priv, APMG_PS_CTRL_REG); + iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); udelay(5); - iwl_clear_bits_restricted_reg(priv, APMG_PS_CTRL_REG, + iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); - iwl_release_restricted_access(priv); + iwl4965_release_nic_access(priv); spin_unlock_irqrestore(&priv->lock, flags); - iwl_hw_card_show_info(priv); + iwl4965_hw_card_show_info(priv); /* end nic_init */ /* Allocate the RX queue, or reset if it is already allocated */ if (!rxq->bd) { - rc = iwl_rx_queue_alloc(priv); + rc = iwl4965_rx_queue_alloc(priv); if (rc) { IWL_ERROR("Unable to initialize Rx queue\n"); return -ENOMEM; } } else - iwl_rx_queue_reset(priv, rxq); + iwl4965_rx_queue_reset(priv, rxq); - iwl_rx_replenish(priv); + iwl4965_rx_replenish(priv); iwl4965_rx_init(priv, rxq); spin_lock_irqsave(&priv->lock, flags); rxq->need_update = 1; - iwl_rx_queue_update_write_ptr(priv, rxq); + iwl4965_rx_queue_update_write_ptr(priv, rxq); spin_unlock_irqrestore(&priv->lock, flags); + + /* Allocate and init all Tx and Command queues */ rc = iwl4965_txq_ctx_reset(priv); if (rc) return rc; @@ -563,7 +582,7 @@ int iwl_hw_nic_init(struct iwl_priv *priv) return 0; } -int iwl_hw_nic_stop_master(struct iwl_priv *priv) +int iwl4965_hw_nic_stop_master(struct iwl4965_priv *priv) { int rc = 0; u32 reg_val; @@ -572,16 +591,16 @@ int iwl_hw_nic_stop_master(struct iwl_priv *priv) spin_lock_irqsave(&priv->lock, flags); /* set stop master bit */ - iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); + iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); - reg_val = iwl_read32(priv, CSR_GP_CNTRL); + reg_val = iwl4965_read32(priv, CSR_GP_CNTRL); if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE == (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE)) IWL_DEBUG_INFO("Card in power save, master is already " "stopped\n"); else { - rc = iwl_poll_bit(priv, CSR_RESET, + rc = iwl4965_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED, CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); if (rc < 0) { @@ -596,65 +615,69 @@ int iwl_hw_nic_stop_master(struct iwl_priv *priv) return rc; } -void iwl_hw_txq_ctx_stop(struct iwl_priv *priv) +/** + * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory + */ +void iwl4965_hw_txq_ctx_stop(struct iwl4965_priv *priv) { int txq_id; unsigned long flags; - /* reset TFD queues */ + /* Stop each Tx DMA channel, and wait for it to be idle */ for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) { spin_lock_irqsave(&priv->lock, flags); - if (iwl_grab_restricted_access(priv)) { + if (iwl4965_grab_nic_access(priv)) { spin_unlock_irqrestore(&priv->lock, flags); continue; } - iwl_write_restricted(priv, + iwl4965_write_direct32(priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0); - iwl_poll_restricted_bit(priv, IWL_FH_TSSR_TX_STATUS_REG, + iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG, IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE (txq_id), 200); - iwl_release_restricted_access(priv); + iwl4965_release_nic_access(priv); spin_unlock_irqrestore(&priv->lock, flags); } - iwl_hw_txq_ctx_free(priv); + /* Deallocate memory for all Tx queues */ + iwl4965_hw_txq_ctx_free(priv); } -int iwl_hw_nic_reset(struct iwl_priv *priv) +int iwl4965_hw_nic_reset(struct iwl4965_priv *priv) { int rc = 0; unsigned long flags; - iwl_hw_nic_stop_master(priv); + iwl4965_hw_nic_stop_master(priv); spin_lock_irqsave(&priv->lock, flags); - iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); + iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); udelay(10); - iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); - rc = iwl_poll_bit(priv, CSR_RESET, + iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); + rc = iwl4965_poll_bit(priv, CSR_RESET, CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25); udelay(10); - rc = iwl_grab_restricted_access(priv); + rc = iwl4965_grab_nic_access(priv); if (!rc) { - iwl_write_restricted_reg(priv, APMG_CLK_EN_REG, + iwl4965_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); udelay(10); - iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG, + iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG, APMG_PCIDEV_STT_VAL_L1_ACT_DIS); - iwl_release_restricted_access(priv); + iwl4965_release_nic_access(priv); } clear_bit(STATUS_HCMD_ACTIVE, &priv->status); @@ -684,7 +707,7 @@ int iwl_hw_nic_reset(struct iwl_priv *priv) */ static void iwl4965_bg_statistics_periodic(unsigned long data) { - struct iwl_priv *priv = (struct iwl_priv *)data; + struct iwl4965_priv *priv = (struct iwl4965_priv *)data; queue_work(priv->workqueue, &priv->statistics_work); } @@ -692,27 +715,27 @@ static void iwl4965_bg_statistics_periodic(unsigned long data) /** * iwl4965_bg_statistics_work - Send the statistics request to the hardware. * - * This is queued by iwl_bg_statistics_periodic. + * This is queued by iwl4965_bg_statistics_periodic. */ static void iwl4965_bg_statistics_work(struct work_struct *work) { - struct iwl_priv *priv = container_of(work, struct iwl_priv, + struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, statistics_work); if (test_bit(STATUS_EXIT_PENDING, &priv->status)) return; mutex_lock(&priv->mutex); - iwl_send_statistics_request(priv); + iwl4965_send_statistics_request(priv); mutex_unlock(&priv->mutex); } #define CT_LIMIT_CONST 259 #define TM_CT_KILL_THRESHOLD 110 -void iwl4965_rf_kill_ct_config(struct iwl_priv *priv) +void iwl4965_rf_kill_ct_config(struct iwl4965_priv *priv) { - struct iwl_ct_kill_config cmd; + struct iwl4965_ct_kill_config cmd; u32 R1, R2, R3; u32 temp_th; u32 crit_temperature; @@ -720,7 +743,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv) int rc = 0; spin_lock_irqsave(&priv->lock, flags); - iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, + iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); spin_unlock_irqrestore(&priv->lock, flags); @@ -738,7 +761,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv) crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2; cmd.critical_temperature_R = cpu_to_le32(crit_temperature); - rc = iwl_send_cmd_pdu(priv, + rc = iwl4965_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd); if (rc) IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n"); @@ -746,7 +769,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv) IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n"); } -#ifdef CONFIG_IWLWIFI_SENSITIVITY +#ifdef CONFIG_IWL4965_SENSITIVITY /* "false alarms" are signals that our DSP tries to lock onto, * but then determines that they are either noise, or transmissions @@ -756,7 +779,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv) * enough to receive all of our own network traffic, but not so * high that our DSP gets too busy trying to lock onto non-network * activity/noise. */ -static int iwl4965_sens_energy_cck(struct iwl_priv *priv, +static int iwl4965_sens_energy_cck(struct iwl4965_priv *priv, u32 norm_fa, u32 rx_enable_time, struct statistics_general_data *rx_info) @@ -782,7 +805,7 @@ static int iwl4965_sens_energy_cck(struct iwl_priv *priv, u32 false_alarms = norm_fa * 200 * 1024; u32 max_false_alarms = MAX_FA_CCK * rx_enable_time; u32 min_false_alarms = MIN_FA_CCK * rx_enable_time; - struct iwl_sensitivity_data *data = NULL; + struct iwl4965_sensitivity_data *data = NULL; data = &(priv->sensitivity_data); @@ -792,11 +815,11 @@ static int iwl4965_sens_energy_cck(struct iwl_priv *priv, * This is background noise, which may include transmissions from other * networks, measured during silence before our network's beacon */ silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a & - ALL_BAND_FILTER)>>8); + ALL_BAND_FILTER) >> 8); silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b & - ALL_BAND_FILTER)>>8); + ALL_BAND_FILTER) >> 8); silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c & - ALL_BAND_FILTER)>>8); + ALL_BAND_FILTER) >> 8); val = max(silence_rssi_b, silence_rssi_c); max_silence_rssi = max(silence_rssi_a, (u8) val); @@ -947,7 +970,7 @@ static int iwl4965_sens_energy_cck(struct iwl_priv *priv, } -static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv, +static int iwl4965_sens_auto_corr_ofdm(struct iwl4965_priv *priv, u32 norm_fa, u32 rx_enable_time) { @@ -955,7 +978,7 @@ static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv, u32 false_alarms = norm_fa * 200 * 1024; u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time; u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time; - struct iwl_sensitivity_data *data = NULL; + struct iwl4965_sensitivity_data *data = NULL; data = &(priv->sensitivity_data); @@ -1012,22 +1035,22 @@ static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv, return 0; } -static int iwl_sensitivity_callback(struct iwl_priv *priv, - struct iwl_cmd *cmd, struct sk_buff *skb) +static int iwl4965_sensitivity_callback(struct iwl4965_priv *priv, + struct iwl4965_cmd *cmd, struct sk_buff *skb) { /* We didn't cache the SKB; let the caller free it */ return 1; } /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */ -static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags) +static int iwl4965_sensitivity_write(struct iwl4965_priv *priv, u8 flags) { int rc = 0; - struct iwl_sensitivity_cmd cmd ; - struct iwl_sensitivity_data *data = NULL; - struct iwl_host_cmd cmd_out = { + struct iwl4965_sensitivity_cmd cmd ; + struct iwl4965_sensitivity_data *data = NULL; + struct iwl4965_host_cmd cmd_out = { .id = SENSITIVITY_CMD, - .len = sizeof(struct iwl_sensitivity_cmd), + .len = sizeof(struct iwl4965_sensitivity_cmd), .meta.flags = flags, .data = &cmd, }; @@ -1071,10 +1094,11 @@ static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags) data->auto_corr_cck, data->auto_corr_cck_mrc, data->nrg_th_cck); + /* Update uCode's "work" table, and copy it to DSP */ cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE; if (flags & CMD_ASYNC) - cmd_out.meta.u.callback = iwl_sensitivity_callback; + cmd_out.meta.u.callback = iwl4965_sensitivity_callback; /* Don't send command to uCode if nothing has changed */ if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]), @@ -1087,7 +1111,7 @@ static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags) memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]), sizeof(u16)*HD_TABLE_SIZE); - rc = iwl_send_cmd(priv, &cmd_out); + rc = iwl4965_send_cmd(priv, &cmd_out); if (!rc) { IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n"); return rc; @@ -1096,11 +1120,11 @@ static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags) return 0; } -void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force) +void iwl4965_init_sensitivity(struct iwl4965_priv *priv, u8 flags, u8 force) { int rc = 0; int i; - struct iwl_sensitivity_data *data = NULL; + struct iwl4965_sensitivity_data *data = NULL; IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n"); @@ -1110,7 +1134,7 @@ void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force) /* Clear driver's sensitivity algo data */ data = &(priv->sensitivity_data); - memset(data, 0, sizeof(struct iwl_sensitivity_data)); + memset(data, 0, sizeof(struct iwl4965_sensitivity_data)); data->num_in_cck_no_fa = 0; data->nrg_curr_state = IWL_FA_TOO_MANY; @@ -1154,21 +1178,21 @@ void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force) /* Reset differential Rx gains in NIC to prepare for chain noise calibration. * Called after every association, but this runs only once! * ... once chain noise is calibrated the first time, it's good forever. */ -void iwl4965_chain_noise_reset(struct iwl_priv *priv) +void iwl4965_chain_noise_reset(struct iwl4965_priv *priv) { - struct iwl_chain_noise_data *data = NULL; + struct iwl4965_chain_noise_data *data = NULL; int rc = 0; data = &(priv->chain_noise_data); - if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) { - struct iwl_calibration_cmd cmd; + if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) { + struct iwl4965_calibration_cmd cmd; memset(&cmd, 0, sizeof(cmd)); cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD; cmd.diff_gain_a = 0; cmd.diff_gain_b = 0; cmd.diff_gain_c = 0; - rc = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, + rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, sizeof(cmd), &cmd); msleep(4); data->state = IWL_CHAIN_NOISE_ACCUMULATE; @@ -1183,10 +1207,10 @@ void iwl4965_chain_noise_reset(struct iwl_priv *priv) * 1) Which antennas are connected. * 2) Differential rx gain settings to balance the 3 receivers. */ -static void iwl4965_noise_calibration(struct iwl_priv *priv, - struct iwl_notif_statistics *stat_resp) +static void iwl4965_noise_calibration(struct iwl4965_priv *priv, + struct iwl4965_notif_statistics *stat_resp) { - struct iwl_chain_noise_data *data = NULL; + struct iwl4965_chain_noise_data *data = NULL; int rc = 0; u32 chain_noise_a; @@ -1385,7 +1409,7 @@ static void iwl4965_noise_calibration(struct iwl_priv *priv, /* Differential gain gets sent to uCode only once */ if (!data->radio_write) { - struct iwl_calibration_cmd cmd; + struct iwl4965_calibration_cmd cmd; data->radio_write = 1; memset(&cmd, 0, sizeof(cmd)); @@ -1393,7 +1417,7 @@ static void iwl4965_noise_calibration(struct iwl_priv *priv, cmd.diff_gain_a = data->delta_gain_code[0]; cmd.diff_gain_b = data->delta_gain_code[1]; cmd.diff_gain_c = data->delta_gain_code[2]; - rc = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, + rc = iwl4965_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, sizeof(cmd), &cmd); if (rc) IWL_DEBUG_CALIB("fail sending cmd " @@ -1416,8 +1440,8 @@ static void iwl4965_noise_calibration(struct iwl_priv *priv, return; } -static void iwl4965_sensitivity_calibration(struct iwl_priv *priv, - struct iwl_notif_statistics *resp) +static void iwl4965_sensitivity_calibration(struct iwl4965_priv *priv, + struct iwl4965_notif_statistics *resp) { int rc = 0; u32 rx_enable_time; @@ -1427,7 +1451,7 @@ static void iwl4965_sensitivity_calibration(struct iwl_priv *priv, u32 bad_plcp_ofdm; u32 norm_fa_ofdm; u32 norm_fa_cck; - struct iwl_sensitivity_data *data = NULL; + struct iwl4965_sensitivity_data *data = NULL; struct statistics_rx_non_phy *rx_info = &(resp->rx.general); struct statistics_rx *statistics = &(resp->rx); unsigned long flags; @@ -1435,7 +1459,7 @@ static void iwl4965_sensitivity_calibration(struct iwl_priv *priv, data = &(priv->sensitivity_data); - if (!iwl_is_associated(priv)) { + if (!iwl4965_is_associated(priv)) { IWL_DEBUG_CALIB("<< - not associated\n"); return; } @@ -1523,7 +1547,7 @@ static void iwl4965_sensitivity_calibration(struct iwl_priv *priv, static void iwl4965_bg_sensitivity_work(struct work_struct *work) { - struct iwl_priv *priv = container_of(work, struct iwl_priv, + struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, sensitivity_work); mutex_lock(&priv->mutex); @@ -1549,11 +1573,11 @@ static void iwl4965_bg_sensitivity_work(struct work_struct *work) mutex_unlock(&priv->mutex); return; } -#endif /*CONFIG_IWLWIFI_SENSITIVITY*/ +#endif /*CONFIG_IWL4965_SENSITIVITY*/ static void iwl4965_bg_txpower_work(struct work_struct *work) { - struct iwl_priv *priv = container_of(work, struct iwl_priv, + struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, txpower_work); /* If a scan happened to start before we got here @@ -1569,7 +1593,7 @@ static void iwl4965_bg_txpower_work(struct work_struct *work) /* Regardless of if we are assocaited, we must reconfigure the * TX power since frames can be sent on non-radar channels while * not associated */ - iwl_hw_reg_send_txpower(priv); + iwl4965_hw_reg_send_txpower(priv); /* Update last_temperature to keep is_calib_needed from running * when it isn't needed... */ @@ -1581,24 +1605,31 @@ static void iwl4965_bg_txpower_work(struct work_struct *work) /* * Acquire priv->lock before calling this function ! */ -static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index) +static void iwl4965_set_wr_ptrs(struct iwl4965_priv *priv, int txq_id, u32 index) { - iwl_write_restricted(priv, HBUS_TARG_WRPTR, + iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, (index & 0xff) | (txq_id << 8)); - iwl_write_restricted_reg(priv, SCD_QUEUE_RDPTR(txq_id), index); + iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index); } -/* - * Acquire priv->lock before calling this function ! +/** + * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue + * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed + * @scd_retry: (1) Indicates queue will be used in aggregation mode + * + * NOTE: Acquire priv->lock before calling this function ! */ -static void iwl4965_tx_queue_set_status(struct iwl_priv *priv, - struct iwl_tx_queue *txq, +static void iwl4965_tx_queue_set_status(struct iwl4965_priv *priv, + struct iwl4965_tx_queue *txq, int tx_fifo_id, int scd_retry) { int txq_id = txq->q.id; + + /* Find out whether to activate Tx queue */ int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0; - iwl_write_restricted_reg(priv, SCD_QUEUE_STATUS_BITS(txq_id), + /* Set up and activate */ + iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id), (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) | (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) | (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) | @@ -1608,7 +1639,7 @@ static void iwl4965_tx_queue_set_status(struct iwl_priv *priv, txq->sched_retry = scd_retry; IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n", - active ? "Activete" : "Deactivate", + active ? "Activate" : "Deactivate", scd_retry ? "BA" : "AC", txq_id, tx_fifo_id); } @@ -1622,17 +1653,17 @@ static const u16 default_queue_to_tx_fifo[] = { IWL_TX_FIFO_HCCA_2 }; -static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id) +static inline void iwl4965_txq_ctx_activate(struct iwl4965_priv *priv, int txq_id) { set_bit(txq_id, &priv->txq_ctx_active_msk); } -static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) +static inline void iwl4965_txq_ctx_deactivate(struct iwl4965_priv *priv, int txq_id) { clear_bit(txq_id, &priv->txq_ctx_active_msk); } -int iwl4965_alive_notify(struct iwl_priv *priv) +int iwl4965_alive_notify(struct iwl4965_priv *priv) { u32 a; int i = 0; @@ -1641,45 +1672,55 @@ int iwl4965_alive_notify(struct iwl_priv *priv) spin_lock_irqsave(&priv->lock, flags); -#ifdef CONFIG_IWLWIFI_SENSITIVITY +#ifdef CONFIG_IWL4965_SENSITIVITY memset(&(priv->sensitivity_data), 0, - sizeof(struct iwl_sensitivity_data)); + sizeof(struct iwl4965_sensitivity_data)); memset(&(priv->chain_noise_data), 0, - sizeof(struct iwl_chain_noise_data)); + sizeof(struct iwl4965_chain_noise_data)); for (i = 0; i < NUM_RX_CHAINS; i++) priv->chain_noise_data.delta_gain_code[i] = CHAIN_NOISE_DELTA_GAIN_INIT_VAL; -#endif /* CONFIG_IWLWIFI_SENSITIVITY*/ - rc = iwl_grab_restricted_access(priv); +#endif /* CONFIG_IWL4965_SENSITIVITY*/ + rc = iwl4965_grab_nic_access(priv); if (rc) { spin_unlock_irqrestore(&priv->lock, flags); return rc; } - priv->scd_base_addr = iwl_read_restricted_reg(priv, SCD_SRAM_BASE_ADDR); + /* Clear 4965's internal Tx Scheduler data base */ + priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR); a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET; for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4) - iwl_write_restricted_mem(priv, a, 0); + iwl4965_write_targ_mem(priv, a, 0); for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4) - iwl_write_restricted_mem(priv, a, 0); + iwl4965_write_targ_mem(priv, a, 0); for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4) - iwl_write_restricted_mem(priv, a, 0); + iwl4965_write_targ_mem(priv, a, 0); - iwl_write_restricted_reg(priv, SCD_DRAM_BASE_ADDR, + /* Tel 4965 where to find Tx byte count tables */ + iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR, (priv->hw_setting.shared_phys + - offsetof(struct iwl_shared, queues_byte_cnt_tbls)) >> 10); - iwl_write_restricted_reg(priv, SCD_QUEUECHAIN_SEL, 0); + offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10); - /* initiate the queues */ + /* Disable chain mode for all queues */ + iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0); + + /* Initialize each Tx queue (including the command queue) */ for (i = 0; i < priv->hw_setting.max_txq_num; i++) { - iwl_write_restricted_reg(priv, SCD_QUEUE_RDPTR(i), 0); - iwl_write_restricted(priv, HBUS_TARG_WR |