diff options
Diffstat (limited to 'drivers/net/sk98lin/skxmac2.c')
| -rw-r--r-- | drivers/net/sk98lin/skxmac2.c | 4160 |
1 files changed, 0 insertions, 4160 deletions
diff --git a/drivers/net/sk98lin/skxmac2.c b/drivers/net/sk98lin/skxmac2.c deleted file mode 100644 index b4e75022a65..00000000000 --- a/drivers/net/sk98lin/skxmac2.c +++ /dev/null @@ -1,4160 +0,0 @@ -/****************************************************************************** - * - * Name: skxmac2.c - * Project: Gigabit Ethernet Adapters, Common Modules - * Version: $Revision: 1.102 $ - * Date: $Date: 2003/10/02 16:53:58 $ - * Purpose: Contains functions to initialize the MACs and PHYs - * - ******************************************************************************/ - -/****************************************************************************** - * - * (C)Copyright 1998-2002 SysKonnect. - * (C)Copyright 2002-2003 Marvell. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * The information in this file is provided "AS IS" without warranty. - * - ******************************************************************************/ - -#include "h/skdrv1st.h" -#include "h/skdrv2nd.h" - -/* typedefs *******************************************************************/ - -/* BCOM PHY magic pattern list */ -typedef struct s_PhyHack { - int PhyReg; /* Phy register */ - SK_U16 PhyVal; /* Value to write */ -} BCOM_HACK; - -/* local variables ************************************************************/ - -#if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM)))) -static const char SysKonnectFileId[] = - "@(#) $Id: skxmac2.c,v 1.102 2003/10/02 16:53:58 rschmidt Exp $ (C) Marvell."; -#endif - -#ifdef GENESIS -static BCOM_HACK BcomRegA1Hack[] = { - { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 }, - { 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 }, - { 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 }, - { 0, 0 } -}; -static BCOM_HACK BcomRegC0Hack[] = { - { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 }, - { 0x15, 0x0A04 }, { 0x18, 0x0420 }, - { 0, 0 } -}; -#endif - -/* function prototypes ********************************************************/ -#ifdef GENESIS -static void SkXmInitPhyXmac(SK_AC*, SK_IOC, int, SK_BOOL); -static void SkXmInitPhyBcom(SK_AC*, SK_IOC, int, SK_BOOL); -static int SkXmAutoNegDoneXmac(SK_AC*, SK_IOC, int); -static int SkXmAutoNegDoneBcom(SK_AC*, SK_IOC, int); -#endif /* GENESIS */ -#ifdef YUKON -static void SkGmInitPhyMarv(SK_AC*, SK_IOC, int, SK_BOOL); -static int SkGmAutoNegDoneMarv(SK_AC*, SK_IOC, int); -#endif /* YUKON */ -#ifdef OTHER_PHY -static void SkXmInitPhyLone(SK_AC*, SK_IOC, int, SK_BOOL); -static void SkXmInitPhyNat (SK_AC*, SK_IOC, int, SK_BOOL); -static int SkXmAutoNegDoneLone(SK_AC*, SK_IOC, int); -static int SkXmAutoNegDoneNat (SK_AC*, SK_IOC, int); -#endif /* OTHER_PHY */ - - -#ifdef GENESIS -/****************************************************************************** - * - * SkXmPhyRead() - Read from XMAC PHY register - * - * Description: reads a 16-bit word from XMAC PHY or ext. PHY - * - * Returns: - * nothing - */ -void SkXmPhyRead( -SK_AC *pAC, /* Adapter Context */ -SK_IOC IoC, /* I/O Context */ -int Port, /* Port Index (MAC_1 + n) */ -int PhyReg, /* Register Address (Offset) */ -SK_U16 SK_FAR *pVal) /* Pointer to Value */ -{ - SK_U16 Mmu; - SK_GEPORT *pPrt; - - pPrt = &pAC->GIni.GP[Port]; - - /* write the PHY register's address */ - XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr); - - /* get the PHY register's value */ - XM_IN16(IoC, Port, XM_PHY_DATA, pVal); - - if (pPrt->PhyType != SK_PHY_XMAC) { - do { - XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu); - /* wait until 'Ready' is set */ - } while ((Mmu & XM_MMU_PHY_RDY) == 0); - - /* get the PHY register's value */ - XM_IN16(IoC, Port, XM_PHY_DATA, pVal); - } -} /* SkXmPhyRead */ - - -/****************************************************************************** - * - * SkXmPhyWrite() - Write to XMAC PHY register - * - * Description: writes a 16-bit word to XMAC PHY or ext. PHY - * - * Returns: - * nothing - */ -void SkXmPhyWrite( -SK_AC *pAC, /* Adapter Context */ -SK_IOC IoC, /* I/O Context */ -int Port, /* Port Index (MAC_1 + n) */ -int PhyReg, /* Register Address (Offset) */ -SK_U16 Val) /* Value */ -{ - SK_U16 Mmu; - SK_GEPORT *pPrt; - - pPrt = &pAC->GIni.GP[Port]; - - if (pPrt->PhyType != SK_PHY_XMAC) { - do { - XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu); - /* wait until 'Busy' is cleared */ - } while ((Mmu & XM_MMU_PHY_BUSY) != 0); - } - - /* write the PHY register's address */ - XM_OUT16(IoC, Port, XM_PHY_ADDR, PhyReg | pPrt->PhyAddr); - - /* write the PHY register's value */ - XM_OUT16(IoC, Port, XM_PHY_DATA, Val); - - if (pPrt->PhyType != SK_PHY_XMAC) { - do { - XM_IN16(IoC, Port, XM_MMU_CMD, &Mmu); - /* wait until 'Busy' is cleared */ - } while ((Mmu & XM_MMU_PHY_BUSY) != 0); - } -} /* SkXmPhyWrite */ -#endif /* GENESIS */ - - -#ifdef YUKON -/****************************************************************************** - * - * SkGmPhyRead() - Read from GPHY register - * - * Description: reads a 16-bit word from GPHY through MDIO - * - * Returns: - * nothing - */ -void SkGmPhyRead( -SK_AC *pAC, /* Adapter Context */ -SK_IOC IoC, /* I/O Context */ -int Port, /* Port Index (MAC_1 + n) */ -int PhyReg, /* Register Address (Offset) */ -SK_U16 SK_FAR *pVal) /* Pointer to Value */ -{ - SK_U16 Ctrl; - SK_GEPORT *pPrt; -#ifdef VCPU - u_long SimCyle; - u_long SimLowTime; - - VCPUgetTime(&SimCyle, &SimLowTime); - VCPUprintf(0, "SkGmPhyRead(%u), SimCyle=%u, SimLowTime=%u\n", - PhyReg, SimCyle, SimLowTime); -#endif /* VCPU */ - - pPrt = &pAC->GIni.GP[Port]; - - /* set PHY-Register offset and 'Read' OpCode (= 1) */ - *pVal = (SK_U16)(GM_SMI_CT_PHY_AD(pPrt->PhyAddr) | - GM_SMI_CT_REG_AD(PhyReg) | GM_SMI_CT_OP_RD); - - GM_OUT16(IoC, Port, GM_SMI_CTRL, *pVal); - - GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl); - - /* additional check for MDC/MDIO activity */ - if ((Ctrl & GM_SMI_CT_BUSY) == 0) { - *pVal = 0; - return; - } - - *pVal |= GM_SMI_CT_BUSY; - - do { -#ifdef VCPU - VCPUwaitTime(1000); -#endif /* VCPU */ - - GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl); - - /* wait until 'ReadValid' is set */ - } while (Ctrl == *pVal); - - /* get the PHY register's value */ - GM_IN16(IoC, Port, GM_SMI_DATA, pVal); - -#ifdef VCPU - VCPUgetTime(&SimCyle, &SimLowTime); - VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n", - SimCyle, SimLowTime); -#endif /* VCPU */ - -} /* SkGmPhyRead */ - - -/****************************************************************************** - * - * SkGmPhyWrite() - Write to GPHY register - * - * Description: writes a 16-bit word to GPHY through MDIO - * - * Returns: - * nothing - */ -void SkGmPhyWrite( -SK_AC *pAC, /* Adapter Context */ -SK_IOC IoC, /* I/O Context */ -int Port, /* Port Index (MAC_1 + n) */ -int PhyReg, /* Register Address (Offset) */ -SK_U16 Val) /* Value */ -{ - SK_U16 Ctrl; - SK_GEPORT *pPrt; -#ifdef VCPU - SK_U32 DWord; - u_long SimCyle; - u_long SimLowTime; - - VCPUgetTime(&SimCyle, &SimLowTime); - VCPUprintf(0, "SkGmPhyWrite(Reg=%u, Val=0x%04x), SimCyle=%u, SimLowTime=%u\n", - PhyReg, Val, SimCyle, SimLowTime); -#endif /* VCPU */ - - pPrt = &pAC->GIni.GP[Port]; - - /* write the PHY register's value */ - GM_OUT16(IoC, Port, GM_SMI_DATA, Val); - - /* set PHY-Register offset and 'Write' OpCode (= 0) */ - Val = GM_SMI_CT_PHY_AD(pPrt->PhyAddr) | GM_SMI_CT_REG_AD(PhyReg); - - GM_OUT16(IoC, Port, GM_SMI_CTRL, Val); - - GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl); - - /* additional check for MDC/MDIO activity */ - if ((Ctrl & GM_SMI_CT_BUSY) == 0) { - return; - } - - Val |= GM_SMI_CT_BUSY; - - do { -#ifdef VCPU - /* read Timer value */ - SK_IN32(IoC, B2_TI_VAL, &DWord); - - VCPUwaitTime(1000); -#endif /* VCPU */ - - GM_IN16(IoC, Port, GM_SMI_CTRL, &Ctrl); - - /* wait until 'Busy' is cleared */ - } while (Ctrl == Val); - -#ifdef VCPU - VCPUgetTime(&SimCyle, &SimLowTime); - VCPUprintf(0, "VCPUgetTime(), SimCyle=%u, SimLowTime=%u\n", - SimCyle, SimLowTime); -#endif /* VCPU */ - -} /* SkGmPhyWrite */ -#endif /* YUKON */ - - -#ifdef SK_DIAG -/****************************************************************************** - * - * SkGePhyRead() - Read from PHY register - * - * Description: calls a read PHY routine dep. on board type - * - * Returns: - * nothing - */ -void SkGePhyRead( -SK_AC *pAC, /* Adapter Context */ -SK_IOC IoC, /* I/O Context */ -int Port, /* Port Index (MAC_1 + n) */ -int PhyReg, /* Register Address (Offset) */ -SK_U16 *pVal) /* Pointer to Value */ -{ - void (*r_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 *pVal); - - if (pAC->GIni.GIGenesis) { - r_func = SkXmPhyRead; - } - else { - r_func = SkGmPhyRead; - } - - r_func(pAC, IoC, Port, PhyReg, pVal); -} /* SkGePhyRead */ - - -/****************************************************************************** - * - * SkGePhyWrite() - Write to PHY register - * - * Description: calls a write PHY routine dep. on board type - * - * Returns: - * nothing - */ -void SkGePhyWrite( -SK_AC *pAC, /* Adapter Context */ -SK_IOC IoC, /* I/O Context */ -int Port, /* Port Index (MAC_1 + n) */ -int PhyReg, /* Register Address (Offset) */ -SK_U16 Val) /* Value */ -{ - void (*w_func)(SK_AC *pAC, SK_IOC IoC, int Port, int Reg, SK_U16 Val); - - if (pAC->GIni.GIGenesis) { - w_func = SkXmPhyWrite; - } - else { - w_func = SkGmPhyWrite; - } - - w_func(pAC, IoC, Port, PhyReg, Val); -} /* SkGePhyWrite */ -#endif /* SK_DIAG */ - - -/****************************************************************************** - * - * SkMacPromiscMode() - Enable / Disable Promiscuous Mode - * - * Description: - * enables / disables promiscuous mode by setting Mode Register (XMAC) or - * Receive Control Register (GMAC) dep. on board type - * - * Returns: - * nothing - */ -void SkMacPromiscMode( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port, /* Port Index (MAC_1 + n) */ -SK_BOOL Enable) /* Enable / Disable */ -{ -#ifdef YUKON - SK_U16 RcReg; -#endif -#ifdef GENESIS - SK_U32 MdReg; -#endif - -#ifdef GENESIS - if (pAC->GIni.GIGenesis) { - - XM_IN32(IoC, Port, XM_MODE, &MdReg); - /* enable or disable promiscuous mode */ - if (Enable) { - MdReg |= XM_MD_ENA_PROM; - } - else { - MdReg &= ~XM_MD_ENA_PROM; - } - /* setup Mode Register */ - XM_OUT32(IoC, Port, XM_MODE, MdReg); - } -#endif /* GENESIS */ - -#ifdef YUKON - if (pAC->GIni.GIYukon) { - - GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg); - - /* enable or disable unicast and multicast filtering */ - if (Enable) { - RcReg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); - } - else { - RcReg |= (GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); - } - /* setup Receive Control Register */ - GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg); - } -#endif /* YUKON */ - -} /* SkMacPromiscMode*/ - - -/****************************************************************************** - * - * SkMacHashing() - Enable / Disable Hashing - * - * Description: - * enables / disables hashing by setting Mode Register (XMAC) or - * Receive Control Register (GMAC) dep. on board type - * - * Returns: - * nothing - */ -void SkMacHashing( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port, /* Port Index (MAC_1 + n) */ -SK_BOOL Enable) /* Enable / Disable */ -{ -#ifdef YUKON - SK_U16 RcReg; -#endif -#ifdef GENESIS - SK_U32 MdReg; -#endif - -#ifdef GENESIS - if (pAC->GIni.GIGenesis) { - - XM_IN32(IoC, Port, XM_MODE, &MdReg); - /* enable or disable hashing */ - if (Enable) { - MdReg |= XM_MD_ENA_HASH; - } - else { - MdReg &= ~XM_MD_ENA_HASH; - } - /* setup Mode Register */ - XM_OUT32(IoC, Port, XM_MODE, MdReg); - } -#endif /* GENESIS */ - -#ifdef YUKON - if (pAC->GIni.GIYukon) { - - GM_IN16(IoC, Port, GM_RX_CTRL, &RcReg); - - /* enable or disable multicast filtering */ - if (Enable) { - RcReg |= GM_RXCR_MCF_ENA; - } - else { - RcReg &= ~GM_RXCR_MCF_ENA; - } - /* setup Receive Control Register */ - GM_OUT16(IoC, Port, GM_RX_CTRL, RcReg); - } -#endif /* YUKON */ - -} /* SkMacHashing*/ - - -#ifdef SK_DIAG -/****************************************************************************** - * - * SkXmSetRxCmd() - Modify the value of the XMAC's Rx Command Register - * - * Description: - * The features - * - FCS stripping, SK_STRIP_FCS_ON/OFF - * - pad byte stripping, SK_STRIP_PAD_ON/OFF - * - don't set XMR_FS_ERR in status SK_LENERR_OK_ON/OFF - * for inrange length error frames - * - don't set XMR_FS_ERR in status SK_BIG_PK_OK_ON/OFF - * for frames > 1514 bytes - * - enable Rx of own packets SK_SELF_RX_ON/OFF - * - * for incoming packets may be enabled/disabled by this function. - * Additional modes may be added later. - * Multiple modes can be enabled/disabled at the same time. - * The new configuration is written to the Rx Command register immediately. - * - * Returns: - * nothing - */ -static void SkXmSetRxCmd( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port, /* Port Index (MAC_1 + n) */ -int Mode) /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF, - SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */ -{ - SK_U16 OldRxCmd; - SK_U16 RxCmd; - - XM_IN16(IoC, Port, XM_RX_CMD, &OldRxCmd); - - RxCmd = OldRxCmd; - - switch (Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) { - case SK_STRIP_FCS_ON: - RxCmd |= XM_RX_STRIP_FCS; - break; - case SK_STRIP_FCS_OFF: - RxCmd &= ~XM_RX_STRIP_FCS; - break; - } - - switch (Mode & (SK_STRIP_PAD_ON | SK_STRIP_PAD_OFF)) { - case SK_STRIP_PAD_ON: - RxCmd |= XM_RX_STRIP_PAD; - break; - case SK_STRIP_PAD_OFF: - RxCmd &= ~XM_RX_STRIP_PAD; - break; - } - - switch (Mode & (SK_LENERR_OK_ON | SK_LENERR_OK_OFF)) { - case SK_LENERR_OK_ON: - RxCmd |= XM_RX_LENERR_OK; - break; - case SK_LENERR_OK_OFF: - RxCmd &= ~XM_RX_LENERR_OK; - break; - } - - switch (Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) { - case SK_BIG_PK_OK_ON: - RxCmd |= XM_RX_BIG_PK_OK; - break; - case SK_BIG_PK_OK_OFF: - RxCmd &= ~XM_RX_BIG_PK_OK; - break; - } - - switch (Mode & (SK_SELF_RX_ON | SK_SELF_RX_OFF)) { - case SK_SELF_RX_ON: - RxCmd |= XM_RX_SELF_RX; - break; - case SK_SELF_RX_OFF: - RxCmd &= ~XM_RX_SELF_RX; - break; - } - - /* Write the new mode to the Rx command register if required */ - if (OldRxCmd != RxCmd) { - XM_OUT16(IoC, Port, XM_RX_CMD, RxCmd); - } -} /* SkXmSetRxCmd */ - - -/****************************************************************************** - * - * SkGmSetRxCmd() - Modify the value of the GMAC's Rx Control Register - * - * Description: - * The features - * - FCS (CRC) stripping, SK_STRIP_FCS_ON/OFF - * - don't set GMR_FS_LONG_ERR SK_BIG_PK_OK_ON/OFF - * for frames > 1514 bytes - * - enable Rx of own packets SK_SELF_RX_ON/OFF - * - * for incoming packets may be enabled/disabled by this function. - * Additional modes may be added later. - * Multiple modes can be enabled/disabled at the same time. - * The new configuration is written to the Rx Command register immediately. - * - * Returns: - * nothing - */ -static void SkGmSetRxCmd( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port, /* Port Index (MAC_1 + n) */ -int Mode) /* Mode is SK_STRIP_FCS_ON/OFF, SK_STRIP_PAD_ON/OFF, - SK_LENERR_OK_ON/OFF, or SK_BIG_PK_OK_ON/OFF */ -{ - SK_U16 OldRxCmd; - SK_U16 RxCmd; - - if ((Mode & (SK_STRIP_FCS_ON | SK_STRIP_FCS_OFF)) != 0) { - - GM_IN16(IoC, Port, GM_RX_CTRL, &OldRxCmd); - - RxCmd = OldRxCmd; - - if ((Mode & SK_STRIP_FCS_ON) != 0) { - RxCmd |= GM_RXCR_CRC_DIS; - } - else { - RxCmd &= ~GM_RXCR_CRC_DIS; - } - /* Write the new mode to the Rx control register if required */ - if (OldRxCmd != RxCmd) { - GM_OUT16(IoC, Port, GM_RX_CTRL, RxCmd); - } - } - - if ((Mode & (SK_BIG_PK_OK_ON | SK_BIG_PK_OK_OFF)) != 0) { - - GM_IN16(IoC, Port, GM_SERIAL_MODE, &OldRxCmd); - - RxCmd = OldRxCmd; - - if ((Mode & SK_BIG_PK_OK_ON) != 0) { - RxCmd |= GM_SMOD_JUMBO_ENA; - } - else { - RxCmd &= ~GM_SMOD_JUMBO_ENA; - } - /* Write the new mode to the Rx control register if required */ - if (OldRxCmd != RxCmd) { - GM_OUT16(IoC, Port, GM_SERIAL_MODE, RxCmd); - } - } -} /* SkGmSetRxCmd */ - - -/****************************************************************************** - * - * SkMacSetRxCmd() - Modify the value of the MAC's Rx Control Register - * - * Description: modifies the MAC's Rx Control reg. dep. on board type - * - * Returns: - * nothing - */ -void SkMacSetRxCmd( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port, /* Port Index (MAC_1 + n) */ -int Mode) /* Rx Mode */ -{ - if (pAC->GIni.GIGenesis) { - - SkXmSetRxCmd(pAC, IoC, Port, Mode); - } - else { - - SkGmSetRxCmd(pAC, IoC, Port, Mode); - } - -} /* SkMacSetRxCmd */ - - -/****************************************************************************** - * - * SkMacCrcGener() - Enable / Disable CRC Generation - * - * Description: enables / disables CRC generation dep. on board type - * - * Returns: - * nothing - */ -void SkMacCrcGener( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port, /* Port Index (MAC_1 + n) */ -SK_BOOL Enable) /* Enable / Disable */ -{ - SK_U16 Word; - - if (pAC->GIni.GIGenesis) { - - XM_IN16(IoC, Port, XM_TX_CMD, &Word); - - if (Enable) { - Word &= ~XM_TX_NO_CRC; - } - else { - Word |= XM_TX_NO_CRC; - } - /* setup Tx Command Register */ - XM_OUT16(IoC, Port, XM_TX_CMD, Word); - } - else { - - GM_IN16(IoC, Port, GM_TX_CTRL, &Word); - - if (Enable) { - Word &= ~GM_TXCR_CRC_DIS; - } - else { - Word |= GM_TXCR_CRC_DIS; - } - /* setup Tx Control Register */ - GM_OUT16(IoC, Port, GM_TX_CTRL, Word); - } - -} /* SkMacCrcGener*/ - -#endif /* SK_DIAG */ - - -#ifdef GENESIS -/****************************************************************************** - * - * SkXmClrExactAddr() - Clear Exact Match Address Registers - * - * Description: - * All Exact Match Address registers of the XMAC 'Port' will be - * cleared starting with 'StartNum' up to (and including) the - * Exact Match address number of 'StopNum'. - * - * Returns: - * nothing - */ -void SkXmClrExactAddr( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port, /* Port Index (MAC_1 + n) */ -int StartNum, /* Begin with this Address Register Index (0..15) */ -int StopNum) /* Stop after finished with this Register Idx (0..15) */ -{ - int i; - SK_U16 ZeroAddr[3] = {0x0000, 0x0000, 0x0000}; - - if ((unsigned)StartNum > 15 || (unsigned)StopNum > 15 || - StartNum > StopNum) { - - SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E001, SKERR_HWI_E001MSG); - return; - } - - for (i = StartNum; i <= StopNum; i++) { - XM_OUTADDR(IoC, Port, XM_EXM(i), &ZeroAddr[0]); - } -} /* SkXmClrExactAddr */ -#endif /* GENESIS */ - - -/****************************************************************************** - * - * SkMacFlushTxFifo() - Flush the MAC's transmit FIFO - * - * Description: - * Flush the transmit FIFO of the MAC specified by the index 'Port' - * - * Returns: - * nothing - */ -void SkMacFlushTxFifo( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ -#ifdef GENESIS - SK_U32 MdReg; - - if (pAC->GIni.GIGenesis) { - - XM_IN32(IoC, Port, XM_MODE, &MdReg); - - XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FTF); - } -#endif /* GENESIS */ - -#ifdef YUKON - if (pAC->GIni.GIYukon) { - /* no way to flush the FIFO we have to issue a reset */ - /* TBD */ - } -#endif /* YUKON */ - -} /* SkMacFlushTxFifo */ - - -/****************************************************************************** - * - * SkMacFlushRxFifo() - Flush the MAC's receive FIFO - * - * Description: - * Flush the receive FIFO of the MAC specified by the index 'Port' - * - * Returns: - * nothing - */ -static void SkMacFlushRxFifo( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ -#ifdef GENESIS - SK_U32 MdReg; - - if (pAC->GIni.GIGenesis) { - - XM_IN32(IoC, Port, XM_MODE, &MdReg); - - XM_OUT32(IoC, Port, XM_MODE, MdReg | XM_MD_FRF); - } -#endif /* GENESIS */ - -#ifdef YUKON - if (pAC->GIni.GIYukon) { - /* no way to flush the FIFO we have to issue a reset */ - /* TBD */ - } -#endif /* YUKON */ - -} /* SkMacFlushRxFifo */ - - -#ifdef GENESIS -/****************************************************************************** - * - * SkXmSoftRst() - Do a XMAC software reset - * - * Description: - * The PHY registers should not be destroyed during this - * kind of software reset. Therefore the XMAC Software Reset - * (XM_GP_RES_MAC bit in XM_GP_PORT) must not be used! - * - * The software reset is done by - * - disabling the Rx and Tx state machine, - * - resetting the statistics module, - * - clear all other significant XMAC Mode, - * Command, and Control Registers - * - clearing the Hash Register and the - * Exact Match Address registers, and - * - flushing the XMAC's Rx and Tx FIFOs. - * - * Note: - * Another requirement when stopping the XMAC is to - * avoid sending corrupted frames on the network. - * Disabling the Tx state machine will NOT interrupt - * the currently transmitted frame. But we must take care - * that the Tx FIFO is cleared AFTER the current frame - * is complete sent to the network. - * - * It takes about 12ns to send a frame with 1538 bytes. - * One PCI clock goes at least 15ns (66MHz). Therefore - * after reading XM_GP_PORT back, we are sure that the - * transmitter is disabled AND idle. And this means - * we may flush the transmit FIFO now. - * - * Returns: - * nothing - */ -static void SkXmSoftRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_U16 ZeroAddr[4] = {0x0000, 0x0000, 0x0000, 0x0000}; - - /* reset the statistics module */ - XM_OUT32(IoC, Port, XM_GP_PORT, XM_GP_RES_STAT); - - /* disable all XMAC IRQs */ - XM_OUT16(IoC, Port, XM_IMSK, 0xffff); - - XM_OUT32(IoC, Port, XM_MODE, 0); /* clear Mode Reg */ - - XM_OUT16(IoC, Port, XM_TX_CMD, 0); /* reset TX CMD Reg */ - XM_OUT16(IoC, Port, XM_RX_CMD, 0); /* reset RX CMD Reg */ - - /* disable all PHY IRQs */ - switch (pAC->GIni.GP[Port].PhyType) { - case SK_PHY_BCOM: - SkXmPhyWrite(pAC, IoC, Port, PHY_BCOM_INT_MASK, 0xffff); - break; -#ifdef OTHER_PHY - case SK_PHY_LONE: - SkXmPhyWrite(pAC, IoC, Port, PHY_LONE_INT_ENAB, 0); - break; - case SK_PHY_NAT: - /* todo: National - SkXmPhyWrite(pAC, IoC, Port, PHY_NAT_INT_MASK, 0xffff); */ - break; -#endif /* OTHER_PHY */ - } - - /* clear the Hash Register */ - XM_OUTHASH(IoC, Port, XM_HSM, &ZeroAddr); - - /* clear the Exact Match Address registers */ - SkXmClrExactAddr(pAC, IoC, Port, 0, 15); - - /* clear the Source Check Address registers */ - XM_OUTHASH(IoC, Port, XM_SRC_CHK, &ZeroAddr); - -} /* SkXmSoftRst */ - - -/****************************************************************************** - * - * SkXmHardRst() - Do a XMAC hardware reset - * - * Description: - * The XMAC of the specified 'Port' and all connected devices - * (PHY and SERDES) will receive a reset signal on its *Reset pins. - * External PHYs must be reset by clearing a bit in the GPIO register - * (Timing requirements: Broadcom: 400ns, Level One: none, National: 80ns). - * - * ATTENTION: - * It is absolutely necessary to reset the SW_RST Bit first - * before calling this function. - * - * Returns: - * nothing - */ -static void SkXmHardRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_U32 Reg; - int i; - int TOut; - SK_U16 Word; - - for (i = 0; i < 4; i++) { - /* TX_MFF_CTRL1 has 32 bits, but only the lowest 16 bits are used */ - SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); - - TOut = 0; - do { - if (TOut++ > 10000) { - /* - * Adapter seems to be in RESET state. - * Registers cannot be written. - */ - return; - } - - SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_SET_MAC_RST); - - SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &Word); - - } while ((Word & MFF_SET_MAC_RST) == 0); - } - - /* For external PHYs there must be special handling */ - if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) { - - SK_IN32(IoC, B2_GP_IO, &Reg); - - if (Port == 0) { - Reg |= GP_DIR_0; /* set to output */ - Reg &= ~GP_IO_0; /* set PHY reset (active low) */ - } - else { - Reg |= GP_DIR_2; /* set to output */ - Reg &= ~GP_IO_2; /* set PHY reset (active low) */ - } - /* reset external PHY */ - SK_OUT32(IoC, B2_GP_IO, Reg); - - /* short delay */ - SK_IN32(IoC, B2_GP_IO, &Reg); - } -} /* SkXmHardRst */ - - -/****************************************************************************** - * - * SkXmClearRst() - Release the PHY & XMAC reset - * - * Description: - * - * Returns: - * nothing - */ -static void SkXmClearRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_U32 DWord; - - /* clear HW reset */ - SK_OUT16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); - - if (pAC->GIni.GP[Port].PhyType != SK_PHY_XMAC) { - - SK_IN32(IoC, B2_GP_IO, &DWord); - - if (Port == 0) { - DWord |= (GP_DIR_0 | GP_IO_0); /* set to output */ - } - else { - DWord |= (GP_DIR_2 | GP_IO_2); /* set to output */ - } - /* Clear PHY reset */ - SK_OUT32(IoC, B2_GP_IO, DWord); - - /* Enable GMII interface */ - XM_OUT16(IoC, Port, XM_HW_CFG, XM_HW_GMII_MD); - } -} /* SkXmClearRst */ -#endif /* GENESIS */ - - -#ifdef YUKON -/****************************************************************************** - * - * SkGmSoftRst() - Do a GMAC software reset - * - * Description: - * The GPHY registers should not be destroyed during this - * kind of software reset. - * - * Returns: - * nothing - */ -static void SkGmSoftRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_U16 EmptyHash[4] = {0x0000, 0x0000, 0x0000, 0x0000}; - SK_U16 RxCtrl; - - /* reset the statistics module */ - - /* disable all GMAC IRQs */ - SK_OUT8(IoC, GMAC_IRQ_MSK, 0); - - /* disable all PHY IRQs */ - SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_INT_MASK, 0); - - /* clear the Hash Register */ - GM_OUTHASH(IoC, Port, GM_MC_ADDR_H1, EmptyHash); - - /* Enable Unicast and Multicast filtering */ - GM_IN16(IoC, Port, GM_RX_CTRL, &RxCtrl); - - GM_OUT16(IoC, Port, GM_RX_CTRL, - (SK_U16)(RxCtrl | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA)); - -} /* SkGmSoftRst */ - - -/****************************************************************************** - * - * SkGmHardRst() - Do a GMAC hardware reset - * - * Description: - * - * Returns: - * nothing - */ -static void SkGmHardRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_U32 DWord; - - /* WA code for COMA mode */ - if (pAC->GIni.GIYukonLite && - pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { - - SK_IN32(IoC, B2_GP_IO, &DWord); - - DWord |= (GP_DIR_9 | GP_IO_9); - - /* set PHY reset */ - SK_OUT32(IoC, B2_GP_IO, DWord); - } - - /* set GPHY Control reset */ - SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), GPC_RST_SET); - - /* set GMAC Control reset */ - SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET); - -} /* SkGmHardRst */ - - -/****************************************************************************** - * - * SkGmClearRst() - Release the GPHY & GMAC reset - * - * Description: - * - * Returns: - * nothing - */ -static void SkGmClearRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_U32 DWord; - -#ifdef XXX - /* clear GMAC Control reset */ - SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_CLR); - - /* set GMAC Control reset */ - SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_RST_SET); -#endif /* XXX */ - - /* WA code for COMA mode */ - if (pAC->GIni.GIYukonLite && - pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) { - - SK_IN32(IoC, B2_GP_IO, &DWord); - - DWord |= GP_DIR_9; /* set to output */ - DWord &= ~GP_IO_9; /* clear PHY reset (active high) */ - - /* clear PHY reset */ - SK_OUT32(IoC, B2_GP_IO, DWord); - } - - /* set HWCFG_MODE */ - DWord = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP | - GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE | - (pAC->GIni.GICopperType ? GPC_HWCFG_GMII_COP : - GPC_HWCFG_GMII_FIB); - - /* set GPHY Control reset */ - SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_SET); - - /* release GPHY Control reset */ - SK_OUT32(IoC, MR_ADDR(Port, GPHY_CTRL), DWord | GPC_RST_CLR); - -#ifdef VCPU - VCpuWait(9000); -#endif /* VCPU */ - - /* clear GMAC Control reset */ - SK_OUT32(IoC, MR_ADDR(Port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR); - -#ifdef VCPU - VCpuWait(2000); - - SK_IN32(IoC, MR_ADDR(Port, GPHY_CTRL), &DWord); - - SK_IN32(IoC, B0_ISRC, &DWord); -#endif /* VCPU */ - -} /* SkGmClearRst */ -#endif /* YUKON */ - - -/****************************************************************************** - * - * SkMacSoftRst() - Do a MAC software reset - * - * Description: calls a MAC software reset routine dep. on board type - * - * Returns: - * nothing - */ -void SkMacSoftRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_GEPORT *pPrt; - - pPrt = &pAC->GIni.GP[Port]; - - /* disable receiver and transmitter */ - SkMacRxTxDisable(pAC, IoC, Port); - -#ifdef GENESIS - if (pAC->GIni.GIGenesis) { - - SkXmSoftRst(pAC, IoC, Port); - } -#endif /* GENESIS */ - -#ifdef YUKON - if (pAC->GIni.GIYukon) { - - SkGmSoftRst(pAC, IoC, Port); - } -#endif /* YUKON */ - - /* flush the MAC's Rx and Tx FIFOs */ - SkMacFlushTxFifo(pAC, IoC, Port); - - SkMacFlushRxFifo(pAC, IoC, Port); - - pPrt->PState = SK_PRT_STOP; - -} /* SkMacSoftRst */ - - -/****************************************************************************** - * - * SkMacHardRst() - Do a MAC hardware reset - * - * Description: calls a MAC hardware reset routine dep. on board type - * - * Returns: - * nothing - */ -void SkMacHardRst( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - -#ifdef GENESIS - if (pAC->GIni.GIGenesis) { - - SkXmHardRst(pAC, IoC, Port); - } -#endif /* GENESIS */ - -#ifdef YUKON - if (pAC->GIni.GIYukon) { - - SkGmHardRst(pAC, IoC, Port); - } -#endif /* YUKON */ - - pAC->GIni.GP[Port].PState = SK_PRT_RESET; - -} /* SkMacHardRst */ - - -#ifdef GENESIS -/****************************************************************************** - * - * SkXmInitMac() - Initialize the XMAC II - * - * Description: - * Initialize the XMAC of the specified port. - * The XMAC must be reset or stopped before calling this function. - * - * Note: - * The XMAC's Rx and Tx state machine is still disabled when returning. - * - * Returns: - * nothing - */ -void SkXmInitMac( -SK_AC *pAC, /* adapter context */ -SK_IOC IoC, /* IO context */ -int Port) /* Port Index (MAC_1 + n) */ -{ - SK_GEPORT *pPrt; - int i; - SK_U16 SWord; - - pPrt = &pAC->GIni.GP[Port]; - - if (pPrt->PState == SK_PRT_STOP) { - /* Port State: SK_PRT_STOP */ - /* Verify that the reset bit is cleared */ - SK_IN16(IoC, MR_ADDR(Port, TX_MFF_CTRL1), &SWord); - - if ((SWord & MFF_SET_MAC_RST) != 0) { - /* PState does not match HW state */ - SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_HWI_E006, SKERR_HWI_E0 |