diff options
Diffstat (limited to 'drivers/net/sfc')
-rw-r--r-- | drivers/net/sfc/Kconfig | 1 | ||||
-rw-r--r-- | drivers/net/sfc/bitfield.h | 4 | ||||
-rw-r--r-- | drivers/net/sfc/boards.c | 74 | ||||
-rw-r--r-- | drivers/net/sfc/boards.h | 1 | ||||
-rw-r--r-- | drivers/net/sfc/efx.c | 98 | ||||
-rw-r--r-- | drivers/net/sfc/efx.h | 4 | ||||
-rw-r--r-- | drivers/net/sfc/ethtool.c | 28 | ||||
-rw-r--r-- | drivers/net/sfc/falcon.c | 120 | ||||
-rw-r--r-- | drivers/net/sfc/falcon.h | 2 | ||||
-rw-r--r-- | drivers/net/sfc/falcon_io.h | 13 | ||||
-rw-r--r-- | drivers/net/sfc/mdio_10g.c | 28 | ||||
-rw-r--r-- | drivers/net/sfc/mdio_10g.h | 8 | ||||
-rw-r--r-- | drivers/net/sfc/mtd.c | 1 | ||||
-rw-r--r-- | drivers/net/sfc/net_driver.h | 29 | ||||
-rw-r--r-- | drivers/net/sfc/phy.h | 8 | ||||
-rw-r--r-- | drivers/net/sfc/rx.c | 209 | ||||
-rw-r--r-- | drivers/net/sfc/rx.h | 3 | ||||
-rw-r--r-- | drivers/net/sfc/sfe4001.c | 21 | ||||
-rw-r--r-- | drivers/net/sfc/tenxpress.c | 141 | ||||
-rw-r--r-- | drivers/net/sfc/tx.c | 13 | ||||
-rw-r--r-- | drivers/net/sfc/workarounds.h | 2 | ||||
-rw-r--r-- | drivers/net/sfc/xfp_phy.c | 105 |
22 files changed, 502 insertions, 411 deletions
diff --git a/drivers/net/sfc/Kconfig b/drivers/net/sfc/Kconfig index c535408ad6b..12a82966b57 100644 --- a/drivers/net/sfc/Kconfig +++ b/drivers/net/sfc/Kconfig @@ -2,7 +2,6 @@ config SFC tristate "Solarflare Solarstorm SFC4000 support" depends on PCI && INET select MII - select INET_LRO select CRC32 select I2C select I2C_ALGOBIT diff --git a/drivers/net/sfc/bitfield.h b/drivers/net/sfc/bitfield.h index d95c2182801..d54d84c267b 100644 --- a/drivers/net/sfc/bitfield.h +++ b/drivers/net/sfc/bitfield.h @@ -543,7 +543,7 @@ typedef union efx_oword { /* Static initialiser */ #define EFX_OWORD32(a, b, c, d) \ - { .u32 = { __constant_cpu_to_le32(a), __constant_cpu_to_le32(b), \ - __constant_cpu_to_le32(c), __constant_cpu_to_le32(d) } } + { .u32 = { cpu_to_le32(a), cpu_to_le32(b), \ + cpu_to_le32(c), cpu_to_le32(d) } } #endif /* EFX_BITFIELD_H */ diff --git a/drivers/net/sfc/boards.c b/drivers/net/sfc/boards.c index 64903496aa9..5182ac5a103 100644 --- a/drivers/net/sfc/boards.c +++ b/drivers/net/sfc/boards.c @@ -26,7 +26,7 @@ static void blink_led_timer(unsigned long context) { struct efx_nic *efx = (struct efx_nic *)context; struct efx_blinker *bl = &efx->board_info.blinker; - efx->board_info.set_fault_led(efx, bl->state); + efx->board_info.set_id_led(efx, bl->state); bl->state = !bl->state; if (bl->resubmit) mod_timer(&bl->timer, jiffies + BLINK_INTERVAL); @@ -48,7 +48,7 @@ static void board_blink(struct efx_nic *efx, bool blink) blinker->resubmit = false; if (blinker->timer.function) del_timer_sync(&blinker->timer); - efx->board_info.set_fault_led(efx, false); + efx->board_info.init_leds(efx); } } @@ -185,7 +185,7 @@ static struct i2c_board_info sfe4002_hwmon_info = { #define SFE4002_RX_LED (0) /* Green */ #define SFE4002_TX_LED (1) /* Amber */ -static int sfe4002_init_leds(struct efx_nic *efx) +static void sfe4002_init_leds(struct efx_nic *efx) { /* Set the TX and RX LEDs to reflect status and activity, and the * fault LED off */ @@ -194,11 +194,9 @@ static int sfe4002_init_leds(struct efx_nic *efx) xfp_set_led(efx, SFE4002_RX_LED, QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACTSTAT); xfp_set_led(efx, SFE4002_FAULT_LED, QUAKE_LED_OFF); - efx->board_info.blinker.led_num = SFE4002_FAULT_LED; - return 0; } -static void sfe4002_fault_led(struct efx_nic *efx, bool state) +static void sfe4002_set_id_led(struct efx_nic *efx, bool state) { xfp_set_led(efx, SFE4002_FAULT_LED, state ? QUAKE_LED_ON : QUAKE_LED_OFF); @@ -222,7 +220,67 @@ static int sfe4002_init(struct efx_nic *efx) return rc; efx->board_info.monitor = sfe4002_check_hw; efx->board_info.init_leds = sfe4002_init_leds; - efx->board_info.set_fault_led = sfe4002_fault_led; + efx->board_info.set_id_led = sfe4002_set_id_led; + efx->board_info.blink = board_blink; + efx->board_info.fini = efx_fini_lm87; + return 0; +} + +/***************************************************************************** + * Support for the SFN4112F + * + */ +static u8 sfn4112f_lm87_channel = 0x03; /* use AIN not FAN inputs */ + +static const u8 sfn4112f_lm87_regs[] = { + LM87_IN_LIMITS(0, 0x83, 0x91), /* 2.5V: 1.8V +/- 5% */ + LM87_IN_LIMITS(1, 0x51, 0x5a), /* Vccp1: 1.2V +/- 5% */ + LM87_IN_LIMITS(2, 0xb6, 0xca), /* 3.3V: 3.3V +/- 5% */ + LM87_IN_LIMITS(4, 0xb0, 0xe0), /* 12V: 11-14V */ + LM87_IN_LIMITS(5, 0x44, 0x4b), /* Vccp2: 1.0V +/- 5% */ + LM87_AIN_LIMITS(1, 0x91, 0xa1), /* AIN2: 1.5V +/- 5% */ + LM87_TEMP_INT_LIMITS(10, 60), /* board */ + LM87_TEMP_EXT1_LIMITS(10, 70), /* Falcon */ + 0 +}; + +static struct i2c_board_info sfn4112f_hwmon_info = { + I2C_BOARD_INFO("lm87", 0x2e), + .platform_data = &sfn4112f_lm87_channel, + .irq = -1, +}; + +#define SFN4112F_ACT_LED 0 +#define SFN4112F_LINK_LED 1 + +static void sfn4112f_init_leds(struct efx_nic *efx) +{ + xfp_set_led(efx, SFN4112F_ACT_LED, + QUAKE_LED_RXLINK | QUAKE_LED_LINK_ACT); + xfp_set_led(efx, SFN4112F_LINK_LED, + QUAKE_LED_RXLINK | QUAKE_LED_LINK_STAT); +} + +static void sfn4112f_set_id_led(struct efx_nic *efx, bool state) +{ + xfp_set_led(efx, SFN4112F_LINK_LED, + state ? QUAKE_LED_ON : QUAKE_LED_OFF); +} + +static int sfn4112f_check_hw(struct efx_nic *efx) +{ + /* Mask out unused sensors */ + return efx_check_lm87(efx, ~0x48); +} + +static int sfn4112f_init(struct efx_nic *efx) +{ + int rc = efx_init_lm87(efx, &sfn4112f_hwmon_info, sfn4112f_lm87_regs); + if (rc) + return rc; + efx->board_info.monitor = sfn4112f_check_hw; + efx->board_info.init_leds = sfn4112f_init_leds; + efx->board_info.set_id_led = sfn4112f_set_id_led; efx->board_info.blink = board_blink; efx->board_info.fini = efx_fini_lm87; return 0; @@ -243,6 +301,8 @@ static struct efx_board_data board_data[] = { { EFX_BOARD_SFE4002, "SFE4002", "XFP adapter", sfe4002_init }, { EFX_BOARD_SFN4111T, "SFN4111T", "100/1000/10GBASE-T adapter", sfn4111t_init }, + { EFX_BOARD_SFN4112F, "SFN4112F", "SFP+ adapter", + sfn4112f_init }, }; void efx_set_board_info(struct efx_nic *efx, u16 revision_info) diff --git a/drivers/net/sfc/boards.h b/drivers/net/sfc/boards.h index d93c6c6a754..44942de0e08 100644 --- a/drivers/net/sfc/boards.h +++ b/drivers/net/sfc/boards.h @@ -15,6 +15,7 @@ enum efx_board_type { EFX_BOARD_SFE4001 = 1, EFX_BOARD_SFE4002 = 2, EFX_BOARD_SFN4111T = 0x51, + EFX_BOARD_SFN4112F = 0x52, }; extern void efx_set_board_info(struct efx_nic *efx, u16 revision_info); diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c index ab0e09bf154..dee23b159df 100644 --- a/drivers/net/sfc/efx.c +++ b/drivers/net/sfc/efx.c @@ -133,6 +133,16 @@ static int phy_flash_cfg; module_param(phy_flash_cfg, int, 0644); MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); +static unsigned irq_adapt_low_thresh = 10000; +module_param(irq_adapt_low_thresh, uint, 0644); +MODULE_PARM_DESC(irq_adapt_low_thresh, + "Threshold score for reducing IRQ moderation"); + +static unsigned irq_adapt_high_thresh = 20000; +module_param(irq_adapt_high_thresh, uint, 0644); +MODULE_PARM_DESC(irq_adapt_high_thresh, + "Threshold score for increasing IRQ moderation"); + /************************************************************************** * * Utility functions and prototypes @@ -182,7 +192,6 @@ static int efx_process_channel(struct efx_channel *channel, int rx_quota) channel->rx_pkt = NULL; } - efx_flush_lro(channel); efx_rx_strategy(channel); efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]); @@ -224,12 +233,41 @@ static int efx_poll(struct napi_struct *napi, int budget) rx_packets = efx_process_channel(channel, budget); if (rx_packets < budget) { + struct efx_nic *efx = channel->efx; + + if (channel->used_flags & EFX_USED_BY_RX && + efx->irq_rx_adaptive && + unlikely(++channel->irq_count == 1000)) { + unsigned old_irq_moderation = channel->irq_moderation; + + if (unlikely(channel->irq_mod_score < + irq_adapt_low_thresh)) { + channel->irq_moderation = + max_t(int, + channel->irq_moderation - + FALCON_IRQ_MOD_RESOLUTION, + FALCON_IRQ_MOD_RESOLUTION); + } else if (unlikely(channel->irq_mod_score > + irq_adapt_high_thresh)) { + channel->irq_moderation = + min(channel->irq_moderation + + FALCON_IRQ_MOD_RESOLUTION, + efx->irq_rx_moderation); + } + + if (channel->irq_moderation != old_irq_moderation) + falcon_set_int_moderation(channel); + + channel->irq_count = 0; + channel->irq_mod_score = 0; + } + /* There is no race here; although napi_disable() will - * only wait for netif_rx_complete(), this isn't a problem + * only wait for napi_complete(), this isn't a problem * since efx_channel_processed() will have no effect if * interrupts have already been disabled. */ - netif_rx_complete(napi); + napi_complete(napi); efx_channel_processed(channel); } @@ -410,6 +448,9 @@ static void efx_init_channels(struct efx_nic *efx) WARN_ON(channel->rx_pkt != NULL); efx_rx_strategy(channel); + + netif_napi_add(channel->napi_dev, &channel->napi_str, + efx_poll, napi_weight); } } @@ -424,10 +465,6 @@ static void efx_start_channel(struct efx_channel *channel) EFX_LOG(channel->efx, "starting chan %d\n", channel->channel); - if (!(channel->efx->net_dev->flags & IFF_UP)) - netif_napi_add(channel->napi_dev, &channel->napi_str, - efx_poll, napi_weight); - /* The interrupt handler for this channel may set work_pending * as soon as we enable it. Make sure it's cleared before * then. Similarly, make sure it sees the enabled flag set. */ @@ -558,6 +595,8 @@ static void efx_link_status_changed(struct efx_nic *efx) } +static void efx_fini_port(struct efx_nic *efx); + /* This call reinitialises the MAC to pick up new PHY settings. The * caller must hold the mac_lock */ void __efx_reconfigure_port(struct efx_nic *efx) @@ -593,8 +632,8 @@ void __efx_reconfigure_port(struct efx_nic *efx) fail: EFX_ERR(efx, "failed to reconfigure MAC\n"); - efx->phy_op->fini(efx); - efx->port_initialized = false; + efx->port_enabled = false; + efx_fini_port(efx); } /* Reinitialise the MAC to pick up new PHY settings, even if the port is @@ -854,20 +893,27 @@ static void efx_fini_io(struct efx_nic *efx) * interrupts across them. */ static int efx_wanted_rx_queues(void) { - cpumask_t core_mask; + cpumask_var_t core_mask; int count; int cpu; - cpus_clear(core_mask); + if (!alloc_cpumask_var(&core_mask, GFP_KERNEL)) { + printk(KERN_WARNING + "efx.c: allocation failure, irq balancing hobbled\n"); + return 1; + } + + cpumask_clear(core_mask); count = 0; for_each_online_cpu(cpu) { - if (!cpu_isset(cpu, core_mask)) { + if (!cpumask_test_cpu(cpu, core_mask)) { ++count; - cpus_or(core_mask, core_mask, - topology_core_siblings(cpu)); + cpumask_or(core_mask, core_mask, + topology_core_cpumask(cpu)); } } + free_cpumask_var(core_mask); return count; } @@ -990,7 +1036,7 @@ static int efx_probe_nic(struct efx_nic *efx) efx_set_channels(efx); /* Initialise the interrupt moderation settings */ - efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec); + efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true); return 0; } @@ -1187,7 +1233,8 @@ void efx_flush_queues(struct efx_nic *efx) **************************************************************************/ /* Set interrupt moderation parameters */ -void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs) +void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs, + bool rx_adaptive) { struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; @@ -1197,6 +1244,8 @@ void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs) efx_for_each_tx_queue(tx_queue, efx) tx_queue->channel->irq_moderation = tx_usecs; + efx->irq_rx_adaptive = rx_adaptive; + efx->irq_rx_moderation = rx_usecs; efx_for_each_rx_queue(rx_queue, efx) rx_queue->channel->irq_moderation = rx_usecs; } @@ -1269,18 +1318,11 @@ static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) static int efx_init_napi(struct efx_nic *efx) { struct efx_channel *channel; - int rc; efx_for_each_channel(channel, efx) { channel->napi_dev = efx->net_dev; - rc = efx_lro_init(&channel->lro_mgr, efx); - if (rc) - goto err; } return 0; - err: - efx_fini_napi(efx); - return rc; } static void efx_fini_napi(struct efx_nic *efx) @@ -1288,7 +1330,6 @@ static void efx_fini_napi(struct efx_nic *efx) struct efx_channel *channel; efx_for_each_channel(channel, efx) { - efx_lro_fini(&channel->lro_mgr); channel->napi_dev = NULL; } } @@ -1676,7 +1717,8 @@ int efx_reset_up(struct efx_nic *efx, enum reset_type method, rc = efx->phy_op->init(efx); if (rc) ok = false; - } else + } + if (!ok) efx->port_initialized = false; } @@ -1857,8 +1899,8 @@ static struct efx_phy_operations efx_dummy_phy_operations = { static struct efx_board efx_dummy_board_info = { .init = efx_port_dummy_op_int, - .init_leds = efx_port_dummy_op_int, - .set_fault_led = efx_port_dummy_op_blink, + .init_leds = efx_port_dummy_op_void, + .set_id_led = efx_port_dummy_op_blink, .monitor = efx_port_dummy_op_int, .blink = efx_port_dummy_op_blink, .fini = efx_port_dummy_op_void, @@ -2120,7 +2162,7 @@ static int __devinit efx_pci_probe(struct pci_dev *pci_dev, net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_TSO); if (lro) - net_dev->features |= NETIF_F_LRO; + net_dev->features |= NETIF_F_GRO; /* Mask for features that also apply to VLAN devices */ net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_TSO); diff --git a/drivers/net/sfc/efx.h b/drivers/net/sfc/efx.h index 55d0f131b0e..da157aa74b8 100644 --- a/drivers/net/sfc/efx.h +++ b/drivers/net/sfc/efx.h @@ -52,7 +52,7 @@ extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type); extern void efx_suspend(struct efx_nic *efx); extern void efx_resume(struct efx_nic *efx); extern void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, - int rx_usecs); + int rx_usecs, bool rx_adaptive); extern int efx_request_power(struct efx_nic *efx, int mw, const char *name); extern void efx_hex_dump(const u8 *, unsigned int, const char *); @@ -80,7 +80,7 @@ static inline void efx_schedule_channel(struct efx_channel *channel) channel->channel, raw_smp_processor_id()); channel->work_pending = true; - netif_rx_schedule(&channel->napi_str); + napi_schedule(&channel->napi_str); } #endif /* EFX_EFX_H */ diff --git a/drivers/net/sfc/ethtool.c b/drivers/net/sfc/ethtool.c index 7b5924c039b..64309f4e8b1 100644 --- a/drivers/net/sfc/ethtool.c +++ b/drivers/net/sfc/ethtool.c @@ -529,7 +529,14 @@ static int efx_ethtool_nway_reset(struct net_device *net_dev) { struct efx_nic *efx = netdev_priv(net_dev); - return mii_nway_restart(&efx->mii); + if (efx->phy_op->mmds & DEV_PRESENT_BIT(MDIO_MMD_AN)) { + mdio_clause45_set_flag(efx, efx->mii.phy_id, MDIO_MMD_AN, + MDIO_MMDREG_CTRL1, + __ffs(BMCR_ANRESTART), true); + return 0; + } + + return -EOPNOTSUPP; } static u32 efx_ethtool_get_link(struct net_device *net_dev) @@ -597,7 +604,6 @@ static int efx_ethtool_get_coalesce(struct net_device *net_dev, { struct efx_nic *efx = netdev_priv(net_dev); struct efx_tx_queue *tx_queue; - struct efx_rx_queue *rx_queue; struct efx_channel *channel; memset(coalesce, 0, sizeof(*coalesce)); @@ -615,14 +621,8 @@ static int efx_ethtool_get_coalesce(struct net_device *net_dev, } } - /* Find lowest IRQ moderation across all used RX queues */ - coalesce->rx_coalesce_usecs_irq = ~((u32) 0); - efx_for_each_rx_queue(rx_queue, efx) { - channel = rx_queue->channel; - if (channel->irq_moderation < coalesce->rx_coalesce_usecs_irq) - coalesce->rx_coalesce_usecs_irq = - channel->irq_moderation; - } + coalesce->use_adaptive_rx_coalesce = efx->irq_rx_adaptive; + coalesce->rx_coalesce_usecs_irq = efx->irq_rx_moderation; return 0; } @@ -636,10 +636,9 @@ static int efx_ethtool_set_coalesce(struct net_device *net_dev, struct efx_nic *efx = netdev_priv(net_dev); struct efx_channel *channel; struct efx_tx_queue *tx_queue; - unsigned tx_usecs, rx_usecs; + unsigned tx_usecs, rx_usecs, adaptive; - if (coalesce->use_adaptive_rx_coalesce || - coalesce->use_adaptive_tx_coalesce) + if (coalesce->use_adaptive_tx_coalesce) return -EOPNOTSUPP; if (coalesce->rx_coalesce_usecs || coalesce->tx_coalesce_usecs) { @@ -650,6 +649,7 @@ static int efx_ethtool_set_coalesce(struct net_device *net_dev, rx_usecs = coalesce->rx_coalesce_usecs_irq; tx_usecs = coalesce->tx_coalesce_usecs_irq; + adaptive = coalesce->use_adaptive_rx_coalesce; /* If the channel is shared only allow RX parameters to be set */ efx_for_each_tx_queue(tx_queue, efx) { @@ -661,7 +661,7 @@ static int efx_ethtool_set_coalesce(struct net_device *net_dev, } } - efx_init_irq_moderation(efx, tx_usecs, rx_usecs); + efx_init_irq_moderation(efx, tx_usecs, rx_usecs, adaptive); /* Reset channel to pick up new moderation value. Note that * this may change the value of the irq_moderation field diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index d5378e60fcd..d4629ab2c61 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c @@ -39,11 +39,16 @@ * @next_buffer_table: First available buffer table id * @pci_dev2: The secondary PCI device if present * @i2c_data: Operations and state for I2C bit-bashing algorithm + * @int_error_count: Number of internal errors seen recently + * @int_error_expire: Time at which error count will be expired */ struct falcon_nic_data { unsigned next_buffer_table; struct pci_dev *pci_dev2; struct i2c_algo_bit_data i2c_data; + + unsigned int_error_count; + unsigned long int_error_expire; }; /************************************************************************** @@ -119,8 +124,12 @@ MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold"); #define FALCON_EVQ_SIZE 4096 #define FALCON_EVQ_MASK (FALCON_EVQ_SIZE - 1) -/* Max number of internal errors. After this resets will not be performed */ -#define FALCON_MAX_INT_ERRORS 4 +/* If FALCON_MAX_INT_ERRORS internal errors occur within + * FALCON_INT_ERROR_EXPIRE seconds, we consider the NIC broken and + * disable it. + */ +#define FALCON_INT_ERROR_EXPIRE 3600 +#define FALCON_MAX_INT_ERRORS 5 /* We poll for events every FLUSH_INTERVAL ms, and check FLUSH_POLL_COUNT times */ @@ -146,13 +155,6 @@ MODULE_PARM_DESC(rx_xon_thresh_bytes, "RX fifo XON threshold"); /* Dummy SRAM size code */ #define SRM_NB_BSZ_ONCHIP_ONLY (-1) -/* Be nice if these (or equiv.) were in linux/pci_regs.h, but they're not. */ -#define PCI_EXP_DEVCAP_PWR_VAL_LBN 18 -#define PCI_EXP_DEVCAP_PWR_SCL_LBN 26 -#define PCI_EXP_DEVCTL_PAYLOAD_LBN 5 -#define PCI_EXP_LNKSTA_LNK_WID 0x3f0 -#define PCI_EXP_LNKSTA_LNK_WID_LBN 4 - #define FALCON_IS_DUAL_FUNC(efx) \ (falcon_rev(efx) < FALCON_REV_B0) @@ -338,10 +340,10 @@ static int falcon_alloc_special_buffer(struct efx_nic *efx, nic_data->next_buffer_table += buffer->entries; EFX_LOG(efx, "allocating special buffers %d-%d at %llx+%x " - "(virt %p phys %lx)\n", buffer->index, + "(virt %p phys %llx)\n", buffer->index, buffer->index + buffer->entries - 1, - (unsigned long long)buffer->dma_addr, len, - buffer->addr, virt_to_phys(buffer->addr)); + (u64)buffer->dma_addr, len, + buffer->addr, (u64)virt_to_phys(buffer->addr)); return 0; } @@ -353,10 +355,10 @@ static void falcon_free_special_buffer(struct efx_nic *efx, return; EFX_LOG(efx, "deallocating special buffers %d-%d at %llx+%x " - "(virt %p phys %lx)\n", buffer->index, + "(virt %p phys %llx)\n", buffer->index, buffer->index + buffer->entries - 1, - (unsigned long long)buffer->dma_addr, buffer->len, - buffer->addr, virt_to_phys(buffer->addr)); + (u64)buffer->dma_addr, buffer->len, + buffer->addr, (u64)virt_to_phys(buffer->addr)); pci_free_consistent(efx->pci_dev, buffer->len, buffer->addr, buffer->dma_addr); @@ -727,6 +729,9 @@ static void falcon_handle_tx_event(struct efx_channel *channel, tx_ev_desc_ptr = EFX_QWORD_FIELD(*event, TX_EV_DESC_PTR); tx_ev_q_label = EFX_QWORD_FIELD(*event, TX_EV_Q_LABEL); tx_queue = &efx->tx_queue[tx_ev_q_label]; + channel->irq_mod_score += + (tx_ev_desc_ptr - tx_queue->read_count) & + efx->type->txd_ring_mask; efx_xmit_done(tx_queue, tx_ev_desc_ptr); } else if (EFX_QWORD_FIELD(*event, TX_EV_WQ_FF_FULL)) { /* Rewrite the FIFO write pointer */ @@ -896,6 +901,8 @@ static void falcon_handle_rx_event(struct efx_channel *channel, discard = true; } + channel->irq_mod_score += 2; + /* Handle received packet */ efx_rx_packet(rx_queue, rx_ev_desc_ptr, rx_ev_byte_cnt, checksummed, discard); @@ -1073,14 +1080,15 @@ void falcon_set_int_moderation(struct efx_channel *channel) * program is based at 0. So actual interrupt moderation * achieved is ((x + 1) * res). */ - unsigned int res = 5; - channel->irq_moderation -= (channel->irq_moderation % res); - if (channel->irq_moderation < res) - channel->irq_moderation = res; + channel->irq_moderation -= (channel->irq_moderation % + FALCON_IRQ_MOD_RESOLUTION); + if (channel->irq_moderation < FALCON_IRQ_MOD_RESOLUTION) + channel->irq_moderation = FALCON_IRQ_MOD_RESOLUTION; EFX_POPULATE_DWORD_2(timer_cmd, TIMER_MODE, TIMER_MODE_INT_HLDOFF, TIMER_VAL, - (channel->irq_moderation / res) - 1); + channel->irq_moderation / + FALCON_IRQ_MOD_RESOLUTION - 1); } else { EFX_POPULATE_DWORD_2(timer_cmd, TIMER_MODE, TIMER_MODE_DIS, @@ -1187,31 +1195,29 @@ static void falcon_poll_flush_events(struct efx_nic *efx) struct efx_channel *channel = &efx->channel[0]; struct efx_tx_queue *tx_queue; struct efx_rx_queue *rx_queue; - unsigned int read_ptr, i; + unsigned int read_ptr = channel->eventq_read_ptr; + unsigned int end_ptr = (read_ptr - 1) & FALCON_EVQ_MASK; - read_ptr = channel->eventq_read_ptr; - for (i = 0; i < FALCON_EVQ_SIZE; ++i) { + do { efx_qword_t *event = falcon_event(channel, read_ptr); int ev_code, ev_sub_code, ev_queue; bool ev_failed; + if (!falcon_event_present(event)) break; ev_code = EFX_QWORD_FIELD(*event, EV_CODE); - if (ev_code != DRIVER_EV_DECODE) - continue; - ev_sub_code = EFX_QWORD_FIELD(*event, DRIVER_EV_SUB_CODE); - switch (ev_sub_code) { - case TX_DESCQ_FLS_DONE_EV_DECODE: + if (ev_code == DRIVER_EV_DECODE && + ev_sub_code == TX_DESCQ_FLS_DONE_EV_DECODE) { ev_queue = EFX_QWORD_FIELD(*event, DRIVER_EV_TX_DESCQ_ID); if (ev_queue < EFX_TX_QUEUE_COUNT) { tx_queue = efx->tx_queue + ev_queue; tx_queue->flushed = true; } - break; - case RX_DESCQ_FLS_DONE_EV_DECODE: + } else if (ev_code == DRIVER_EV_DECODE && + ev_sub_code == RX_DESCQ_FLS_DONE_EV_DECODE) { ev_queue = EFX_QWORD_FIELD(*event, DRIVER_EV_RX_DESCQ_ID); ev_failed = EFX_QWORD_FIELD(*event, @@ -1225,11 +1231,10 @@ static void falcon_poll_flush_events(struct efx_nic *efx) else rx_queue->flushed = true; } - break; } read_ptr = (read_ptr + 1) & FALCON_EVQ_MASK; - } + } while (read_ptr != end_ptr); } /* Handle tx and rx flushes at the same time, since they run in @@ -1377,7 +1382,6 @@ static irqreturn_t falcon_fatal_interrupt(struct efx_nic *efx) efx_oword_t *int_ker = efx->irq_status.addr; efx_oword_t fatal_intr; int error, mem_perr; - static int n_int_errors; falcon_read(efx, &fatal_intr, FATAL_INTR_REG_KER); error = EFX_OWORD_FIELD(fatal_intr, INT_KER_ERROR); @@ -1404,7 +1408,14 @@ static irqreturn_t falcon_fatal_interrupt(struct efx_nic *efx) pci_clear_master(nic_data->pci_dev2); falcon_disable_interrupts(efx); - if (++n_int_errors < FALCON_MAX_INT_ERRORS) { + /* Count errors and reset or disable the NIC accordingly */ + if (nic_data->int_error_count == 0 || + time_after(jiffies, nic_data->int_error_expire)) { + nic_data->int_error_count = 0; + nic_data->int_error_expire = + jiffies + FALCON_INT_ERROR_EXPIRE * HZ; + } + if (++nic_data->int_error_count < FALCON_MAX_INT_ERRORS) { EFX_ERR(efx, "SYSTEM ERROR - reset scheduled\n"); efx_schedule_reset(efx, RESET_TYPE_INT_ERROR); } else { @@ -1423,6 +1434,7 @@ static irqreturn_t falcon_legacy_interrupt_b0(int irq, void *dev_id) { struct efx_nic *efx = dev_id; efx_oword_t *int_ker = efx->irq_status.addr; + irqreturn_t result = IRQ_NONE; struct efx_channel *channel; efx_dword_t reg; u32 queues; @@ -1437,23 +1449,24 @@ static irqreturn_t falcon_legacy_interrupt_b0(int irq, void *dev_id) if (unlikely(syserr)) return falcon_fatal_interrupt(efx); - if (queues == 0) - return IRQ_NONE; - - efx->last_irq_cpu = raw_smp_processor_id(); - EFX_TRACE(efx, "IRQ %d on CPU %d status " EFX_DWORD_FMT "\n", - irq, raw_smp_processor_id(), EFX_DWORD_VAL(reg)); - /* Schedule processing of any interrupting queues */ - channel = &efx->channel[0]; - while (queues) { - if (queues & 0x01) + efx_for_each_channel(channel, efx) { + if ((queues & 1) || + falcon_event_present( + falcon_event(channel, channel->eventq_read_ptr))) { efx_schedule_channel(channel); - channel++; + result = IRQ_HANDLED; + } queues >>= 1; } - return IRQ_HANDLED; + if (result == IRQ_HANDLED) { + efx->last_irq_cpu = raw_smp_processor_id(); + EFX_TRACE(efx, "IRQ %d on CPU %d status " EFX_DWORD_FMT "\n", + irq, raw_smp_processor_id(), EFX_DWORD_VAL(reg)); + } + + return result; } @@ -2249,6 +2262,7 @@ static int falcon_probe_phy(struct efx_nic *efx) efx->phy_op = &falcon_sft9001_phy_ops; break; case PHY_TYPE_QT2022C2: + case PHY_TYPE_QT2025C: efx->phy_op = &falcon_xfp_phy_ops; break; default: @@ -2343,10 +2357,10 @@ int falcon_probe_port(struct efx_nic *efx) FALCON_MAC_STATS_SIZE); if (rc) return rc; - EFX_LOG(efx, "stats buffer at %llx (virt %p phys %lx)\n", - (unsigned long long)efx->stats_buffer.dma_addr, + EFX_LOG(efx, "stats buffer at %llx (virt %p phys %llx)\n", + (u64)efx->stats_buffer.dma_addr, efx->stats_buffer.addr, - virt_to_phys(efx->stats_buffer.addr)); + (u64)virt_to_phys(efx->stats_buffer.addr)); return 0; } @@ -2921,9 +2935,9 @@ int falcon_probe_nic(struct efx_nic *efx) goto fail4; BUG_ON(efx->irq_status.dma_addr & 0x0f); - EFX_LOG(efx, "INT_KER at %llx (virt %p phys %lx)\n", - (unsigned long long)efx->irq_status.dma_addr, - efx->irq_status.addr, virt_to_phys(efx->irq_status.addr)); + EFX_LOG(efx, "INT_KER at %llx (virt %p phys %llx)\n", + (u64)efx->irq_status.dma_addr, + efx->irq_status.addr, (u64)virt_to_phys(efx->irq_status.addr)); falcon_probe_spi_devices(efx); @@ -3113,8 +3127,10 @@ void falcon_remove_nic(struct efx_nic *efx) struct falcon_nic_data *nic_data = efx->nic_data; int rc; + /* Remove I2C adapter and clear it in preparation for a retry */ rc = i2c_del_adapter(&efx->i2c_adap); BUG_ON(rc); + memset(&efx->i2c_adap, 0, sizeof(efx->i2c_adap)); falcon_remove_spi_devices(efx); falcon_free_buffer(efx, &efx->irq_status); diff --git a/drivers/net/sfc/falcon.h b/drivers/net/sfc/falcon.h index 7869c3d7438..77f2e0db7ca 100644 --- a/drivers/net/sfc/falcon.h +++ b/drivers/net/sfc/falcon.h @@ -85,6 +85,8 @@ extern void falcon_set_int_moderation(struct efx_channel *channel); extern void falcon_disable_interrupts(struct efx_nic *efx); extern void falcon_fini_interrupt(struct efx_nic *efx); +#define FALCON_IRQ_MOD_RESOLUTION 5 + /* Global Resources */ extern int falcon_probe_nic(struct efx_nic *efx); extern int falcon_probe_resources(struct efx_nic *efx); diff --git a/drivers/net/sfc/falcon_io.h b/drivers/net/sfc/falcon_io.h index c16da3149fa..8883092dae9 100644 --- a/drivers/net/sfc/falcon_io.h +++ b/drivers/net/sfc/falcon_io.h @@ -238,18 +238,21 @@ static inline void falcon_writel_page(struct efx_nic *efx, efx_dword_t *value, /* Write dword to Falcon page-mapped register with an extra lock. * * As for falcon_writel_page(), but for a register that suffers from - * SFC bug 3181. Take out a lock so the BIU collector cannot be - * confused. */ + * SFC bug 3181. If writing to page 0, take out a lock so the BIU + * collector cannot be confused. + */ static inline void falcon_writel_page_locked(struct efx_nic *efx, efx_dword_t *value, unsigned int reg, unsigned int page) { - unsigned long flags; + unsigned long flags = 0; - spin_lock_irqsave(&efx->biu_lock, flags); + if (page == 0) + spin_lock_irqsave(&efx->biu_lock, flags); falcon_writel(efx, value, FALCON_PAGED_REG(page, reg)); - spin_unlock_irqrestore(&efx->biu_lock, flags); + if (page == 0) + spin_unlock_irqrestore(&efx->biu_lock, flags); } #endif /* EFX_FALCON_IO_H */ diff --git a/drivers/net/sfc/mdio_10g.c b/drivers/net/sfc/mdio_10g.c index f9e2f95c3b4..9f5ec3eb341 100644 --- a/drivers/net/sfc/mdio_10g.c +++ b/drivers/net/sfc/mdio_10g.c @@ -17,6 +17,21 @@ #include "boards.h" #include "workarounds.h" +unsigned mdio_id_oui(u32 id) +{ + unsigned oui = 0; + int i; + + /* The bits of the OUI are designated a..x, with a=0 and b variable. + * In the id register c is the MSB but the OUI is conventionally + * written as bytes h..a, p..i, x..q. Reorder the bits accordingly. */ + for (i = 0; i < 22; ++i) + if (id & (1 << (i + 10))) + oui |= 1 << (i ^ 7); + + return oui; +} + int mdio_clause45_reset_mmd(struct efx_nic *port, int mmd, int spins, int spintime) { @@ -125,24 +140,25 @@ int mdio_clause45_wait_reset_mmds(struct efx_nic *efx, int mdio_clause45_check_mmds(struct efx_nic *efx, unsigned int mmd_mask, unsigned int fatal_mask) { + int mmd = 0, probe_mmd, devs0, devs1; u32 devices; - int mmd = 0, probe_mmd; /* Historically we have probed the PHYXS to find out what devices are * present,but that doesn't work so well if the PHYXS isn't expected * to exist, if so just find the first item in the list supplied. */ probe_mmd = (mmd_mask & MDIO_MMDREG_DEVS_PHYXS) ? MDIO_MMD_PHYXS : __ffs(mmd_mask); - devices = (mdio_clause45_read(efx, efx->mii.phy_id, - probe_mmd, MDIO_MMDREG_DEVS0) | - mdio_clause45_read(efx, efx->mii.phy_id, - probe_mmd, MDIO_MMDREG_DEVS1) << 16); /* Check all the expected MMDs are present */ - if (devices < 0) { + devs0 = mdio_clause45_read(efx, efx->mii.phy_id, + probe_mmd, MDIO_MMDREG_DEVS0); + devs1 = mdio_clause45_read(efx, efx->mii.phy_id, + probe_mmd, MDIO_MMDREG_DEVS1); + if (devs0 < 0 || devs1 < 0) { EFX_ERR(efx, "failed to read devices present\n"); return -EIO; } + devices = devs0 | (devs1 << 16); if ((devices & mmd_mask) != mmd_mask) { EFX_ERR(efx, "required MMDs not present: got %x, " "wanted %x\n", devices, mmd_mask); diff --git a/drivers/net/sfc/mdio_10g.h b/drivers/net/sfc/mdio_10g.h index 8ba49773ce7..7014d2279c2 100644 --- a/drivers/net/sfc/mdio_10g.h +++ b/drivers/net/sfc/mdio_10g.h @@ -70,10 +70,10 @@ #define MDIO_MMDREG_STAT1_LPABLE_LBN (1) #define MDIO_MMDREG_STAT1_LPABLE_WIDTH (1) -/* Bits in ID reg */ -#define MDIO_ID_REV(_id32) (_id32 & 0xf) -#define MDIO_ID_MODEL(_id32) ((_id32 >> 4) & 0x3f) -#define MDIO_ID_OUI(_id32) (_id32 >> 10) +/* Bits in combined ID regs */ +static inline unsigned mdio_id_rev(u32 id) { return id & 0xf; } +static inline unsigned mdio_id_model(u32 id) { return (id >> 4) & 0x3f; } +extern unsigned mdio_id_oui(u32 id); /* Bits in MMDREG_DEVS0/1. Someone thoughtfully layed things out * so the 'bit present' bit number of an MMD is the number of diff --git a/drivers/net/sfc/mtd.c b/drivers/net/sfc/mtd.c index 665cafb88d6..820c233c3ea 100644 --- a/drivers/net/sfc/mtd.c +++ b/drivers/net/sfc/mtd.c @@ -15,6 +15,7 @@ #define EFX_DRIVER_NAME "sfc_mtd" #include "net_driver.h" #include "spi.h" +#include "efx.h" #define EFX_SPI_VERIFY_BUF_LEN 16 diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h index e019ad1fb9a..e169e5dcd1e 100644 --- a/drivers/net/sfc/net_driver.h +++ b/drivers/net/sfc/net_driver.h @@ -25,15 +25,11 @@ #include <linux/device.h> #include <linux/highmem.h> #include <linux/workqueue.h> -#include <linux/inet_lro.h> #include <linux/i2c.h> #include "enum.h" #include "bitfield.h" -#define EFX_MAX_LRO_DESCRIPTORS 8 -#define EFX_MAX_LRO_AGGR MAX_SKB_FRAGS - /************************************************************************** * * Build definitions @@ -340,13 +336,12 @@ enum efx_rx_alloc_method { * @eventq_read_ptr: Event queue read pointer * @last_eventq_read_ptr: Last event queue read pointer value. * @eventq_magic: Event queue magic value for driver-generated test events - * @lro_mgr: LRO state + * @irq_count: Number of IRQs since last adaptive moderation decision + * @irq_mod_score: IRQ moderation score * @rx_alloc_level: Watermark based heuristic counter for pushing descriptors * and diagnostic counters * @rx_alloc_push_pages: RX allocation method currently in use for pushing * descriptors - * @rx_alloc_pop_pages: RX allocation method currently in use for popping - * descriptors * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors * @n_rx_ip_frag_err: Count of RX IP fragment errors * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors @@ -371,10 +366,11 @@ struct efx_channel { unsigned int last_eventq_read_ptr; unsigned int eventq_magic; - struct net_lro_mgr lro_mgr; + unsigned int irq_count; + unsigned int irq_mod_score; + int rx_alloc_level; int rx_alloc_push_pages; - int rx_alloc_pop_pages; unsigned n_rx_tobe_disc; unsigned n_rx_ip_frag_err; @@ -394,13 +390,11 @@ struct efx_channel { /** * struct efx_blinker - S/W LED blinking context - * @led_num: LED ID (board-specific meaning) * @state: Current state - on or off * @resubmit: Timer resubmission flag * @timer: Control timer for blinking */ struct efx_blinker { - int led_num; bool state; bool resubmit; struct timer_list timer; @@ -413,8 +407,8 @@ struct efx_blinker { * @major: Major rev. ('A', 'B' ...) * @minor: Minor rev. (0, 1, ...) * @init: Initialisation function - * @init_leds: Sets up board LEDs - * @set_fault_led: Turns the fault LED on or off + * @init_leds: Sets up board LEDs. May be called repeatedly. + * @set_id_led: Turns the identification LED on or off * @blink: Starts/stops blinking * @monitor: Board-specific health check function * @fini: Cleanup function @@ -430,9 +424,9 @@ struct efx_board { /* As the LEDs are typically attached to the PHY, LEDs * have a separate init callback that happens later than * board init. */ - int (*init_leds)(struct efx_nic *efx); + void (*init_leds)(struct efx_nic *efx); + void (*set_id_led) (struct efx_nic *efx, bool state); int (*monitor) (struct efx_nic *nic); - void (*set_fault_led) (struct efx_nic *efx, bool state); void (*blink) (struct efx_nic *efx, bool start); void (*fini) (struct efx_nic *nic); struct efx_blinker blinker; @@ -459,6 +453,7 @@ enum phy_type { PHY_TYPE_QT2022C2 = 4, PHY_TYPE_PM8358 = 6, PHY_TYPE_SFT9001A = 8, + PHY_TYPE_QT2025C = 9, PHY_TYPE_SFT9001B = 10, PHY_TYPE_MAX /* Insert any new items before this */ }; @@ -713,6 +708,8 @@ union efx_multicast_hash { * @membase: Memory BAR value * @biu_lock: BIU (bus interface unit) lock * @interrupt_mode: Interrupt mode + * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues + * @irq_rx_moderation: IRQ moderation time for RX event queues * @i2c_adap: I2C adapter * @board_info: Board-level information * @state: Device state flag. Serialised by the rtnl_lock. @@ -794,6 +791,8 @@ struct efx_nic { void __iomem *membase; spinlock_t biu_lock; enum efx_int_mode interrupt_mode; + bool irq_rx_adaptive; + unsigned int irq_rx_moderation; struct i2c_adapter i2c_adap; struct efx_board board_info; diff --git a/drivers/net/sfc/phy.h b/drivers/net/sfc/phy.h index 07e855c148b..c1cff9c0c17 100644 --- a/drivers/net/sfc/phy.h +++ b/drivers/net/sfc/phy.h @@ -18,12 +18,16 @@ extern struct efx_phy_operations falcon_sft9001_phy_ops; extern void tenxpress_phy_blink(struct efx_nic *efx, bool blink); +/* Wait for the PHY to boot. Return 0 on success, -EINVAL if the PHY failed + * to boot due to corrupt flash, or some other negative error code. */ +extern int sft9001_wait_boot(struct efx_nic *efx); + /**************************************************************************** - * Exported functions from the driver for XFP optical PHYs + * AMCC/Quake QT20xx PHYs */ extern struct efx_phy_operations falcon_xfp_phy_ops; -/* The QUAKE XFP PHY provides various H/W control states for LEDs */ +/* These PHYs provide various H/W control states for LEDs */ #define QUAKE_LED_LINK_INVAL (0) #define QUAKE_LED_LINK_STAT (1) #define QUAKE_LED_LINK_ACT (2) diff --git a/drivers/net/sfc/rx.c b/drivers/net/sfc/rx.c index b8ba4bbad88..66d7fe3db3e 100644 --- a/drivers/net/sfc/rx.c +++ b/drivers/net/sfc/rx.c @@ -99,109 +99,6 @@ static inline unsigned int efx_rx_buf_size(struct efx_nic *efx) } -/************************************************************************** - * - * Linux generic LRO handling - * - ************************************************************************** - */ - -static int efx_lro_get_skb_hdr(struct sk_buff *skb, void **ip_hdr, - void **tcpudp_hdr, u64 *hdr_flags, void *priv) -{ - struct efx_channel *channel = priv; - struct iphdr *iph; - struct tcphdr *th; - - iph = (struct iphdr *)skb->data; - if (skb->protocol != htons(ETH_P_IP) || iph->protocol != IPPROTO_TCP) - goto fail; - - th = (struct tcphdr *)(skb->data + iph->ihl * 4); - - *tcpudp_hdr = th; - *ip_hdr = iph; - *hdr_flags = LRO_IPV4 | LRO_TCP; - - channel->rx_alloc_level += RX_ALLOC_FACTOR_LRO; - return 0; -fail: - channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB; - return -1; -} - -static int efx_get_frag_hdr(struct skb_frag_struct *frag, void **mac_hdr, - void **ip_hdr, void **tcpudp_hdr, u64 *hdr_flags, - void *priv) -{ - struct efx_channel *channel = priv; - struct ethhdr *eh; - struct iphdr *iph; - - /* We support EtherII and VLAN encapsulated IPv4 */ - eh = page_address(frag->page) + frag->page_offset; - *mac_hdr = eh; - - if (eh->h_proto == htons(ETH_P_IP)) { - iph = (struct iphdr *)(eh + 1); - } else { - struct vlan_ethhdr *veh = (struct vlan_ethhdr *)eh; - if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP)) - goto fail; - - iph = (struct iphdr *)(veh + 1); - } - *ip_hdr = iph; - - /* We can only do LRO over TCP */ - if (iph->protocol != IPPROTO_TCP) - goto fail; - - *hdr_flags = LRO_IPV4 | LRO_TCP; - *tcpudp_hdr = (struct tcphdr *)((u8 *) iph + iph->ihl * 4); - - channel->rx_alloc_level += RX_ALLOC_FACTOR_LRO; - return 0; - fail: - channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB; - return -1; -} - -int efx_lro_init(struct net_lro_mgr *lro_mgr, struct efx_nic *efx) -{ - size_t s = sizeof(struct net_lro_desc) * EFX_MAX_LRO_DESCRIPTORS; - struct net_lro_desc *lro_arr; - - /* Allocate the LRO descriptors structure */ - lro_arr = kzalloc(s, GFP_KERNEL); - if (lro_arr == NULL) - return -ENOMEM; - - lro_mgr->lro_arr = lro_arr; - lro_mgr->max_desc = EFX_MAX_LRO_DESCRIPTORS; - lro_mgr->max_aggr = EFX_MAX_LRO_AGGR; - lro_mgr->frag_align_pad = EFX_PAGE_SKB_ALIGN; - - lro_mgr->get_skb_header = efx_lro_get_skb_hdr; - lro_mgr->get_frag_header = efx_get_frag_hdr; - lro_mgr->dev = efx->net_dev; - - lro_mgr->features = LRO_F_NAPI; - - /* We can pass packets up with the checksum intact */ - lro_mgr->ip_summed = CHECKSUM_UNNECESSARY; - - lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY; - - return 0; -} - -void efx_lro_fini(struct net_lro_mgr *lro_mgr) -{ - kfree(lro_mgr->lro_arr); - lro_mgr->lro_arr = NULL; -} - /** * efx_init_rx_buffer_skb - create new RX buffer using skb-based allocation * @@ -549,77 +446,31 @@ static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue, static void efx_rx_packet_lro(struct efx_channel *channel, struct efx_rx_buffer *rx_buf) { - struct net_lro_mgr *lro_mgr = &channel->lro_mgr; - void *priv = channel; + struct napi_struct *napi = &channel->napi_str; /* Pass the skb/page into the LRO engine */ if (rx_buf->page) { - struct skb_frag_struct frags; + struct napi_gro_fraginfo info; - frags.page = rx_buf->page; - frags.page_offset = efx_rx_buf_offset(rx_buf); - frags.size = rx_buf->len; + info.frags[0].page = rx_buf->page; + info.frags[0].page_offset = efx_rx_buf_offset(rx_buf); + info.frags[0].size = rx_buf->len; + info.nr_frags = 1; + info.ip_summed = CHECKSUM_UNNECESSARY; + info.len = rx_buf->len; - lro_receive_frags(lro_mgr, &frags, rx_buf->len, - rx_buf->len, priv, 0); + napi_gro_frags(napi, &info); EFX_BUG_ON_PARANOID(rx_buf->skb); rx_buf->page = NULL; } else { EFX_BUG_ON_PARANOID(!rx_buf->skb); - lro_receive_skb(lro_mgr, rx_buf->skb, priv); + napi_gro_receive(napi, rx_buf->skb); rx_buf->skb = NULL; } } -/* Allocate and construct an SKB around a struct page.*/ -static struct sk_buff *efx_rx_mk_skb(struct efx_rx_buffer *rx_buf, - struct efx_nic *efx, - int hdr_len) -{ - struct sk_buff *skb; - - /* Allocate an SKB to store the headers */ - skb = netdev_alloc_skb(efx->net_dev, hdr_len + EFX_PAGE_SKB_ALIGN); - if (unlikely(skb == NULL)) { - EFX_ERR_RL(efx, "RX out of memory for skb\n"); - return NULL; - } - - EFX_BUG_ON_PARANOID(skb_shinfo(skb)->nr_frags); - EFX_BUG_ON_PARANOID(rx_buf->len < hdr_len); - - skb->ip_summed = CHECKSUM_UNNECESSARY; - skb_reserve(skb, EFX_PAGE_SKB_ALIGN); - - skb->len = rx_buf->len; - skb->truesize = rx_buf->len + sizeof(struct sk_buff); - memcpy(skb->data, rx_buf->data, hdr_len); - skb->tail += hdr_len; - - /* Append the remaining page onto the frag list */ - if (unlikely(rx_buf->len > hdr_len)) { - struct skb_frag_struct *frag = skb_shinfo(skb)->frags; - frag->page = rx_buf->page; - frag->page_offset = efx_rx_buf_offset(rx_buf) + hdr_len; - frag->size = skb->len - hdr_len; - skb_shinfo(skb)->nr_frags = 1; - skb->data_len = frag->size; - } else { - __free_pages(rx_buf->page, efx->rx_buffer_order); - skb->data_len = 0; - } - - /* Ownership has transferred from the rx_buf to skb */ - rx_buf->page = NULL; - - /* Move past the ethernet header */ - skb->protocol = eth_type_trans(skb, efx->net_dev); - - return skb; -} - void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index, unsigned int len, bool checksummed, bool discard) { @@ -687,7 +538,6 @@ void __efx_rx_packet(struct efx_channel *channel, { struct efx_nic *efx = channel->efx; struct sk_buff *skb; - bool lro = !!(efx->net_dev->features & NETIF_F_LRO); /* If we're in loopback test, then pass the packet directly to the * loopback layer, and free the rx_buf here @@ -709,41 +559,23 @@ void __efx_rx_packet(struct efx_channel *channel, efx->net_dev); } - /* Both our generic-LRO and SFC-SSR support skb and page based - * allocation, but neither support switching from one to the - * other on the fly. If we spot that the allocation mode has - * changed, then flush the LRO state. - */ - if (unlikely(channel->rx_alloc_pop_pages != (rx_buf->page != NULL))) { - efx_flush_lro(channel); - channel->rx_alloc_pop_pages = (rx_buf->page != NULL); - } - if (likely(checksummed && lro)) { + if (likely(checksummed || rx_buf->page)) { efx_rx_packet_lro(channel, rx_buf); goto done; } - /* Form an skb if required */ - if (rx_buf->page) { - int hdr_len = min(rx_buf->len, EFX_SKB_HEADERS); - skb = efx_rx_mk_skb(rx_buf, efx, hdr_len); - if (unlikely(skb == NULL)) { - efx_free_rx_buffer(efx, rx_buf); - goto done; - } - } else { - /* We now own the SKB */ - skb = rx_buf->skb; - rx_buf->skb = NULL; - } + /* We now own the SKB */ + skb = rx_buf->skb; + rx_buf->skb = NULL; EFX_BUG_ON_PARANOID(rx_buf->page); EFX_BUG_ON_PARANOID(rx_buf->skb); EFX_BUG_ON_PARANOID(!skb); /* Set the SKB flags */ - if (unlikely(!checksummed || !efx->rx_checksum_enabled)) - skb->ip_summed = CHECKSUM_NONE; + skb->ip_summed = CHECKSUM_NONE; + + skb_record_rx_queue(skb, channel->channel); /* Pass the packet up */ netif_receive_skb(skb); @@ -760,7 +592,7 @@ void efx_rx_strategy(struct efx_channel *channel) enum efx_rx_alloc_method method = rx_alloc_method; /* Only makes sense to use page based allocation if LRO is enabled */ - if (!(channel->efx->net_dev->features & NETIF_F_LRO)) { + if (!(channel->efx->net_dev->features & NETIF_F_GRO)) { method = RX_ALLOC_METHOD_SKB; } else if (method == RX_ALLOC_METHOD_AUTO) { /* Constrain the rx_alloc_level */ @@ -865,11 +697,6 @@ void efx_remove_rx_queue(struct efx_rx_queue *rx_queue) rx_queue->buffer = NULL; } -void efx_flush_lro(struct efx_channel *channel) -{ - lro_flush_all(&channel->lro_mgr); -} - module_param(rx_alloc_method, int, 0644); MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers"); diff --git a/drivers/net/sfc/rx.h b/drivers/net/sfc/rx.h index 0e88a9ddc1c..42ee7555a80 100644 --- a/drivers/net/sfc/rx.h +++ b/drivers/net/sfc/rx.h @@ -17,9 +17,6 @@ void efx_remove_rx_queue(struct efx_rx_queue *rx_queue); void efx_init_rx_queue(struct efx_rx_queue *rx_queue); void efx_fini_rx_queue(struct efx_rx_queue *rx_queue); -int efx_lro_init(struct net_lro_mgr *lro_mgr, struct efx_nic *efx); -void efx_lro_fini(struct net_lro_mgr *lro_mgr); -void efx_flush_lro(struct efx_channel *channel); void efx_rx_strategy(struct efx_channel *channel); void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue); void efx_rx_work(struct work_struct *data); diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c index cb25ae5b257..4eac5da81e5 100644 --- a/drivers/net/sfc/sfe4001.c +++ b/drivers/net/sfc/sfe4001.c @@ -24,6 +24,7 @@ */ #include <linux/delay.h> +#include <linux/rtnetlink.h> #include "net_driver.h" #include "efx.h" #include "phy.h" @@ -398,6 +399,7 @@ static struct i2c_board_info sfn4111t_r5_hwmon_info = { int sfn4111t_init(struct efx_nic *efx) { + int i = 0; int rc; efx->board_info.hwmon_client = @@ -416,13 +418,20 @@ int sfn4111t_init(struct efx_nic *efx) if (rc) goto fail_hwmon; - if (efx->phy_mode & PHY_MODE_SPECIAL) { - efx_stats_disable(efx); - sfn4111t_reset(efx); - } - - return 0; + do { + if (efx->phy_mode & PHY_MODE_SPECIAL) { + /* PHY may not generate a 156.25 MHz clock and MAC + * stats fetch will fail. */ + efx_stats_disable(efx); + sfn4111t_reset(efx); + } + rc = sft9001_wait_boot(efx); + if (rc == 0) + return 0; + efx->phy_mode = PHY_MODE_SPECIAL; + } while (rc == -EINVAL && ++i < 2); + device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg); fail_hwmon: i2c_unregister_device(efx->board_info.hwmon_client); return rc; diff --git a/drivers/net/sfc/tenxpress.c b/drivers/net/sfc/tenxpress.c index f0efd246962..e61dc4d4741 100644 --- a/drivers/net/sfc/tenxpress.c +++ b/drivers/net/sfc/tenxpress.c @@ -8,6 +8,7 @@ */ #include <linux/delay.h> +#include <linux/rtnetlink.h> #include <linux/seq_file.h> #include "efx.h" #include "mdio_10g.h" @@ -157,14 +158,16 @@ #define PCS_10GBASET_BLKLK_WIDTH 1 /* Boot status register */ -#define PCS_BOOT_STATUS_REG 53248 -#define PCS_BOOT_FATAL_ERR_LBN (0) -#define PCS_BOOT_PROGRESS_LBN (1) -#define PCS_BOOT_PROGRESS_WIDTH (2) -#define PCS_BOOT_COMPLETE_LBN (3) - -#define PCS_BOOT_MAX_DELAY (100) -#define PCS_BOOT_POLL_DELAY (10) +#define PCS_BOOT_STATUS_REG 53248 +#define PCS_BOOT_FATAL_ERROR_LBN 0 +#define PCS_BOOT_PROGRESS_LBN 1 +#define PCS_BOOT_PROGRESS_WIDTH 2 +#define PCS_BOOT_PROGRESS_INIT 0 +#define PCS_BOOT_PROGRESS_WAIT_MDIO 1 +#define PCS_BOOT_PROGRESS_CHECKSUM 2 +#define PCS_BOOT_PROGRESS_JUMP 3 +#define PCS_BOOT_DOWNLOAD_WAIT_LBN 3 +#define PCS_BOOT_CODE_STARTED_LBN 4 /* 100M/1G PHY registers */ #define GPHY_XCONTROL_REG 49152 @@ -229,40 +232,62 @@ static ssize_t set_phy_short_reach(struct device *dev, static DEVICE_ATTR(phy_short_reach, 0644, show_phy_short_reach, set_phy_short_reach); -/* Check that the C166 has booted successfully */ -static int tenxpress_phy_check(struct efx_nic *efx) +int sft9001_wait_boot(struct efx_nic *efx) { - int phy_id = efx->mii.phy_id; - int count = PCS_BOOT_MAX_DELAY / PCS_BOOT_POLL_DELAY; + unsigned long timeout = jiffies + HZ + 1; int boot_stat; - /* Wait for the boot to complete (or not) */ - while (count) { - boot_stat = mdio_clause45_read(efx, phy_id, + for (;;) { + boot_stat = mdio_clause45_read(efx, efx->mii.phy_id, MDIO_MMD_PCS, PCS_BOOT_STATUS_REG); - if (boot_stat & (1 << PCS_BOOT_COMPLETE_LBN)) - break; - count--; - udelay(PCS_BOOT_POLL_DELAY); - } + if (boot_stat >= 0) { + EFX_LOG(efx, "PHY boot status = %#x\n", boot_stat); + switch (boot_stat & + ((1 << PCS_BOOT_FATAL_ERROR_LBN) | + (3 << PCS_BOOT_PROGRESS_LBN) | + (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) | + (1 << PCS_BOOT_CODE_STARTED_LBN))) { + case ((1 << PCS_BOOT_FATAL_ERROR_LBN) | + (PCS_BOOT_PROGRESS_CHECKSUM << + PCS_BOOT_PROGRESS_LBN)): + case ((1 << PCS_BOOT_FATAL_ERROR_LBN) | + (PCS_BOOT_PROGRESS_INIT << + PCS_BOOT_PROGRESS_LBN) | + (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)): + return -EINVAL; + case ((PCS_BOOT_PROGRESS_WAIT_MDIO << + PCS_BOOT_PROGRESS_LBN) | + (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN)): + return (efx->phy_mode & PHY_MODE_SPECIAL) ? + 0 : -EIO; + case ((PCS_BOOT_PROGRESS_JUMP << + PCS_BOOT_PROGRESS_LBN) | + (1 << PCS_BOOT_CODE_STARTED_LBN)): + case ((PCS_BOOT_PROGRESS_JUMP << + PCS_BOOT_PROGRESS_LBN) | + (1 << PCS_BOOT_DOWNLOAD_WAIT_LBN) | + (1 << PCS_BOOT_CODE_STARTED_LBN)): + return (efx->phy_mode & PHY_MODE_SPECIAL) ? + -EIO : 0; + default: + if (boot_stat & (1 << PCS_BOOT_FATAL_ERROR_LBN)) + return -EIO; + break; + } + } - if (!count) { - EFX_ERR(efx, "%s: PHY boot timed out. Last status " - "%x\n", __func__, - (boot_stat >> PCS_BOOT_PROGRESS_LBN) & - ((1 << PCS_BOOT_PROGRESS_WIDTH) - 1)); - return -ETIMEDOUT; - } + if (time_after_eq(jiffies, timeout)) + return -ETIMEDOUT; - return 0; + msleep(50); + } } static int tenxpress_init(struct efx_nic *efx) { int phy_id = efx->mii.phy_id; int reg; - int rc; if (efx->phy_type == PHY_TYPE_SFX7101) { /* Enable 312.5 MHz clock */ @@ -285,10 +310,6 @@ static int tenxpress_init(struct efx_nic *efx) false); } - rc = tenxpress_phy_check(efx); - if (rc < 0) - return rc; - /* Set the LEDs up as: Green = Link, Amber = Link/Act, Red = Off */ if (efx->phy_type == PHY_TYPE_SFX7101) { mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_PMAPMD, @@ -299,7 +320,7 @@ static int tenxpress_init(struct efx_nic *efx) PMA_PMD_LED_OVERR_REG, PMA_PMD_LED_DEFAULT); } - return rc; + return 0; } static int tenxpress_phy_init(struct efx_nic *efx) @@ -571,15 +592,14 @@ static void tenxpress_phy_reconfigure(struct efx_nic *efx) static void tenxpress_phy_poll(struct efx_nic *efx) { struct tenxpress_phy_data *phy_data = efx->phy_data; - bool change = false, link_ok; - unsigned link_fc; + bool change = false; if (efx->phy_type == PHY_TYPE_SFX7101) { - link_ok = sfx7101_link_ok(efx); + bool link_ok = sfx7101_link_ok(efx); if (link_ok != efx->link_up) { change = true; } else { - link_fc = mdio_clause45_get_pause(efx); + unsigned int link_fc = mdio_clause45_get_pause(efx); if (link_fc != efx->link_fc) change = true; } @@ -679,12 +699,10 @@ static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags) { struct ethtool_cmd ecmd; int phy_id = efx->mii.phy_id; - int rc = 0, rc2, i, res_reg; - - if (!(flags & ETH_TEST_FL_OFFLINE)) - return 0; + int rc = 0, rc2, i, ctrl_reg, res_reg; - efx->phy_op->get_settings(efx, &ecmd); + if (flags & ETH_TEST_FL_OFFLINE) + efx->phy_op->get_settings(efx, &ecmd); /* Initialise cable diagnostic results to unknown failure */ for (i = 1; i < 9; ++i) @@ -692,18 +710,22 @@ static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags) /* Run cable diagnostics; wait up to 5 seconds for them to complete. * A cable fault is not a self-test failure, but a timeout is. */ + ctrl_reg = ((1 << CDIAG_CTRL_IMMED_LBN) | + (CDIAG_CTRL_LEN_METRES << CDIAG_CTRL_LEN_UNIT_LBN)); + if (flags & ETH_TEST_FL_OFFLINE) { + /* Break the link in order to run full diagnostics. We + * must reset the PHY to resume normal service. */ + ctrl_reg |= (1 << CDIAG_CTRL_BRK_LINK_LBN); + } mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD, - PMA_PMD_CDIAG_CTRL_REG, - (1 << CDIAG_CTRL_IMMED_LBN) | - (1 << CDIAG_CTRL_BRK_LINK_LBN) | - (CDIAG_CTRL_LEN_METRES << CDIAG_CTRL_LEN_UNIT_LBN)); + PMA_PMD_CDIAG_CTRL_REG, ctrl_reg); i = 0; while (mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD, PMA_PMD_CDIAG_CTRL_REG) & (1 << CDIAG_CTRL_IN_PROG_LBN)) { if (++i == 50) { rc = -ETIMEDOUT; - goto reset; + goto out; } msleep(100); } @@ -728,17 +750,18 @@ static int sft9001_run_tests(struct efx_nic *efx, int *results, unsigned flags) results[5 + i] = len_reg; } - /* We must reset to exit cable diagnostic mode. The BIST will - * also run when we do this. */ -reset: - rc2 = tenxpress_special_reset(efx); - results[0] = rc2 ? -1 : 1; - if (!rc) - rc = rc2; - - rc2 = efx->phy_op->set_settings(efx, &ecmd); - if (!rc) - rc = rc2; +out: + if (flags & ETH_TEST_FL_OFFLINE) { + /* Reset, running the BIST and then resuming normal service. */ + rc2 = tenxpress_special_reset(efx); + results[0] = rc2 ? -1 : 1; + if (!rc) + rc = rc2; + + rc2 = efx->phy_op->set_settings(efx, &ecmd); + if (!rc) + rc = rc2; + } return rc; } diff --git a/drivers/net/sfc/tx.c b/drivers/net/sfc/tx.c index da3e9ff339f..d6681edb701 100644 --- a/drivers/net/sfc/tx.c +++ b/drivers/net/sfc/tx.c @@ -162,6 +162,14 @@ static int efx_enqueue_skb(struct efx_tx_queue *tx_queue, /* Get size of the initial fragment */ len = skb_headlen(skb); + /* Pad if necessary */ + if (EFX_WORKAROUND_15592(efx) && skb->len <= 32) { + EFX_BUG_ON_PARANOID(skb->data_len); + len = 32 + 1; + if (skb_pad(skb, len - skb->len)) + return NETDEV_TX_OK; + } + fill_level = tx_queue->insert_count - tx_queue->old_read_count; q_space = efx->type->txd_ring_mask - 1 - fill_level; @@ -376,6 +384,9 @@ int efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev) struct efx_nic *efx = netdev_priv(net_dev); struct efx_tx_queue *tx_queue; + if (unlikely(efx->port_inhibited)) + return NETDEV_TX_BUSY; + if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) tx_queue = &efx->tx_queue[EFX_TX_QUEUE_OFFLOAD_CSUM]; else @@ -397,7 +408,7 @@ void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index) * separates the update of read_count from the test of * stopped. */ smp_mb(); - if (unlikely(tx_queue->stopped)) { + if (unlikely(tx_queue->stopped) && likely(efx->port_enabled)) { fill_level = tx_queue->insert_count - tx_queue->read_count; if (fill_level < EFX_NETDEV_TX_THRESHOLD(tx_queue)) { EFX_BUG_ON_PARANOID(!efx_dev_registered(efx)); diff --git a/drivers/net/sfc/workarounds.h b/drivers/net/sfc/workarounds.h index 78de68f4a95..c821c15445a 100644 --- a/drivers/net/sfc/workarounds.h +++ b/drivers/net/sfc/workarounds.h @@ -36,6 +36,8 @@ #define EFX_WORKAROUND_11482 EFX_WORKAROUND_ALWAYS /* Flush events can take a very long time to appear */ #define EFX_WORKAROUND_11557 EFX_WORKAROUND_ALWAYS +/* Truncated IPv4 packets can confuse the TX packet parser */ +#define EFX_WORKAROUND_15592 EFX_WORKAROUND_ALWAYS /* Spurious parity errors in TSORT buffers */ #define EFX_WORKAROUND_5129 EFX_WORKAROUND_FALCON_A diff --git a/drivers/net/sfc/xfp_phy.c b/drivers/net/sfc/xfp_phy.c index 2d50b6ecf5f..bb1ef77d5f5 100644 --- a/drivers/net/sfc/xfp_phy.c +++ b/drivers/net/sfc/xfp_phy.c @@ -7,8 +7,8 @@ * by the Free Software Foundation, incorporated herein by reference. */ /* - * Driver for XFP optical PHYs (plus some support specific to the Quake 2022/32) - * See www.amcc.com for details (search for qt2032) + * Driver for SFP+ and XFP optical PHYs plus some support specific to the + * AMCC QT20xx adapters; see www.amcc.com for details */ #include <linux/timer.h> @@ -31,6 +31,21 @@ /* Quake-specific MDIO registers */ #define MDIO_QUAKE_LED0_REG (0xD006) +/* QT2025C only */ +#define PCS_FW_HEARTBEAT_REG 0xd7ee +#define PCS_FW_HEARTB_LBN 0 +#define PCS_FW_HEARTB_WIDTH 8 +#define PCS_UC8051_STATUS_REG 0xd7fd +#define PCS_UC_STATUS_LBN 0 +#define PCS_UC_STATUS_WIDTH 8 +#define PCS_UC_STATUS_FW_SAVE 0x20 +#define PMA_PMD_FTX_CTRL2_REG 0xc309 +#define PMA_PMD_FTX_STATIC_LBN 13 +#define PMA_PMD_VEND1_REG 0xc001 +#define PMA_PMD_VEND1_LBTXD_LBN 15 +#define PCS_VEND1_REG 0xc000 +#define PCS_VEND1_LBTXD_LBN 5 + void xfp_set_led(struct efx_nic *p, int led, int mode) { int addr = MDIO_QUAKE_LED0_REG + led; @@ -45,7 +60,49 @@ struct xfp_phy_data { #define XFP_MAX_RESET_TIME 500 #define XFP_RESET_WAIT 10 -/* Reset the PHYXS MMD. This is documented (for the Quake PHY) as doing +static int qt2025c_wait_reset(struct efx_nic *efx) +{ + unsigned long timeout = jiffies + 10 * HZ; + int phy_id = efx->mii.phy_id; + int reg, old_counter = 0; + + /* Wait for firmware heartbeat to start */ + for (;;) { + int counter; + reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PCS, + PCS_FW_HEARTBEAT_REG); + if (reg < 0) + return reg; + counter = ((reg >> PCS_FW_HEARTB_LBN) & + ((1 << PCS_FW_HEARTB_WIDTH) - 1)); + if (old_counter == 0) + old_counter = counter; + else if (counter != old_counter) + break; + if (time_after(jiffies, timeout)) + return -ETIMEDOUT; + msleep(10); + } + + /* Wait for firmware status to look good */ + for (;;) { + reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PCS, + PCS_UC8051_STATUS_REG); + if (reg < 0) + return reg; + if ((reg & + ((1 << PCS_UC_STATUS_WIDTH) - 1) << PCS_UC_STATUS_LBN) >= + PCS_UC_STATUS_FW_SAVE) + break; + if (time_after(jiffies, timeout)) + return -ETIMEDOUT; + msleep(100); + } + + return 0; +} + +/* Reset the PHYXS MMD. This is documented (for the Quake PHYs) as doing * a complete soft reset. */ static int xfp_reset_phy(struct efx_nic *efx) @@ -58,6 +115,12 @@ static int xfp_reset_phy(struct efx_nic *efx) if (rc < 0) goto fail; + if (efx->phy_type == PHY_TYPE_QT2025C) { + rc = qt2025c_wait_reset(efx); + if (rc < 0) + goto fail; + } + /* Wait 250ms for the PHY to complete bootup */ msleep(250); @@ -73,7 +136,7 @@ static int xfp_reset_phy(struct efx_nic *efx) return rc; fail: - EFX_ERR(efx, "XFP: reset timed out!\n"); + EFX_ERR(efx, "PHY reset timed out\n"); return rc; } @@ -88,15 +151,15 @@ static int xfp_phy_init(struct efx_nic *efx) return -ENOMEM; efx->phy_data = phy_data; - EFX_INFO(efx, "XFP: PHY ID reg %x (OUI %x model %x revision" - " %x)\n", devid, MDIO_ID_OUI(devid), MDIO_ID_MODEL(devid), - MDIO_ID_REV(devid)); + EFX_INFO(efx, "PHY ID reg %x (OUI %06x model %02x revision %x)\n", + devid, mdio_id_oui(devid), mdio_id_model(devid), + mdio_id_rev(devid)); phy_data->phy_mode = efx->phy_mode; rc = xfp_reset_phy(efx); - EFX_INFO(efx, "XFP: PHY init %s.\n", + EFX_INFO(efx, "PHY init %s.\n", rc ? "failed" : "successful"); if (rc < 0) goto fail; @@ -131,12 +194,28 @@ static void xfp_phy_reconfigure(struct efx_nic *efx) { struct xfp_phy_data *phy_data = efx->phy_data; - /* Reset the PHY when moving from tx off to tx on */ - if (!(efx->phy_mode & PHY_MODE_TX_DISABLED) && - (phy_data->phy_mode & PHY_MODE_TX_DISABLED)) - xfp_reset_phy(efx); + if (efx->phy_type == PHY_TYPE_QT2025C) { + /* There are several different register bits which can + * disable TX (and save power) on direct-attach cables + * or optical transceivers, varying somewhat between + * firmware versions. Only 'static mode' appears to + * cover everything. */ + mdio_clause45_set_flag( + efx, efx->mii.phy_id, MDIO_MMD_PMAPMD, + PMA_PMD_FTX_CTRL2_REG, PMA_PMD_FTX_STATIC_LBN, + efx->phy_mode & PHY_MODE_TX_DISABLED || + efx->phy_mode & PHY_MODE_LOW_POWER || + efx->loopback_mode == LOOPBACK_PCS || + efx->loopback_mode == LOOPBACK_PMAPMD); + } else { + /* Reset the PHY when moving from tx off to tx on */ + if (!(efx->phy_mode & PHY_MODE_TX_DISABLED) && + (phy_data->phy_mode & PHY_MODE_TX_DISABLED)) + xfp_reset_phy(efx); + + mdio_clause45_transmit_disable(efx); + } - mdio_clause45_transmit_disable(efx); mdio_clause45_phy_reconfigure(efx); phy_data->phy_mode = efx->phy_mode; |