diff options
Diffstat (limited to 'drivers/mtd/nand')
| -rw-r--r-- | drivers/mtd/nand/Kconfig | 26 | ||||
| -rw-r--r-- | drivers/mtd/nand/au1550nd.c | 165 | ||||
| -rw-r--r-- | drivers/mtd/nand/autcpu12.c | 22 | ||||
| -rw-r--r-- | drivers/mtd/nand/diskonchip.c | 100 | ||||
| -rw-r--r-- | drivers/mtd/nand/edb7312.c | 48 | ||||
| -rw-r--r-- | drivers/mtd/nand/h1910.c | 48 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 529 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_bbt.c | 248 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_ecc.c | 44 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_ids.c | 30 | ||||
| -rw-r--r-- | drivers/mtd/nand/nandsim.c | 162 | ||||
| -rw-r--r-- | drivers/mtd/nand/ppchameleonevb.c | 6 | ||||
| -rw-r--r-- | drivers/mtd/nand/rtc_from4.c | 58 | ||||
| -rw-r--r-- | drivers/mtd/nand/s3c2410.c | 61 | ||||
| -rw-r--r-- | drivers/mtd/nand/sharpsl.c | 41 | ||||
| -rw-r--r-- | drivers/mtd/nand/spia.c | 6 | ||||
| -rw-r--r-- | drivers/mtd/nand/toto.c | 20 |
17 files changed, 849 insertions, 765 deletions
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 36d34e5e5a5..1fc4c134d93 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -1,5 +1,5 @@ # drivers/mtd/nand/Kconfig -# $Id: Kconfig,v 1.31 2005/06/20 12:03:21 bjd Exp $ +# $Id: Kconfig,v 1.35 2005/11/07 11:14:30 gleixner Exp $ menu "NAND Flash Device Drivers" depends on MTD!=n @@ -25,33 +25,33 @@ config MTD_NAND_VERIFY_WRITE config MTD_NAND_AUTCPU12 tristate "SmartMediaCard on autronix autcpu12 board" - depends on ARM && MTD_NAND && ARCH_AUTCPU12 + depends on MTD_NAND && ARCH_AUTCPU12 help - This enables the driver for the autronix autcpu12 board to + This enables the driver for the autronix autcpu12 board to access the SmartMediaCard. config MTD_NAND_EDB7312 tristate "Support for Cirrus Logic EBD7312 evaluation board" - depends on ARM && MTD_NAND && ARCH_EDB7312 + depends on MTD_NAND && ARCH_EDB7312 help - This enables the driver for the Cirrus Logic EBD7312 evaluation + This enables the driver for the Cirrus Logic EBD7312 evaluation board to access the onboard NAND Flash. config MTD_NAND_H1900 tristate "iPAQ H1900 flash" - depends on ARM && MTD_NAND && ARCH_PXA && MTD_PARTITIONS + depends on MTD_NAND && ARCH_PXA && MTD_PARTITIONS help This enables the driver for the iPAQ h1900 flash. config MTD_NAND_SPIA tristate "NAND Flash device on SPIA board" - depends on ARM && ARCH_P720T && MTD_NAND + depends on ARCH_P720T && MTD_NAND help If you had to ask, you don't have one. Say 'N'. config MTD_NAND_TOTO tristate "NAND Flash device on TOTO board" - depends on ARM && ARCH_OMAP && MTD_NAND + depends on ARCH_OMAP && MTD_NAND help Support for NAND flash on Texas Instruments Toto platform. @@ -59,8 +59,8 @@ config MTD_NAND_IDS tristate config MTD_NAND_AU1550 - tristate "Au1550 NAND support" - depends on SOC_AU1550 && MTD_NAND + tristate "Au1550/1200 NAND support" + depends on (SOC_AU1200 || SOC_AU1550) && MTD_NAND help This enables the driver for the NAND flash controller on the AMD/Alchemy 1550 SOC. @@ -71,7 +71,7 @@ config MTD_NAND_RTC_FROM4 select REED_SOLOMON select REED_SOLOMON_DEC8 help - This enables the driver for the Renesas Technology AG-AND + This enables the driver for the Renesas Technology AG-AND flash interface board (FROM_BOARD4) config MTD_NAND_PPCHAMELEONEVB @@ -88,7 +88,7 @@ config MTD_NAND_S3C2410 SoCs No board specfic support is done by this driver, each board - must advertise a platform_device for the driver to attach. + must advertise a platform_device for the driver to attach. config MTD_NAND_S3C2410_DEBUG bool "S3C2410 NAND driver debug" @@ -181,7 +181,7 @@ config MTD_NAND_DISKONCHIP_BBTWRITE config MTD_NAND_SHARPSL bool "Support for NAND Flash on Sharp SL Series (C7xx + others)" - depends on MTD_NAND && ARCH_PXA + depends on MTD_NAND && ARCH_PXA config MTD_NAND_NANDSIM bool "Support for NAND Flash Simulator" diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c index 4c7719ce3f4..3cafcdf28ae 100644 --- a/drivers/mtd/nand/au1550nd.c +++ b/drivers/mtd/nand/au1550nd.c @@ -3,7 +3,7 @@ * * Copyright (C) 2004 Embedded Edge, LLC * - * $Id: au1550nd.c,v 1.11 2004/11/04 12:53:10 gleixner Exp $ + * $Id: au1550nd.c,v 1.13 2005/11/07 11:14:30 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -21,20 +21,14 @@ /* fixme: this is ugly */ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 0) -#include <asm/mach-au1x00/au1000.h> -#ifdef CONFIG_MIPS_PB1550 -#include <asm/mach-pb1x00/pb1550.h> -#endif -#ifdef CONFIG_MIPS_DB1550 -#include <asm/mach-db1x00/db1x00.h> -#endif +#include <asm/mach-au1x00/au1xxx.h> #else #include <asm/au1000.h> #ifdef CONFIG_MIPS_PB1550 -#include <asm/pb1550.h> +#include <asm/pb1550.h> #endif #ifdef CONFIG_MIPS_DB1550 -#include <asm/db1x00.h> +#include <asm/db1x00.h> #endif #endif @@ -45,39 +39,22 @@ static struct mtd_info *au1550_mtd = NULL; static void __iomem *p_nand; static int nand_width = 1; /* default x8*/ -#define NAND_CS 1 - /* * Define partitions for flash device */ const static struct mtd_partition partition_info[] = { -#ifdef CONFIG_MIPS_PB1550 -#define NUM_PARTITIONS 2 - { - .name = "Pb1550 NAND FS 0", + { + .name = "NAND FS 0", .offset = 0, - .size = 8*1024*1024 + .size = 8*1024*1024 }, - { - .name = "Pb1550 NAND FS 1", + { + .name = "NAND FS 1", .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL + .size = MTDPART_SIZ_FULL } -#endif -#ifdef CONFIG_MIPS_DB1550 -#define NUM_PARTITIONS 2 - { - .name = "Db1550 NAND FS 0", - .offset = 0, - .size = 8*1024*1024 - }, - { - .name = "Db1550 NAND FS 1", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL - } -#endif }; +#define NB_OF(x) (sizeof(x)/sizeof(x[0])) /** @@ -112,7 +89,7 @@ static void au_write_byte(struct mtd_info *mtd, u_char byte) * au_read_byte16 - read one byte endianess aware from the chip * @mtd: MTD device structure * - * read function for 16bit buswith with + * read function for 16bit buswith with * endianess conversion */ static u_char au_read_byte16(struct mtd_info *mtd) @@ -142,7 +119,7 @@ static void au_write_byte16(struct mtd_info *mtd, u_char byte) * au_read_word - read one word from the chip * @mtd: MTD device structure * - * read function for 16bit buswith without + * read function for 16bit buswith without * endianess conversion */ static u16 au_read_word(struct mtd_info *mtd) @@ -158,7 +135,7 @@ static u16 au_read_word(struct mtd_info *mtd) * @mtd: MTD device structure * @word: data word to write * - * write function for 16bit buswith without + * write function for 16bit buswith without * endianess conversion */ static void au_write_word(struct mtd_info *mtd, u16 word) @@ -188,7 +165,7 @@ static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len) } /** - * au_read_buf - read chip data into buffer + * au_read_buf - read chip data into buffer * @mtd: MTD device structure * @buf: buffer to store date * @len: number of bytes to read @@ -202,12 +179,12 @@ static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len) for (i=0; i<len; i++) { buf[i] = readb(this->IO_ADDR_R); - au_sync(); + au_sync(); } } /** - * au_verify_buf - Verify chip data against buffer + * au_verify_buf - Verify chip data against buffer * @mtd: MTD device structure * @buf: buffer containing the data to compare * @len: number of bytes to compare @@ -242,16 +219,16 @@ static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len) struct nand_chip *this = mtd->priv; u16 *p = (u16 *) buf; len >>= 1; - + for (i=0; i<len; i++) { writew(p[i], this->IO_ADDR_W); au_sync(); } - + } /** - * au_read_buf16 - read chip data into buffer + * au_read_buf16 - read chip data into buffer * @mtd: MTD device structure * @buf: buffer to store date * @len: number of bytes to read @@ -272,7 +249,7 @@ static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len) } /** - * au_verify_buf16 - Verify chip data against buffer + * au_verify_buf16 - Verify chip data against buffer * @mtd: MTD device structure * @buf: buffer containing the data to compare * @len: number of bytes to compare @@ -305,26 +282,26 @@ static void au1550_hwcontrol(struct mtd_info *mtd, int cmd) case NAND_CTL_CLRCLE: this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; break; case NAND_CTL_SETALE: this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; break; - case NAND_CTL_CLRALE: - this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; - /* FIXME: Nobody knows why this is neccecary, + case NAND_CTL_CLRALE: + this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; + /* FIXME: Nobody knows why this is neccecary, * but it works only that way */ - udelay(1); + udelay(1); break; - case NAND_CTL_SETNCE: + case NAND_CTL_SETNCE: /* assert (force assert) chip enable */ au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break; break; - case NAND_CTL_CLRNCE: + case NAND_CTL_CLRNCE: /* deassert chip enable */ au_writel(0, MEM_STNDCTL); break; break; } this->IO_ADDR_R = this->IO_ADDR_W; - + /* Drain the writebuffer */ au_sync(); } @@ -339,14 +316,16 @@ int au1550_device_ready(struct mtd_info *mtd) /* * Main initialization routine */ -int __init au1550_init (void) +int __init au1xxx_nand_init (void) { struct nand_chip *this; u16 boot_swapboot = 0; /* default value */ int retval; + u32 mem_staddr; + u32 nand_phys; /* Allocate memory for MTD device structure and private data */ - au1550_mtd = kmalloc (sizeof(struct mtd_info) + + au1550_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip), GFP_KERNEL); if (!au1550_mtd) { printk ("Unable to allocate NAND MTD dev structure.\n"); @@ -364,14 +343,17 @@ int __init au1550_init (void) au1550_mtd->priv = this; - /* MEM_STNDCTL: disable ints, disable nand boot */ - au_writel(0, MEM_STNDCTL); + /* disable interrupts */ + au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL); + + /* disable NAND boot */ + au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL); #ifdef CONFIG_MIPS_PB1550 /* set gpio206 high */ au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR); - boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) | + boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) | ((bcsr->status >> 6) & 0x1); switch (boot_swapboot) { case 0: @@ -397,25 +379,66 @@ int __init au1550_init (void) } #endif - /* Configure RCE1 - should be done by YAMON */ - au_writel(0x5 | (nand_width << 22), 0xB4001010); /* MEM_STCFG1 */ - au_writel(NAND_TIMING, 0xB4001014); /* MEM_STTIME1 */ - au_sync(); + /* Configure chip-select; normally done by boot code, e.g. YAMON */ +#ifdef NAND_STCFG + if (NAND_CS == 0) { + au_writel(NAND_STCFG, MEM_STCFG0); + au_writel(NAND_STTIME, MEM_STTIME0); + au_writel(NAND_STADDR, MEM_STADDR0); + } + if (NAND_CS == 1) { + au_writel(NAND_STCFG, MEM_STCFG1); + au_writel(NAND_STTIME, MEM_STTIME1); + au_writel(NAND_STADDR, MEM_STADDR1); + } + if (NAND_CS == 2) { + au_writel(NAND_STCFG, MEM_STCFG2); + au_writel(NAND_STTIME, MEM_STTIME2); + au_writel(NAND_STADDR, MEM_STADDR2); + } + if (NAND_CS == 3) { + au_writel(NAND_STCFG, MEM_STCFG3); + au_writel(NAND_STTIME, MEM_STTIME3); + au_writel(NAND_STADDR, MEM_STADDR3); + } +#endif - /* setup and enable chip select, MEM_STADDR1 */ - /* we really need to decode offsets only up till 0x20 */ - au_writel((1<<28) | (NAND_PHYS_ADDR>>4) | - (((NAND_PHYS_ADDR + 0x1000)-1) & (0x3fff<<18)>>18), - MEM_STADDR1); - au_sync(); + /* Locate NAND chip-select in order to determine NAND phys address */ + mem_staddr = 0x00000000; + if (((au_readl(MEM_STCFG0) & 0x7) == 0x5) && (NAND_CS == 0)) + mem_staddr = au_readl(MEM_STADDR0); + else if (((au_readl(MEM_STCFG1) & 0x7) == 0x5) && (NAND_CS == 1)) + mem_staddr = au_readl(MEM_STADDR1); + else if (((au_readl(MEM_STCFG2) & 0x7) == 0x5) && (NAND_CS == 2)) + mem_staddr = au_readl(MEM_STADDR2); + else if (((au_readl(MEM_STCFG3) & 0x7) == 0x5) && (NAND_CS == 3)) + mem_staddr = au_readl(MEM_STADDR3); + + if (mem_staddr == 0x00000000) { + printk("Au1xxx NAND: ERROR WITH NAND CHIP-SELECT\n"); + kfree(au1550_mtd); + return 1; + } + nand_phys = (mem_staddr << 4) & 0xFFFC0000; + + p_nand = (void __iomem *)ioremap(nand_phys, 0x1000); + + /* make controller and MTD agree */ + if (NAND_CS == 0) + nand_width = au_readl(MEM_STCFG0) & (1<<22); + if (NAND_CS == 1) + nand_width = au_readl(MEM_STCFG1) & (1<<22); + if (NAND_CS == 2) + nand_width = au_readl(MEM_STCFG2) & (1<<22); + if (NAND_CS == 3) + nand_width = au_readl(MEM_STCFG3) & (1<<22); - p_nand = ioremap(NAND_PHYS_ADDR, 0x1000); /* Set address of hardware control function */ this->hwcontrol = au1550_hwcontrol; this->dev_ready = au1550_device_ready; /* 30 us command delay time */ - this->chip_delay = 30; + this->chip_delay = 30; this->eccmode = NAND_ECC_SOFT; this->options = NAND_NO_AUTOINCR; @@ -438,19 +461,19 @@ int __init au1550_init (void) } /* Register the partitions */ - add_mtd_partitions(au1550_mtd, partition_info, NUM_PARTITIONS); + add_mtd_partitions(au1550_mtd, partition_info, NB_OF(partition_info)); return 0; outio: iounmap ((void *)p_nand); - + outmem: kfree (au1550_mtd); return retval; } -module_init(au1550_init); +module_init(au1xxx_nand_init); /* * Clean up routine diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c index 4afa8ced05a..056dfc17a07 100644 --- a/drivers/mtd/nand/autcpu12.c +++ b/drivers/mtd/nand/autcpu12.c @@ -5,8 +5,8 @@ * * Derived from drivers/mtd/spia.c * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) - * - * $Id: autcpu12.c,v 1.22 2004/11/04 12:53:10 gleixner Exp $ + * + * $Id: autcpu12.c,v 1.23 2005/11/07 11:14:30 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -14,7 +14,7 @@ * * Overview: * This is a device driver for the NAND flash device found on the - * autronix autcpu12 board, which is a SmartMediaCard. It supports + * autronix autcpu12 board, which is a SmartMediaCard. It supports * 16MiB, 32MiB and 64MiB cards. * * @@ -93,7 +93,7 @@ static struct mtd_partition partition_info128k[] = { #define NUM_PARTITIONS32K 2 #define NUM_PARTITIONS64K 2 #define NUM_PARTITIONS128K 2 -/* +/* * hardware specific access to control-lines */ static void autcpu12_hwcontrol(struct mtd_info *mtd, int cmd) @@ -163,7 +163,7 @@ int __init autcpu12_init (void) this->hwcontrol = autcpu12_hwcontrol; this->dev_ready = autcpu12_device_ready; /* 20 us command delay time */ - this->chip_delay = 20; + this->chip_delay = 20; this->eccmode = NAND_ECC_SOFT; /* Enable the following for a flash based bad block table */ @@ -171,21 +171,21 @@ int __init autcpu12_init (void) this->options = NAND_USE_FLASH_BBT; */ this->options = NAND_USE_FLASH_BBT; - + /* Scan to find existance of the device */ if (nand_scan (autcpu12_mtd, 1)) { err = -ENXIO; goto out_ior; } - + /* Register the partitions */ switch(autcpu12_mtd->size){ case SZ_16M: add_mtd_partitions(autcpu12_mtd, partition_info16k, NUM_PARTITIONS16K); break; case SZ_32M: add_mtd_partitions(autcpu12_mtd, partition_info32k, NUM_PARTITIONS32K); break; - case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break; - case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break; + case SZ_64M: add_mtd_partitions(autcpu12_mtd, partition_info64k, NUM_PARTITIONS64K); break; + case SZ_128M: add_mtd_partitions(autcpu12_mtd, partition_info128k, NUM_PARTITIONS128K); break; default: { - printk ("Unsupported SmartMedia device\n"); + printk ("Unsupported SmartMedia device\n"); err = -ENXIO; goto out_ior; } @@ -213,7 +213,7 @@ static void __exit autcpu12_cleanup (void) /* unmap physical adress */ iounmap((void *)autcpu12_fio_base); - + /* Free the MTD device structure */ kfree (autcpu12_mtd); } diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c index fdb5d4ad3d5..21d4e8f4b7a 100644 --- a/drivers/mtd/nand/diskonchip.c +++ b/drivers/mtd/nand/diskonchip.c @@ -1,4 +1,4 @@ -/* +/* * drivers/mtd/nand/diskonchip.c * * (C) 2003 Red Hat, Inc. @@ -8,15 +8,15 @@ * Author: David Woodhouse <dwmw2@infradead.org> * Additional Diskonchip 2000 and Millennium support by Dan Brown <dan_brown@ieee.org> * Diskonchip Millennium Plus support by Kalev Lember <kalev@smartlink.ee> - * + * * Error correction code lifted from the old docecc code - * Author: Fabrice Bellard (fabrice.bellard@netgem.com) + * Author: Fabrice Bellard (fabrice.bellard@netgem.com) * Copyright (C) 2000 Netgem S.A. * converted to the generic Reed-Solomon library by Thomas Gleixner <tglx@linutronix.de> - * + * * Interface to generic NAND code for M-Systems DiskOnChip devices * - * $Id: diskonchip.c,v 1.54 2005/04/07 14:22:55 dbrown Exp $ + * $Id: diskonchip.c,v 1.55 2005/11/07 11:14:30 gleixner Exp $ */ #include <linux/kernel.h> @@ -42,16 +42,16 @@ static unsigned long __initdata doc_locations[] = { #if defined (__alpha__) || defined(__i386__) || defined(__x86_64__) #ifdef CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH - 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000, + 0xfffc8000, 0xfffca000, 0xfffcc000, 0xfffce000, 0xfffd0000, 0xfffd2000, 0xfffd4000, 0xfffd6000, - 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000, - 0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000, + 0xfffd8000, 0xfffda000, 0xfffdc000, 0xfffde000, + 0xfffe0000, 0xfffe2000, 0xfffe4000, 0xfffe6000, 0xfffe8000, 0xfffea000, 0xfffec000, 0xfffee000, #else /* CONFIG_MTD_DOCPROBE_HIGH */ - 0xc8000, 0xca000, 0xcc000, 0xce000, + 0xc8000, 0xca000, 0xcc000, 0xce000, 0xd0000, 0xd2000, 0xd4000, 0xd6000, - 0xd8000, 0xda000, 0xdc000, 0xde000, - 0xe0000, 0xe2000, 0xe4000, 0xe6000, + 0xd8000, 0xda000, 0xdc000, 0xde000, + 0xe0000, 0xe2000, 0xe4000, 0xe6000, 0xe8000, 0xea000, 0xec000, 0xee000, #endif /* CONFIG_MTD_DOCPROBE_HIGH */ #elif defined(__PPC__) @@ -138,7 +138,7 @@ MODULE_PARM_DESC(doc_config_location, "Physical memory address at which to probe /* the Reed Solomon control structure */ static struct rs_control *rs_decoder; -/* +/* * The HW decoder in the DoC ASIC's provides us a error syndrome, * which we must convert to a standard syndrom usable by the generic * Reed-Solomon library code. @@ -163,8 +163,8 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc) /* Initialize the syndrom buffer */ for (i = 0; i < NROOTS; i++) s[i] = ds[0]; - /* - * Evaluate + /* + * Evaluate * s[i] = ds[3]x^3 + ds[2]x^2 + ds[1]x^1 + ds[0] * where x = alpha^(FCR + i) */ @@ -188,7 +188,7 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc) if (nerr < 0) return nerr; - /* + /* * Correct the errors. The bitpositions are a bit of magic, * but they are given by the design of the de/encoder circuit * in the DoC ASIC's. @@ -205,7 +205,7 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc) can be modified since pos is even */ index = (pos >> 3) ^ 1; bitpos = pos & 7; - if ((index >= 0 && index < SECTOR_SIZE) || + if ((index >= 0 && index < SECTOR_SIZE) || index == (SECTOR_SIZE + 1)) { val = (uint8_t) (errval[i] >> (2 + bitpos)); parity ^= val; @@ -216,7 +216,7 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc) bitpos = (bitpos + 10) & 7; if (bitpos == 0) bitpos = 8; - if ((index >= 0 && index < SECTOR_SIZE) || + if ((index >= 0 && index < SECTOR_SIZE) || index == (SECTOR_SIZE + 1)) { val = (uint8_t)(errval[i] << (8 - bitpos)); parity ^= val; @@ -233,7 +233,7 @@ static void DoC_Delay(struct doc_priv *doc, unsigned short cycles) { volatile char dummy; int i; - + for (i = 0; i < cycles; i++) { if (DoC_is_Millennium(doc)) dummy = ReadDOC(doc->virtadr, NOP); @@ -242,7 +242,7 @@ static void DoC_Delay(struct doc_priv *doc, unsigned short cycles) else dummy = ReadDOC(doc->virtadr, DOCStatus); } - + } #define CDSN_CTRL_FR_B_MASK (CDSN_CTRL_FR_B0 | CDSN_CTRL_FR_B1) @@ -327,7 +327,7 @@ static u_char doc2000_read_byte(struct mtd_info *mtd) return ret; } -static void doc2000_writebuf(struct mtd_info *mtd, +static void doc2000_writebuf(struct mtd_info *mtd, const u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -343,7 +343,7 @@ static void doc2000_writebuf(struct mtd_info *mtd, if (debug) printk("\n"); } -static void doc2000_readbuf(struct mtd_info *mtd, +static void doc2000_readbuf(struct mtd_info *mtd, u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -358,7 +358,7 @@ static void doc2000_readbuf(struct mtd_info *mtd, } } -static void doc2000_readbuf_dword(struct mtd_info *mtd, +static void doc2000_readbuf_dword(struct mtd_info *mtd, u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -379,7 +379,7 @@ static void doc2000_readbuf_dword(struct mtd_info *mtd, } } -static int doc2000_verifybuf(struct mtd_info *mtd, +static int doc2000_verifybuf(struct mtd_info *mtd, const u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -406,12 +406,12 @@ static uint16_t __init doc200x_ident_chip(struct mtd_info *mtd, int nr) doc200x_hwcontrol(mtd, NAND_CTL_SETALE); this->write_byte(mtd, 0); doc200x_hwcontrol(mtd, NAND_CTL_CLRALE); - + /* We cant' use dev_ready here, but at least we wait for the - * command to complete + * command to complete */ udelay(50); - + ret = this->read_byte(mtd) << 8; ret |= this->read_byte(mtd); @@ -438,7 +438,7 @@ static uint16_t __init doc200x_ident_chip(struct mtd_info *mtd, int nr) this->read_buf = &doc2000_readbuf_dword; } } - + return ret; } @@ -469,7 +469,7 @@ static int doc200x_wait(struct mtd_info *mtd, struct nand_chip *this, int state) struct doc_priv *doc = this->priv; int status; - + DoC_WaitReady(doc); this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); DoC_WaitReady(doc); @@ -503,7 +503,7 @@ static u_char doc2001_read_byte(struct mtd_info *mtd) return ReadDOC(docptr, LastDataRead); } -static void doc2001_writebuf(struct mtd_info *mtd, +static void doc2001_writebuf(struct mtd_info *mtd, const u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -517,7 +517,7 @@ static void doc2001_writebuf(struct mtd_info *mtd, WriteDOC(0x00, docptr, WritePipeTerm); } -static void doc2001_readbuf(struct mtd_info *mtd, +static void doc2001_readbuf(struct mtd_info *mtd, u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -535,7 +535,7 @@ static void doc2001_readbuf(struct mtd_info *mtd, buf[i] = ReadDOC(docptr, LastDataRead); } -static int doc2001_verifybuf(struct mtd_info *mtd, +static int doc2001_verifybuf(struct mtd_info *mtd, const u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -570,7 +570,7 @@ static u_char doc2001plus_read_byte(struct mtd_info *mtd) return ret; } -static void doc2001plus_writebuf(struct mtd_info *mtd, +static void doc2001plus_writebuf(struct mtd_info *mtd, const u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -587,7 +587,7 @@ static void doc2001plus_writebuf(struct mtd_info *mtd, if (debug) printk("\n"); } -static void doc2001plus_readbuf(struct mtd_info *mtd, +static void doc2001plus_readbuf(struct mtd_info *mtd, u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -617,7 +617,7 @@ static void doc2001plus_readbuf(struct mtd_info *mtd, if (debug) printk("\n"); } -static int doc2001plus_verifybuf(struct mtd_info *mtd, +static int doc2001plus_verifybuf(struct mtd_info *mtd, const u_char *buf, int len) { struct nand_chip *this = mtd->priv; @@ -797,7 +797,7 @@ static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int col WriteDOC(0, docptr, Mplus_FlashControl); } - /* + /* * program and erase have their own busy handlers * status and sequential in needs no delay */ @@ -822,7 +822,7 @@ static void doc2001plus_command (struct mtd_info *mtd, unsigned command, int col /* This applies to read commands */ default: - /* + /* * If we don't have access to the busy pin, we apply the given * command delay */ @@ -945,7 +945,7 @@ static int doc200x_calculate_ecc(struct mtd_info *mtd, const u_char *dat, for (i = 0; i < 6; i++) { if (DoC_is_MillenniumPlus(doc)) ecc_code[i] = ReadDOC_(docptr, DoC_Mplus_ECCSyndrome0 + i); - else + else ecc_code[i] = ReadDOC_(docptr, DoC_ECCSyndrome0 + i); if (ecc_code[i] != empty_write_ecc[i]) emptymatch = 0; @@ -982,7 +982,7 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ void __iomem *docptr = doc->virtadr; volatile u_char dummy; int emptymatch = 1; - + /* flush the pipeline */ if (DoC_is_2000(doc)) { dummy = ReadDOC(docptr, 2k_ECCStatus); @@ -997,7 +997,7 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ dummy = ReadDOC(docptr, ECCConf); dummy = ReadDOC(docptr, ECCConf); } - + /* Error occured ? */ if (dummy & 0x80) { for (i = 0; i < 6; i++) { @@ -1035,7 +1035,7 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ if (!emptymatch) ret = doc_ecc_decode (rs_decoder, dat, calc_ecc); if (ret > 0) printk(KERN_ERR "doc200x_correct_data corrected %d errors\n", ret); - } + } if (DoC_is_MillenniumPlus(doc)) WriteDOC(DOC_ECC_DIS, docptr, Mplus_ECCConf); else @@ -1046,7 +1046,7 @@ static int doc200x_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ } return ret; } - + //u_char mydatabuf[528]; /* The strange out-of-order .oobfree list below is a (possibly unneeded) @@ -1065,7 +1065,7 @@ static struct nand_oobinfo doc200x_oobinfo = { .eccpos = {0, 1, 2, 3, 4, 5}, .oobfree = { {8, 8}, {6, 2} } }; - + /* Find the (I)NFTL Media Header, and optionally also the mirror media header. On sucessful return, buf will contain a copy of the media header for further processing. id is the string to scan for, and will presumably be @@ -1251,7 +1251,7 @@ static inline int __init inftl_partscan(struct mtd_info *mtd, mh->BlockMultiplierBits = le32_to_cpu(mh->BlockMultiplierBits); mh->FormatFlags = le32_to_cpu(mh->FormatFlags); mh->PercentUsed = le32_to_cpu(mh->PercentUsed); - + printk(KERN_INFO " bootRecordID = %s\n" " NoOfBootImageBlocks = %d\n" " NoOfBinaryPartitions = %d\n" @@ -1468,7 +1468,7 @@ static inline int __init doc2001_init(struct mtd_info *mtd) ReadDOC(doc->virtadr, ChipID); if (ReadDOC(doc->virtadr, ChipID) != DOC_ChipID_DocMil) { /* It's not a Millennium; it's one of the newer - DiskOnChip 2000 units with a similar ASIC. + DiskOnChip 2000 units with a similar ASIC. Treat it like a Millennium, except that it can have multiple chips. */ doc2000_count_chips(mtd); @@ -1530,20 +1530,20 @@ static inline int __init doc_probe(unsigned long physadr) * to the DOCControl register. So we store the current contents * of the DOCControl register's location, in case we later decide * that it's not a DiskOnChip, and want to put it back how we - * found it. + * found it. */ save_control = ReadDOC(virtadr, DOCControl); /* Reset the DiskOnChip ASIC */ - WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, + WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, virtadr, DOCControl); - WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, + WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_RESET, virtadr, DOCControl); /* Enable the DiskOnChip ASIC */ - WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, + WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, virtadr, DOCControl); - WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, + WriteDOC(DOC_MODE_CLR_ERR | DOC_MODE_MDWREN | DOC_MODE_NORMAL, virtadr, DOCControl); ChipID = ReadDOC(virtadr, ChipID); @@ -1738,7 +1738,7 @@ static int __init init_nanddoc(void) int i, ret = 0; /* We could create the decoder on demand, if memory is a concern. - * This way we have it handy, if an error happens + * This way we have it handy, if an error happens * * Symbolsize is 10 (bits) * Primitve polynomial is x^10+x^3+1 diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c index 5549681ccdc..9b1fd2f387f 100644 --- a/drivers/mtd/nand/edb7312.c +++ b/drivers/mtd/nand/edb7312.c @@ -6,7 +6,7 @@ * Derived from drivers/mtd/nand/autcpu12.c * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) * - * $Id: edb7312.c,v 1.11 2004/11/04 12:53:10 gleixner Exp $ + * $Id: edb7312.c,v 1.12 2005/11/07 11:14:30 gleixner Exp $ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -71,27 +71,27 @@ static struct mtd_partition partition_info[] = { #endif -/* +/* * hardware specific access to control-lines */ -static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd) +static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd) { switch(cmd) { - - case NAND_CTL_SETCLE: - clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr); + + case NAND_CTL_SETCLE: + clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr); break; - case NAND_CTL_CLRCLE: + case NAND_CTL_CLRCLE: clps_writeb(clps_readb(ep7312_pxdr) & ~0x10, ep7312_pxdr); break; - + case NAND_CTL_SETALE: clps_writeb(clps_readb(ep7312_pxdr) | 0x20, ep7312_pxdr); break; case NAND_CTL_CLRALE: clps_writeb(clps_readb(ep7312_pxdr) & ~0x20, ep7312_pxdr); break; - + case NAND_CTL_SETNCE: clps_writeb((clps_readb(ep7312_pxdr) | 0x80) & ~0x40, ep7312_pxdr); break; @@ -122,16 +122,16 @@ static int __init ep7312_init (void) int mtd_parts_nb = 0; struct mtd_partition *mtd_parts = 0; void __iomem * ep7312_fio_base; - + /* Allocate memory for MTD device structure and private data */ - ep7312_mtd = kmalloc(sizeof(struct mtd_info) + + ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); if (!ep7312_mtd) { printk("Unable to allocate EDB7312 NAND MTD device structure.\n"); return -ENOMEM; } - + /* map physical adress */ ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K); if(!ep7312_fio_base) { @@ -139,23 +139,23 @@ static int __init ep7312_init (void) kfree(ep7312_mtd); return -EIO; } - + /* Get pointer to private data */ this = (struct nand_chip *) (&ep7312_mtd[1]); - + /* Initialize structures */ memset((char *) ep7312_mtd, 0, sizeof(struct mtd_info)); memset((char *) this, 0, sizeof(struct nand_chip)); - + /* Link the private data with the MTD structure */ ep7312_mtd->priv = this; - + /* * Set GPIO Port B control register so that the pins are configured * to be outputs for co |