diff options
Diffstat (limited to 'drivers/media/dvb/frontends/drxd_hard.c')
-rw-r--r-- | drivers/media/dvb/frontends/drxd_hard.c | 62 |
1 files changed, 23 insertions, 39 deletions
diff --git a/drivers/media/dvb/frontends/drxd_hard.c b/drivers/media/dvb/frontends/drxd_hard.c index 88e46f4cdbb..7bf39cda83c 100644 --- a/drivers/media/dvb/frontends/drxd_hard.c +++ b/drivers/media/dvb/frontends/drxd_hard.c @@ -120,7 +120,7 @@ enum EIFFilter { struct drxd_state { struct dvb_frontend frontend; struct dvb_frontend_ops ops; - struct dvb_frontend_parameters param; + struct dtv_frontend_properties props; const struct firmware *fw; struct device *dev; @@ -914,14 +914,13 @@ static int load_firmware(struct drxd_state *state, const char *fw_name) return -EIO; } - state->microcode = kmalloc(fw->size, GFP_KERNEL); + state->microcode = kmemdup(fw->data, fw->size, GFP_KERNEL); if (state->microcode == NULL) { release_firmware(fw); printk(KERN_ERR "drxd: firmware load failure: no memory\n"); return -ENOMEM; } - memcpy(state->microcode, fw->data, fw->size); state->microcode_length = fw->size; release_firmware(fw); return 0; @@ -1622,14 +1621,14 @@ static int CorrectSysClockDeviation(struct drxd_state *state) break; } - switch (state->param.u.ofdm.bandwidth) { - case BANDWIDTH_8_MHZ: + switch (state->props.bandwidth_hz) { + case 8000000: bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; break; - case BANDWIDTH_7_MHZ: + case 7000000: bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; break; - case BANDWIDTH_6_MHZ: + case 6000000: bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; break; default: @@ -1804,7 +1803,7 @@ static int StartDiversity(struct drxd_state *state) status = WriteTable(state, state->m_StartDiversityEnd); if (status < 0) break; - if (state->param.u.ofdm.bandwidth == BANDWIDTH_8_MHZ) { + if (state->props.bandwidth_hz == 8000000) { status = WriteTable(state, state->m_DiversityDelay8MHZ); if (status < 0) break; @@ -1906,7 +1905,7 @@ static int SetCfgNoiseCalibration(struct drxd_state *state, static int DRX_Start(struct drxd_state *state, s32 off) { - struct dvb_ofdm_parameters *p = &state->param.u.ofdm; + struct dtv_frontend_properties *p = &state->props; int status; u16 transmissionParams = 0; @@ -1971,7 +1970,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) if (status < 0) break; - mirrorFreqSpect = (state->param.inversion == INVERSION_ON); + mirrorFreqSpect = (state->props.inversion == INVERSION_ON); switch (p->transmission_mode) { default: /* Not set, detect it automatically */ @@ -2021,7 +2020,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) break; } - switch (p->hierarchy_information) { + switch (p->hierarchy) { case HIERARCHY_1: transmissionParams |= SC_RA_RAM_OP_PARAM_HIER_A1; if (state->type_A) { @@ -2147,7 +2146,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) if (status < 0) break; - switch (p->constellation) { + switch (p->modulation) { default: operationMode |= SC_RA_RAM_OP_AUTO_CONST__M; /* fall through , try first guess @@ -2331,9 +2330,11 @@ static int DRX_Start(struct drxd_state *state, s32 off) by SC for fix for some 8K,1/8 guard but is restored by InitEC and ResetEC functions */ - switch (p->bandwidth) { - case BANDWIDTH_AUTO: - case BANDWIDTH_8_MHZ: + switch (p->bandwidth_hz) { + case 0: + p->bandwidth_hz = 8000000; + /* fall through */ + case 8000000: /* (64/7)*(8/8)*1000000 */ bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ; @@ -2341,14 +2342,14 @@ static int DRX_Start(struct drxd_state *state, s32 off) status = Write16(state, FE_AG_REG_IND_DEL__A, 50, 0x0000); break; - case BANDWIDTH_7_MHZ: + case 7000000: /* (64/7)*(7/8)*1000000 */ bandwidth = DRXD_BANDWIDTH_7MHZ_IN_HZ; bandwidthParam = 0x4807; /*binary:0100 1000 0000 0111 */ status = Write16(state, FE_AG_REG_IND_DEL__A, 59, 0x0000); break; - case BANDWIDTH_6_MHZ: + case 6000000: /* (64/7)*(6/8)*1000000 */ bandwidth = DRXD_BANDWIDTH_6MHZ_IN_HZ; bandwidthParam = 0x0F07; /*binary: 0000 1111 0000 0111 */ @@ -2887,41 +2888,26 @@ static int drxd_sleep(struct dvb_frontend *fe) return 0; } -static int drxd_get_frontend(struct dvb_frontend *fe, - struct dvb_frontend_parameters *param) -{ - return 0; -} - static int drxd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) { return drxd_config_i2c(fe, enable); } -static int drxd_set_frontend(struct dvb_frontend *fe, - struct dvb_frontend_parameters *param) +static int drxd_set_frontend(struct dvb_frontend *fe) { + struct dtv_frontend_properties *p = &fe->dtv_property_cache; struct drxd_state *state = fe->demodulator_priv; s32 off = 0; - state->param = *param; + state->props = *p; DRX_Stop(state); if (fe->ops.tuner_ops.set_params) { - fe->ops.tuner_ops.set_params(fe, param); + fe->ops.tuner_ops.set_params(fe); if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); } - /* FIXME: move PLL drivers */ - if (state->config.pll_set && - state->config.pll_set(state->priv, param, - state->config.pll_address, - state->config.demoda_address, &off) < 0) { - printk(KERN_ERR "Error in pll_set\n"); - return -1; - } - msleep(200); return DRX_Start(state, off); @@ -2935,10 +2921,9 @@ static void drxd_release(struct dvb_frontend *fe) } static struct dvb_frontend_ops drxd_ops = { - + .delsys = { SYS_DVBT}, .info = { .name = "Micronas DRXD DVB-T", - .type = FE_OFDM, .frequency_min = 47125000, .frequency_max = 855250000, .frequency_stepsize = 166667, @@ -2958,7 +2943,6 @@ static struct dvb_frontend_ops drxd_ops = { .i2c_gate_ctrl = drxd_i2c_gate_ctrl, .set_frontend = drxd_set_frontend, - .get_frontend = drxd_get_frontend, .get_tune_settings = drxd_get_tune_settings, .read_status = drxd_read_status, |