diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/r300.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r300.c | 363 |
1 files changed, 45 insertions, 318 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 9f2460cf9db..33a2c557eac 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c @@ -32,6 +32,7 @@ #include "radeon.h" #include "radeon_drm.h" #include "radeon_share.h" +#include "r100_track.h" #include "r300_reg_safe.h" @@ -49,14 +50,10 @@ int r100_cs_packet_parse(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt, unsigned idx); int r100_cs_packet_parse_vline(struct radeon_cs_parser *p); -int r100_cs_packet_next_reloc(struct radeon_cs_parser *p, - struct radeon_cs_reloc **cs_reloc); int r100_cs_parse_packet0(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt, const unsigned *auth, unsigned n, radeon_packet0_check_t check); -void r100_cs_dump_packet(struct radeon_cs_parser *p, - struct radeon_cs_packet *pkt); int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt, struct radeon_object *robj); @@ -706,264 +703,13 @@ int rv370_debugfs_pcie_gart_info_init(struct radeon_device *rdev) /* * CS functions */ -struct r300_cs_track_cb { - struct radeon_object *robj; - unsigned pitch; - unsigned cpp; - unsigned offset; -}; - -struct r300_cs_track_array { - struct radeon_object *robj; - unsigned esize; -}; - -struct r300_cs_track_texture { - struct radeon_object *robj; - unsigned pitch; - unsigned width; - unsigned height; - unsigned num_levels; - unsigned cpp; - unsigned tex_coord_type; - unsigned txdepth; - unsigned width_11; - unsigned height_11; - bool use_pitch; - bool enabled; - bool roundup_w; - bool roundup_h; -}; - -struct r300_cs_track { - unsigned num_cb; - unsigned maxy; - unsigned vtx_size; - unsigned vap_vf_cntl; - unsigned immd_dwords; - unsigned num_arrays; - unsigned max_indx; - struct r300_cs_track_array arrays[11]; - struct r300_cs_track_cb cb[4]; - struct r300_cs_track_cb zb; - struct r300_cs_track_texture textures[16]; - bool z_enabled; -}; - -static inline void r300_cs_track_texture_print(struct r300_cs_track_texture *t) -{ - DRM_ERROR("pitch %d\n", t->pitch); - DRM_ERROR("width %d\n", t->width); - DRM_ERROR("height %d\n", t->height); - DRM_ERROR("num levels %d\n", t->num_levels); - DRM_ERROR("depth %d\n", t->txdepth); - DRM_ERROR("bpp %d\n", t->cpp); - DRM_ERROR("coordinate type %d\n", t->tex_coord_type); - DRM_ERROR("width round to power of 2 %d\n", t->roundup_w); - DRM_ERROR("height round to power of 2 %d\n", t->roundup_h); -} - -static inline int r300_cs_track_texture_check(struct radeon_device *rdev, - struct r300_cs_track *track) -{ - struct radeon_object *robj; - unsigned long size; - unsigned u, i, w, h; - - for (u = 0; u < 16; u++) { - if (!track->textures[u].enabled) - continue; - robj = track->textures[u].robj; - if (robj == NULL) { - DRM_ERROR("No texture bound to unit %u\n", u); - return -EINVAL; - } - size = 0; - for (i = 0; i <= track->textures[u].num_levels; i++) { - if (track->textures[u].use_pitch) { - w = track->textures[u].pitch / (1 << i); - } else { - w = track->textures[u].width / (1 << i); - if (rdev->family >= CHIP_RV515) - w |= track->textures[u].width_11; - if (track->textures[u].roundup_w) - w = roundup_pow_of_two(w); - } - h = track->textures[u].height / (1 << i); - if (rdev->family >= CHIP_RV515) - h |= track->textures[u].height_11; - if (track->textures[u].roundup_h) - h = roundup_pow_of_two(h); - size += w * h; - } - size *= track->textures[u].cpp; - switch (track->textures[u].tex_coord_type) { - case 0: - break; - case 1: - size *= (1 << track->textures[u].txdepth); - break; - case 2: - size *= 6; - break; - default: - DRM_ERROR("Invalid texture coordinate type %u for unit " - "%u\n", track->textures[u].tex_coord_type, u); - return -EINVAL; - } - if (size > radeon_object_size(robj)) { - DRM_ERROR("Texture of unit %u needs %lu bytes but is " - "%lu\n", u, size, radeon_object_size(robj)); - r300_cs_track_texture_print(&track->textures[u]); - return -EINVAL; - } - } - return 0; -} - -int r300_cs_track_check(struct radeon_device *rdev, struct r300_cs_track *track) -{ - unsigned i; - unsigned long size; - unsigned prim_walk; - unsigned nverts; - - for (i = 0; i < track->num_cb; i++) { - if (track->cb[i].robj == NULL) { - DRM_ERROR("[drm] No buffer for color buffer %d !\n", i); - return -EINVAL; - } - size = track->cb[i].pitch * track->cb[i].cpp * track->maxy; - size += track->cb[i].offset; - if (size > radeon_object_size(track->cb[i].robj)) { - DRM_ERROR("[drm] Buffer too small for color buffer %d " - "(need %lu have %lu) !\n", i, size, - radeon_object_size(track->cb[i].robj)); - DRM_ERROR("[drm] color buffer %d (%u %u %u %u)\n", - i, track->cb[i].pitch, track->cb[i].cpp, - track->cb[i].offset, track->maxy); - return -EINVAL; - } - } - if (track->z_enabled) { - if (track->zb.robj == NULL) { - DRM_ERROR("[drm] No buffer for z buffer !\n"); - return -EINVAL; - } - size = track->zb.pitch * track->zb.cpp * track->maxy; - size += track->zb.offset; - if (size > radeon_object_size(track->zb.robj)) { - DRM_ERROR("[drm] Buffer too small for z buffer " - "(need %lu have %lu) !\n", size, - radeon_object_size(track->zb.robj)); - return -EINVAL; - } - } - prim_walk = (track->vap_vf_cntl >> 4) & 0x3; - nverts = (track->vap_vf_cntl >> 16) & 0xFFFF; - switch (prim_walk) { - case 1: - for (i = 0; i < track->num_arrays; i++) { - size = track->arrays[i].esize * track->max_indx * 4; - if (track->arrays[i].robj == NULL) { - DRM_ERROR("(PW %u) Vertex array %u no buffer " - "bound\n", prim_walk, i); - return -EINVAL; - } - if (size > radeon_object_size(track->arrays[i].robj)) { - DRM_ERROR("(PW %u) Vertex array %u need %lu dwords " - "have %lu dwords\n", prim_walk, i, - size >> 2, - radeon_object_size(track->arrays[i].robj) >> 2); - DRM_ERROR("Max indices %u\n", track->max_indx); - return -EINVAL; - } - } - break; - case 2: - for (i = 0; i < track->num_arrays; i++) { - size = track->arrays[i].esize * (nverts - 1) * 4; - if (track->arrays[i].robj == NULL) { - DRM_ERROR("(PW %u) Vertex array %u no buffer " - "bound\n", prim_walk, i); - return -EINVAL; - } - if (size > radeon_object_size(track->arrays[i].robj)) { - DRM_ERROR("(PW %u) Vertex array %u need %lu dwords " - "have %lu dwords\n", prim_walk, i, size >> 2, - radeon_object_size(track->arrays[i].robj) >> 2); - return -EINVAL; - } - } - break; - case 3: - size = track->vtx_size * nverts; - if (size != track->immd_dwords) { - DRM_ERROR("IMMD draw %u dwors but needs %lu dwords\n", - track->immd_dwords, size); - DRM_ERROR("VAP_VF_CNTL.NUM_VERTICES %u, VTX_SIZE %u\n", - nverts, track->vtx_size); - return -EINVAL; - } - break; - default: - DRM_ERROR("[drm] Invalid primitive walk %d for VAP_VF_CNTL\n", - prim_walk); - return -EINVAL; - } - return r300_cs_track_texture_check(rdev, track); -} - -static inline void r300_cs_track_clear(struct r300_cs_track *track) -{ - unsigned i; - - track->num_cb = 4; - track->maxy = 4096; - for (i = 0; i < track->num_cb; i++) { - track->cb[i].robj = NULL; - track->cb[i].pitch = 8192; - track->cb[i].cpp = 16; - track->cb[i].offset = 0; - } - track->z_enabled = true; - track->zb.robj = NULL; - track->zb.pitch = 8192; - track->zb.cpp = 4; - track->zb.offset = 0; - track->vtx_size = 0x7F; - track->immd_dwords = 0xFFFFFFFFUL; - track->num_arrays = 11; - track->max_indx = 0x00FFFFFFUL; - for (i = 0; i < track->num_arrays; i++) { - track->arrays[i].robj = NULL; - track->arrays[i].esize = 0x7F; - } - for (i = 0; i < 16; i++) { - track->textures[i].pitch = 16536; - track->textures[i].width = 16536; - track->textures[i].height = 16536; - track->textures[i].width_11 = 1 << 11; - track->textures[i].height_11 = 1 << 11; - track->textures[i].num_levels = 12; - track->textures[i].txdepth = 16; - track->textures[i].cpp = 64; - track->textures[i].tex_coord_type = 1; - track->textures[i].robj = NULL; - /* CS IB emission code makes sure texture unit are disabled */ - track->textures[i].enabled = false; - track->textures[i].roundup_w = true; - track->textures[i].roundup_h = true; - } -} - static int r300_packet0_check(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt, unsigned idx, unsigned reg) { struct radeon_cs_chunk *ib_chunk; struct radeon_cs_reloc *reloc; - struct r300_cs_track *track; + struct r100_cs_track *track; volatile uint32_t *ib; uint32_t tmp, tile_flags = 0; unsigned i; @@ -971,7 +717,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, ib = p->ib->ptr; ib_chunk = &p->chunks[p->chunk_ib_idx]; - track = (struct r300_cs_track*)p->track; + track = (struct r100_cs_track *)p->track; switch(reg) { case AVIVO_D1MODE_VLINE_START_END: case RADEON_CRTC_GUI_TRIG_VLINE: @@ -985,28 +731,9 @@ static int r300_packet0_check(struct radeon_cs_parser *p, break; case RADEON_DST_PITCH_OFFSET: case RADEON_SRC_PITCH_OFFSET: - r = r100_cs_packet_next_reloc(p, &reloc); - if (r) { - DRM_ERROR("No reloc for ib[%d]=0x%04X\n", - idx, reg); - r100_cs_dump_packet(p, pkt); + r = r100_reloc_pitch_offset(p, pkt, idx, reg); + if (r) return r; - } - tmp = ib_chunk->kdata[idx] & 0x003fffff; - tmp += (((u32)reloc->lobj.gpu_offset) >> 10); - - if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) - tile_flags |= RADEON_DST_TILE_MACRO; - if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) { - if (reg == RADEON_SRC_PITCH_OFFSET) { - DRM_ERROR("Cannot src blit from microtiled surface\n"); - r100_cs_dump_packet(p, pkt); - return -EINVAL; - } - tile_flags |= RADEON_DST_TILE_MICRO; - } - tmp |= tile_flags; - ib[idx] = (ib_chunk->kdata[idx] & 0x3fc00000) | tmp; break; case R300_RB3D_COLOROFFSET0: case R300_RB3D_COLOROFFSET1: @@ -1215,42 +942,41 @@ static int r300_packet0_check(struct radeon_cs_parser *p, tmp = (ib_chunk->kdata[idx] >> 25) & 0x3; track->textures[i].tex_coord_type = tmp; switch ((ib_chunk->kdata[idx] & 0x1F)) { - case 0: - case 2: - case 5: - case 18: - case 20: - case 21: + case R300_TX_FORMAT_X8: + case R300_TX_FORMAT_Y4X4: + case R300_TX_FORMAT_Z3Y3X2: track->textures[i].cpp = 1; break; - case 1: - case 3: - case 6: - case 7: - case 10: - case 11: - case 19: - case 22: - case 24: + case R300_TX_FORMAT_X16: + case R300_TX_FORMAT_Y8X8: + case R300_TX_FORMAT_Z5Y6X5: + case R300_TX_FORMAT_Z6Y5X5: + case R300_TX_FORMAT_W4Z4Y4X4: + case R300_TX_FORMAT_W1Z5Y5X5: + case R300_TX_FORMAT_DXT1: + case R300_TX_FORMAT_D3DMFT_CxV8U8: + case R300_TX_FORMAT_B8G8_B8G8: + case R300_TX_FORMAT_G8R8_G8B8: track->textures[i].cpp = 2; break; - case 4: - case 8: - case 9: - case 12: - case 13: - case 23: - case 25: - case 27: - case 30: + case R300_TX_FORMAT_Y16X16: + case R300_TX_FORMAT_Z11Y11X10: + case R300_TX_FORMAT_Z10Y11X11: + case R300_TX_FORMAT_W8Z8Y8X8: + case R300_TX_FORMAT_W2Z10Y10X10: + case 0x17: + case R300_TX_FORMAT_FL_I32: + case 0x1e: + case R300_TX_FORMAT_DXT3: + case R300_TX_FORMAT_DXT5: track->textures[i].cpp = 4; break; - case 14: - case 26: - case 28: + case R300_TX_FORMAT_W16Z16Y16X16: + case R300_TX_FORMAT_FL_R16G16B16A16: + case R300_TX_FORMAT_FL_I32A32: track->textures[i].cpp = 8; break; - case 29: + case R300_TX_FORMAT_FL_R32G32B32A32: track->textures[i].cpp = 16; break; default: @@ -1278,11 +1004,11 @@ static int r300_packet0_check(struct radeon_cs_parser *p, case 0x443C: /* TX_FILTER0_[0-15] */ i = (reg - 0x4400) >> 2; - tmp = ib_chunk->kdata[idx] & 0x7;; + tmp = ib_chunk->kdata[idx] & 0x7; if (tmp == 2 || tmp == 4 || tmp == 6) { track->textures[i].roundup_w = false; } - tmp = (ib_chunk->kdata[idx] >> 3) & 0x7;; + tmp = (ib_chunk->kdata[idx] >> 3) & 0x7; if (tmp == 2 || tmp == 4 || tmp == 6) { track->textures[i].roundup_h = false; } @@ -1370,8 +1096,9 @@ static int r300_packet3_check(struct radeon_cs_parser *p, struct radeon_cs_packet *pkt) { struct radeon_cs_chunk *ib_chunk; + struct radeon_cs_reloc *reloc; - struct r300_cs_track *track; + struct r100_cs_track *track; volatile uint32_t *ib; unsigned idx; unsigned i, c; @@ -1380,7 +1107,7 @@ static int r300_packet3_check(struct radeon_cs_parser *p, ib = p->ib->ptr; ib_chunk = &p->chunks[p->chunk_ib_idx]; idx = pkt->idx + 1; - track = (struct r300_cs_track*)p->track; + track = (struct r100_cs_track *)p->track; switch(pkt->opcode) { case PACKET3_3D_LOAD_VBPNTR: c = ib_chunk->kdata[idx++] & 0x1F; @@ -1447,7 +1174,7 @@ static int r300_packet3_check(struct radeon_cs_parser *p, } track->vap_vf_cntl = ib_chunk->kdata[idx+1]; track->immd_dwords = pkt->count - 1; - r = r300_cs_track_check(p->rdev, track); + r = r100_cs_track_check(p->rdev, track); if (r) { return r; } @@ -1462,35 +1189,35 @@ static int r300_packet3_check(struct radeon_cs_parser *p, } track->vap_vf_cntl = ib_chunk->kdata[idx]; track->immd_dwords = pkt->count; - r = r300_cs_track_check(p->rdev, track); + r = r100_cs_track_check(p->rdev, track); if (r) { return r; } break; case PACKET3_3D_DRAW_VBUF: track->vap_vf_cntl = ib_chunk->kdata[idx + 1]; - r = r300_cs_track_check(p->rdev, track); + r = r100_cs_track_check(p->rdev, track); if (r) { return r; } break; case PACKET3_3D_DRAW_VBUF_2: track->vap_vf_cntl = ib_chunk->kdata[idx]; - r = r300_cs_track_check(p->rdev, track); + r = r100_cs_track_check(p->rdev, track); if (r) { return r; } break; case PACKET3_3D_DRAW_INDX: track->vap_vf_cntl = ib_chunk->kdata[idx + 1]; - r = r300_cs_track_check(p->rdev, track); + r = r100_cs_track_check(p->rdev, track); if (r) { return r; } break; case PACKET3_3D_DRAW_INDX_2: track->vap_vf_cntl = ib_chunk->kdata[idx]; - r = r300_cs_track_check(p->rdev, track); + r = r100_cs_track_check(p->rdev, track); if (r) { return r; } @@ -1507,10 +1234,10 @@ static int r300_packet3_check(struct radeon_cs_parser *p, int r300_cs_parse(struct radeon_cs_parser *p) { struct radeon_cs_packet pkt; - struct r300_cs_track track; + struct r100_cs_track track; int r; - r300_cs_track_clear(&track); + r100_cs_track_clear(p->rdev, &track); p->track = &track; do { r = r100_cs_packet_parse(p, &pkt, p->idx); |