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-rw-r--r--arch/sh/kernel/cpu/sh3/entry.S85
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c5
-rw-r--r--arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c185
3 files changed, 45 insertions, 230 deletions
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 55da0ff9848..3cb531f233f 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -254,40 +254,6 @@ restore_all:
lds k2, pr ! restore pr
!
-#ifdef CONFIG_SH_DSP
- mov.l @r15+, k0 ! DSP mode marker
- mov.l 5f, k1
- cmp/eq k0, k1 ! Do we have a DSP stack frame?
- bf skip_restore
-
- stc sr, k0 ! Enable CPU DSP mode
- or k1, k0 ! (within kernel it may be disabled)
- ldc k0, sr
- mov r2, k0 ! Backup r2
-
- ! Restore DSP registers from stack
- mov r15, r2
- movs.l @r2+, a1
- movs.l @r2+, a0g
- movs.l @r2+, a1g
- movs.l @r2+, m0
- movs.l @r2+, m1
- mov r2, r15
-
- lds.l @r15+, a0
- lds.l @r15+, x0
- lds.l @r15+, x1
- lds.l @r15+, y0
- lds.l @r15+, y1
- lds.l @r15+, dsr
- ldc.l @r15+, rs
- ldc.l @r15+, re
- ldc.l @r15+, mod
-
- mov k0, r2 ! Restore r2
-skip_restore:
-#endif
- !
! Calculate new SR value
mov k3, k2 ! original SR value
mov #0xf0, k1
@@ -358,7 +324,7 @@ general_exception:
add k0, k4
0:
! Setup stack and save DSP context (k0 contains original r15 on return)
- bsr prepare_stack_save_dsp
+ bsr prepare_stack
nop
! Save registers / Switch to bank 0
@@ -374,15 +340,14 @@ general_exception:
1: .long EXPEVT
#endif
-! prepare_stack_save_dsp()
+! prepare_stack()
! - roll back gRB
! - switch to kernel stack
-! - save DSP
! k0 returns original sp (after roll back)
! k1 trashed
! k2 trashed
-prepare_stack_save_dsp:
+prepare_stack:
#ifdef CONFIG_GUSA
! Check for roll back gRB (User and Kernel)
mov r15, k0
@@ -416,47 +381,9 @@ prepare_stack_save_dsp:
mov k1, r15 ! change to kernel stack
!
1:
-#ifdef CONFIG_SH_DSP
- ! Save DSP context if needed
- stc sr, k1
- mov #0x10, k2
- shll8 k2 ! DSP=1 (0x00001000)
- tst k2, k1 ! Check if in DSP mode (passed in k2)
- bt/s skip_save
- mov #0, k1 ! Set marker for no stack frame
-
- mov k2, k1 ! Save has-frame marker
-
- ! Save DSP registers on stack
- stc.l mod, @-r15
- stc.l re, @-r15
- stc.l rs, @-r15
- sts.l dsr, @-r15
- sts.l y1, @-r15
- sts.l y0, @-r15
- sts.l x1, @-r15
- sts.l x0, @-r15
- sts.l a0, @-r15
-
- ! GAS is broken, does not generate correct "movs.l Ds,@-As" instr.
-
- ! FIXME: Make sure that this is still the case with newer toolchains,
- ! as we're not at all interested in supporting ancient toolchains at
- ! this point. -- PFM.
-
- mov r15, k2
- .word 0xf653 ! movs.l a1, @-r2
- .word 0xf6f3 ! movs.l a0g, @-r2
- .word 0xf6d3 ! movs.l a1g, @-r2
- .word 0xf6c3 ! movs.l m0, @-r2
- .word 0xf6e3 ! movs.l m1, @-r2
- mov k2, r15
-
-skip_save:
- mov.l k1, @-r15 ! Push DSP mode marker onto stack
-#endif
rts
nop
+
!
! 0x400: Instruction and Data TLB miss exception vector
!
@@ -468,7 +395,7 @@ handle_exception:
mova exception_data, k0
! Setup stack and save DSP context (k0 contains original r15 on return)
- bsr prepare_stack_save_dsp
+ bsr prepare_stack
PREF(k0)
! Save registers / Switch to bank 0
@@ -572,7 +499,7 @@ ENTRY(handle_interrupt)
mova exception_data, k0
! Setup stack and save DSP context (k0 contains original r15 on return)
- bsr prepare_stack_save_dsp
+ bsr prepare_stack
PREF(k0)
! Save registers / Switch to bank 0
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 3d3a3c4425a..91e3677ae09 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -199,11 +199,6 @@ int __init detect_cpu_and_cache_system(void)
break;
}
-#ifdef CONFIG_SH_DIRECT_MAPPED
- boot_cpu_data.icache.ways = 1;
- boot_cpu_data.dcache.ways = 1;
-#endif
-
#ifdef CONFIG_CPU_HAS_PTEA
boot_cpu_data.flags |= CPU_HAS_PTEA;
#endif
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
index 373b3447bfd..4229e0724c8 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
@@ -149,150 +149,44 @@ enum {
PINMUX_FUNCTION_END,
PINMUX_MARK_BEGIN,
- CDE_MARK,
- ETH_MAGIC_MARK,
- DISP_MARK,
- ETH_LINK_MARK,
- DR5_MARK,
- ETH_TX_ER_MARK,
- DR4_MARK,
- ETH_TX_EN_MARK,
- DR3_MARK,
- ETH_TXD3_MARK,
- DR2_MARK,
- ETH_TXD2_MARK,
- DR1_MARK,
- ETH_TXD1_MARK,
- DR0_MARK,
- ETH_TXD0_MARK,
-
- VSYNC_MARK,
- HSPI_CLK_MARK,
- ODDF_MARK,
- HSPI_CS_MARK,
- DG5_MARK,
- ETH_MDIO_MARK,
- DG4_MARK,
- ETH_RX_CLK_MARK,
- DG3_MARK,
- ETH_MDC_MARK,
- DG2_MARK,
- ETH_COL_MARK,
- DG1_MARK,
- ETH_TX_CLK_MARK,
- DG0_MARK,
- ETH_CRS_MARK,
-
- DCLKIN_MARK,
- HSPI_RX_MARK,
- HSYNC_MARK,
- HSPI_TX_MARK,
- DB5_MARK,
- ETH_RXD3_MARK,
- DB4_MARK,
- ETH_RXD2_MARK,
- DB3_MARK,
- ETH_RXD1_MARK,
- DB2_MARK,
- ETH_RXD0_MARK,
- DB1_MARK,
- ETH_RX_DV_MARK,
- DB0_MARK,
- ETH_RX_ER_MARK,
-
- DCLKOUT_MARK,
- SCIF1_SLK_MARK,
- SCIF1_RXD_MARK,
- SCIF1_TXD_MARK,
- DACK1_MARK,
- BACK_MARK,
- FALE_MARK,
- DACK0_MARK,
- FCLE_MARK,
- DREQ1_MARK,
- BREQ_MARK,
- USB_OVC1_MARK,
- DREQ0_MARK,
- USB_OVC0_MARK,
-
- USB_PENC1_MARK,
- USB_PENC0_MARK,
-
- HAC1_SDOUT_MARK,
- SSI1_SDATA_MARK,
- SDIF1CMD_MARK,
- HAC1_SDIN_MARK,
- SSI1_SCK_MARK,
- SDIF1CD_MARK,
- HAC1_SYNC_MARK,
- SSI1_WS_MARK,
- SDIF1WP_MARK,
- HAC1_BITCLK_MARK,
- SSI1_CLK_MARK,
- SDIF1CLK_MARK,
- HAC0_SDOUT_MARK,
- SSI0_SDATA_MARK,
- SDIF1D3_MARK,
- HAC0_SDIN_MARK,
- SSI0_SCK_MARK,
- SDIF1D2_MARK,
- HAC0_SYNC_MARK,
- SSI0_WS_MARK,
- SDIF1D1_MARK,
- HAC0_BITCLK_MARK,
- SSI0_CLK_MARK,
- SDIF1D0_MARK,
-
- SCIF3_SCK_MARK,
- SSI2_SDATA_MARK,
- SCIF3_RXD_MARK,
- TCLK_MARK,
- SSI2_SCK_MARK,
- SCIF3_TXD_MARK,
+ DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK,
+ VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK,
+ DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK,
+ DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK,
+ DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK,
+ ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK,
+ ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK,
+ ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK,
+ ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK,
+ ETH_RXD3_MARK, ETH_RXD2_MARK, ETH_RXD1_MARK, ETH_RXD0_MARK,
+ HSPI_CLK_MARK, HSPI_CS_MARK, HSPI_RX_MARK, HSPI_TX_MARK,
+ SCIF0_CTS_MARK, SCIF0_RTS_MARK,
+ SCIF0_SCK_MARK, SCIF0_RXD_MARK, SCIF0_TXD_MARK,
+ SCIF1_SCK_MARK, SCIF1_RXD_MARK, SCIF1_TXD_MARK,
+ SCIF3_SCK_MARK, SCIF3_RXD_MARK, SCIF3_TXD_MARK,
+ SCIF4_SCK_MARK, SCIF4_RXD_MARK, SCIF4_TXD_MARK,
+ SCIF5_SCK_MARK, SCIF5_RXD_MARK, SCIF5_TXD_MARK,
+ BREQ_MARK, IOIS16_MARK, CE2B_MARK, CE2A_MARK, BACK_MARK,
+ FALE_MARK, FRB_MARK, FSTATUS_MARK,
+ FSE_MARK, FCLE_MARK,
+ DACK0_MARK, DACK1_MARK, DACK2_MARK, DACK3_MARK,
+ DREQ0_MARK, DREQ1_MARK, DREQ2_MARK, DREQ3_MARK,
+ DRAK0_MARK, DRAK1_MARK, DRAK2_MARK, DRAK3_MARK,
+ USB_OVC1_MARK, USB_OVC0_MARK,
+ USB_PENC1_MARK, USB_PENC0_MARK,
HAC_RES_MARK,
- SSI2_WS_MARK,
-
- DACK3_MARK,
- SDIF0CMD_MARK,
- DACK2_MARK,
- SDIF0CD_MARK,
- DREQ3_MARK,
- SDIF0WP_MARK,
- SCIF0_CTS_MARK,
- DREQ2_MARK,
- SDIF0CLK_MARK,
- SCIF0_RTS_MARK,
- IRL7_MARK,
- SDIF0D3_MARK,
- SCIF0_SCK_MARK,
- IRL6_MARK,
- SDIF0D2_MARK,
- SCIF0_RXD_MARK,
- IRL5_MARK,
- SDIF0D1_MARK,
- SCIF0_TXD_MARK,
- IRL4_MARK,
- SDIF0D0_MARK,
-
- SCIF5_SCK_MARK,
- FRB_MARK,
- SCIF5_RXD_MARK,
- IOIS16_MARK,
- SCIF5_TXD_MARK,
- CE2B_MARK,
- DRAK3_MARK,
- CE2A_MARK,
- SCIF4_SCK_MARK,
- DRAK2_MARK,
- SSI3_WS_MARK,
- SCIF4_RXD_MARK,
- DRAK1_MARK,
- SSI3_SDATA_MARK,
- FSTATUS_MARK,
- SCIF4_TXD_MARK,
- DRAK0_MARK,
- SSI3_SCK_MARK,
- FSE_MARK,
+ HAC1_SDOUT_MARK, HAC1_SDIN_MARK, HAC1_SYNC_MARK, HAC1_BITCLK_MARK,
+ HAC0_SDOUT_MARK, HAC0_SDIN_MARK, HAC0_SYNC_MARK, HAC0_BITCLK_MARK,
+ SSI0_SDATA_MARK, SSI0_SCK_MARK, SSI0_WS_MARK, SSI0_CLK_MARK,
+ SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK,
+ SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK,
+ SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK,
+ SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK,
+ SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK,
+ SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK,
+ SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK,
+ TCLK_MARK,
+ IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK,
PINMUX_MARK_END,
};
@@ -377,7 +271,6 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
/* PA FN */
- PINMUX_MARK_BEGIN,
PINMUX_DATA(CDE_MARK, P1MSEL2_0, PA7_FN),
PINMUX_DATA(DISP_MARK, P1MSEL2_0, PA6_FN),
PINMUX_DATA(DR5_MARK, P1MSEL2_0, PA5_FN),
@@ -434,7 +327,7 @@ static pinmux_enum_t pinmux_data[] = {
/* PD FN */
PINMUX_DATA(DCLKOUT_MARK, PD7_FN),
- PINMUX_DATA(SCIF1_SLK_MARK, PD6_FN),
+ PINMUX_DATA(SCIF1_SCK_MARK, PD6_FN),
PINMUX_DATA(SCIF1_RXD_MARK, PD5_FN),
PINMUX_DATA(SCIF1_TXD_MARK, PD4_FN),
PINMUX_DATA(DACK1_MARK, P1MSEL13_1, P1MSEL12_0, PD3_FN),
@@ -662,7 +555,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_FN_DB0, DB0_MARK),
PINMUX_GPIO(GPIO_FN_ETH_RX_ER, ETH_RX_ER_MARK),
PINMUX_GPIO(GPIO_FN_DCLKOUT, DCLKOUT_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF1_SLK, SCIF1_SLK_MARK),
+ PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),