diff options
Diffstat (limited to 'arch/parisc')
31 files changed, 4628 insertions, 24 deletions
diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile index f3d0d7c7097..20d327f63d5 100644 --- a/arch/parisc/Makefile +++ b/arch/parisc/Makefile @@ -69,7 +69,7 @@ kernel-y := mm/ kernel/ math-emu/ kernel/init_task.o kernel-$(CONFIG_HPUX) += hpux/ core-y += $(addprefix arch/parisc/, $(kernel-y)) -libs-y += arch/parisc/lib/ `$(CC) -print-libgcc-file-name` +libs-y += arch/parisc/lib/ drivers-$(CONFIG_OPROFILE) += arch/parisc/oprofile/ diff --git a/arch/parisc/kernel/parisc_ksyms.c b/arch/parisc/kernel/parisc_ksyms.c index 7aca704e96f..671ee5b9950 100644 --- a/arch/parisc/kernel/parisc_ksyms.c +++ b/arch/parisc/kernel/parisc_ksyms.c @@ -122,31 +122,9 @@ EXPORT_SYMBOL($$divI_12); EXPORT_SYMBOL($$divI_14); EXPORT_SYMBOL($$divI_15); -extern void __ashrdi3(void); -extern void __ashldi3(void); -extern void __lshrdi3(void); -extern void __muldi3(void); - -EXPORT_SYMBOL(__ashrdi3); -EXPORT_SYMBOL(__ashldi3); -EXPORT_SYMBOL(__lshrdi3); -EXPORT_SYMBOL(__muldi3); - asmlinkage void * __canonicalize_funcptr_for_compare(void *); EXPORT_SYMBOL(__canonicalize_funcptr_for_compare); -#ifdef CONFIG_64BIT -extern void __divdi3(void); -extern void __udivdi3(void); -extern void __umoddi3(void); -extern void __moddi3(void); - -EXPORT_SYMBOL(__divdi3); -EXPORT_SYMBOL(__udivdi3); -EXPORT_SYMBOL(__umoddi3); -EXPORT_SYMBOL(__moddi3); -#endif - #ifndef CONFIG_64BIT extern void $$dyncall(void); EXPORT_SYMBOL($$dyncall); diff --git a/arch/parisc/lib/Makefile b/arch/parisc/lib/Makefile index 5f2e6904d14..7ce406c7daf 100644 --- a/arch/parisc/lib/Makefile +++ b/arch/parisc/lib/Makefile @@ -4,4 +4,4 @@ lib-y := lusercopy.o bitops.o checksum.o io.o memset.o fixup.o memcpy.o -obj-y := iomap.o +obj-y := libgcc/ milli/ iomap.o diff --git a/arch/parisc/lib/libgcc/Makefile b/arch/parisc/lib/libgcc/Makefile new file mode 100644 index 00000000000..b67a85ad9c8 --- /dev/null +++ b/arch/parisc/lib/libgcc/Makefile @@ -0,0 +1,4 @@ +obj-y := __ashldi3.o __ashrdi3.o __clzsi2.o __divdi3.o __divsi3.o \ + __lshrdi3.o __moddi3.o __modsi3.o __udivdi3.o \ + __udivmoddi4.o __udivmodsi4.o __udivsi3.o \ + __umoddi3.o __umodsi3.o __muldi3.o __umulsidi3.o diff --git a/arch/parisc/lib/libgcc/__ashldi3.c b/arch/parisc/lib/libgcc/__ashldi3.c new file mode 100644 index 00000000000..a14a257abb2 --- /dev/null +++ b/arch/parisc/lib/libgcc/__ashldi3.c @@ -0,0 +1,19 @@ +#include "libgcc.h" + +u64 __ashldi3(u64 v, int cnt) +{ + int c = cnt & 31; + u32 vl = (u32) v; + u32 vh = (u32) (v >> 32); + + if (cnt & 32) { + vh = (vl << c); + vl = 0; + } else { + vh = (vh << c) + (vl >> (32 - c)); + vl = (vl << c); + } + + return ((u64) vh << 32) + vl; +} +EXPORT_SYMBOL(__ashldi3); diff --git a/arch/parisc/lib/libgcc/__ashrdi3.c b/arch/parisc/lib/libgcc/__ashrdi3.c new file mode 100644 index 00000000000..8636a5aa4f7 --- /dev/null +++ b/arch/parisc/lib/libgcc/__ashrdi3.c @@ -0,0 +1,19 @@ +#include "libgcc.h" + +u64 __ashrdi3(u64 v, int cnt) +{ + int c = cnt & 31; + u32 vl = (u32) v; + u32 vh = (u32) (v >> 32); + + if (cnt & 32) { + vl = ((s32) vh >> c); + vh = (s32) vh >> 31; + } else { + vl = (vl >> c) + (vh << (32 - c)); + vh = ((s32) vh >> c); + } + + return ((u64) vh << 32) + vl; +} +EXPORT_SYMBOL(__ashrdi3); diff --git a/arch/parisc/lib/libgcc/__clzsi2.c b/arch/parisc/lib/libgcc/__clzsi2.c new file mode 100644 index 00000000000..a7aa2f55a9c --- /dev/null +++ b/arch/parisc/lib/libgcc/__clzsi2.c @@ -0,0 +1,30 @@ +#include "libgcc.h" + +u32 __clzsi2(u32 v) +{ + int p = 31; + + if (v & 0xffff0000) { + p -= 16; + v >>= 16; + } + if (v & 0xff00) { + p -= 8; + v >>= 8; + } + if (v & 0xf0) { + p -= 4; + v >>= 4; + } + if (v & 0xc) { + p -= 2; + v >>= 2; + } + if (v & 0x2) { + p -= 1; + v >>= 1; + } + + return p; +} +EXPORT_SYMBOL(__clzsi2); diff --git a/arch/parisc/lib/libgcc/__divdi3.c b/arch/parisc/lib/libgcc/__divdi3.c new file mode 100644 index 00000000000..f23c6fe2838 --- /dev/null +++ b/arch/parisc/lib/libgcc/__divdi3.c @@ -0,0 +1,23 @@ +#include "libgcc.h" + +s64 __divdi3(s64 num, s64 den) +{ + int minus = 0; + s64 v; + + if (num < 0) { + num = -num; + minus = 1; + } + if (den < 0) { + den = -den; + minus ^= 1; + } + + v = __udivmoddi4(num, den, NULL); + if (minus) + v = -v; + + return v; +} +EXPORT_SYMBOL(__divdi3); diff --git a/arch/parisc/lib/libgcc/__divsi3.c b/arch/parisc/lib/libgcc/__divsi3.c new file mode 100644 index 00000000000..730fb530680 --- /dev/null +++ b/arch/parisc/lib/libgcc/__divsi3.c @@ -0,0 +1,23 @@ +#include "libgcc.h" + +s32 __divsi3(s32 num, s32 den) +{ + int minus = 0; + s32 v; + + if (num < 0) { + num = -num; + minus = 1; + } + if (den < 0) { + den = -den; + minus ^= 1; + } + + v = __udivmodsi4(num, den, NULL); + if (minus) + v = -v; + + return v; +} +EXPORT_SYMBOL(__divsi3); diff --git a/arch/parisc/lib/libgcc/__lshrdi3.c b/arch/parisc/lib/libgcc/__lshrdi3.c new file mode 100644 index 00000000000..4a820708ec5 --- /dev/null +++ b/arch/parisc/lib/libgcc/__lshrdi3.c @@ -0,0 +1,19 @@ +#include "libgcc.h" + +u64 __lshrdi3(u64 v, int cnt) +{ + int c = cnt & 31; + u32 vl = (u32) v; + u32 vh = (u32) (v >> 32); + + if (cnt & 32) { + vl = (vh >> c); + vh = 0; + } else { + vl = (vl >> c) + (vh << (32 - c)); + vh = (vh >> c); + } + + return ((u64) vh << 32) + vl; +} +EXPORT_SYMBOL(__lshrdi3); diff --git a/arch/parisc/lib/libgcc/__moddi3.c b/arch/parisc/lib/libgcc/__moddi3.c new file mode 100644 index 00000000000..ed64bbafc98 --- /dev/null +++ b/arch/parisc/lib/libgcc/__moddi3.c @@ -0,0 +1,23 @@ +#include "libgcc.h" + +s64 __moddi3(s64 num, s64 den) +{ + int minus = 0; + s64 v; + + if (num < 0) { + num = -num; + minus = 1; + } + if (den < 0) { + den = -den; + minus ^= 1; + } + + (void)__udivmoddi4(num, den, (u64 *) & v); + if (minus) + v = -v; + + return v; +} +EXPORT_SYMBOL(__moddi3); diff --git a/arch/parisc/lib/libgcc/__modsi3.c b/arch/parisc/lib/libgcc/__modsi3.c new file mode 100644 index 00000000000..62f773efaee --- /dev/null +++ b/arch/parisc/lib/libgcc/__modsi3.c @@ -0,0 +1,23 @@ +#include "libgcc.h" + +s32 __modsi3(s32 num, s32 den) +{ + int minus = 0; + s32 v; + + if (num < 0) { + num = -num; + minus = 1; + } + if (den < 0) { + den = -den; + minus ^= 1; + } + + (void)__udivmodsi4(num, den, (u32 *) & v); + if (minus) + v = -v; + + return v; +} +EXPORT_SYMBOL(__modsi3); diff --git a/arch/parisc/lib/libgcc/__muldi3.c b/arch/parisc/lib/libgcc/__muldi3.c new file mode 100644 index 00000000000..3308abdd558 --- /dev/null +++ b/arch/parisc/lib/libgcc/__muldi3.c @@ -0,0 +1,22 @@ +#include "libgcc.h" + +union DWunion { + struct { + s32 high; + s32 low; + } s; + s64 ll; +}; + +s64 __muldi3(s64 u, s64 v) +{ + const union DWunion uu = { .ll = u }; + const union DWunion vv = { .ll = v }; + union DWunion w = { .ll = __umulsidi3(uu.s.low, vv.s.low) }; + + w.s.high += ((u32)uu.s.low * (u32)vv.s.high + + (u32)uu.s.high * (u32)vv.s.low); + + return w.ll; +} +EXPORT_SYMBOL(__muldi3); diff --git a/arch/parisc/lib/libgcc/__udivdi3.c b/arch/parisc/lib/libgcc/__udivdi3.c new file mode 100644 index 00000000000..740023d690f --- /dev/null +++ b/arch/parisc/lib/libgcc/__udivdi3.c @@ -0,0 +1,7 @@ +#include "libgcc.h" + +u64 __udivdi3(u64 num, u64 den) +{ + return __udivmoddi4(num, den, NULL); +} +EXPORT_SYMBOL(__udivdi3); diff --git a/arch/parisc/lib/libgcc/__udivmoddi4.c b/arch/parisc/lib/libgcc/__udivmoddi4.c new file mode 100644 index 00000000000..2df0caa5a7d --- /dev/null +++ b/arch/parisc/lib/libgcc/__udivmoddi4.c @@ -0,0 +1,31 @@ +#include "libgcc.h" + +u64 __udivmoddi4(u64 num, u64 den, u64 * rem_p) +{ + u64 quot = 0, qbit = 1; + + if (den == 0) { + BUG(); + } + + /* Left-justify denominator and count shift */ + while ((s64) den >= 0) { + den <<= 1; + qbit <<= 1; + } + + while (qbit) { + if (den <= num) { + num -= den; + quot += qbit; + } + den >>= 1; + qbit >>= 1; + } + + if (rem_p) + *rem_p = num; + + return quot; +} +EXPORT_SYMBOL(__udivmoddi4); diff --git a/arch/parisc/lib/libgcc/__udivmodsi4.c b/arch/parisc/lib/libgcc/__udivmodsi4.c new file mode 100644 index 00000000000..2a2fc28b202 --- /dev/null +++ b/arch/parisc/lib/libgcc/__udivmodsi4.c @@ -0,0 +1,31 @@ +#include "libgcc.h" + +u32 __udivmodsi4(u32 num, u32 den, u32 * rem_p) +{ + u32 quot = 0, qbit = 1; + + if (den == 0) { + BUG(); + } + + /* Left-justify denominator and count shift */ + while ((s32) den >= 0) { + den <<= 1; + qbit <<= 1; + } + + while (qbit) { + if (den <= num) { + num -= den; + quot += qbit; + } + den >>= 1; + qbit >>= 1; + } + + if (rem_p) + *rem_p = num; + + return quot; +} +EXPORT_SYMBOL(__udivmodsi4); diff --git a/arch/parisc/lib/libgcc/__udivsi3.c b/arch/parisc/lib/libgcc/__udivsi3.c new file mode 100644 index 00000000000..756a44164e9 --- /dev/null +++ b/arch/parisc/lib/libgcc/__udivsi3.c @@ -0,0 +1,7 @@ +#include "libgcc.h" + +u32 __udivsi3(u32 num, u32 den) +{ + return __udivmodsi4(num, den, NULL); +} +EXPORT_SYMBOL(__udivsi3); diff --git a/arch/parisc/lib/libgcc/__umoddi3.c b/arch/parisc/lib/libgcc/__umoddi3.c new file mode 100644 index 00000000000..ac744e948bc --- /dev/null +++ b/arch/parisc/lib/libgcc/__umoddi3.c @@ -0,0 +1,10 @@ +#include "libgcc.h" + +u64 __umoddi3(u64 num, u64 den) +{ + u64 v; + + (void)__udivmoddi4(num, den, &v); + return v; +} +EXPORT_SYMBOL(__umoddi3); diff --git a/arch/parisc/lib/libgcc/__umodsi3.c b/arch/parisc/lib/libgcc/__umodsi3.c new file mode 100644 index 00000000000..51f55aa89f9 --- /dev/null +++ b/arch/parisc/lib/libgcc/__umodsi3.c @@ -0,0 +1,10 @@ +#include "libgcc.h" + +u32 __umodsi3(u32 num, u32 den) +{ + u32 v; + + (void)__udivmodsi4(num, den, &v); + return v; +} +EXPORT_SYMBOL(__umodsi3); diff --git a/arch/parisc/lib/libgcc/__umulsidi3.c b/arch/parisc/lib/libgcc/__umulsidi3.c new file mode 100644 index 00000000000..396f669164d --- /dev/null +++ b/arch/parisc/lib/libgcc/__umulsidi3.c @@ -0,0 +1,46 @@ +#include "libgcc.h" + +#define __ll_B ((u32) 1 << (32 / 2)) +#define __ll_lowpart(t) ((u32) (t) & (__ll_B - 1)) +#define __ll_highpart(t) ((u32) (t) >> 16) + +#define umul_ppmm(w1, w0, u, v) \ + do { \ + u32 __x0, __x1, __x2, __x3; \ + u16 __ul, __vl, __uh, __vh; \ + \ + __ul = __ll_lowpart (u); \ + __uh = __ll_highpart (u); \ + __vl = __ll_lowpart (v); \ + __vh = __ll_highpart (v); \ + \ + __x0 = (u32) __ul * __vl; \ + __x1 = (u32) __ul * __vh; \ + __x2 = (u32) __uh * __vl; \ + __x3 = (u32) __uh * __vh; \ + \ + __x1 += __ll_highpart (__x0);/* this can't give carry */ \ + __x1 += __x2; /* but this indeed can */ \ + if (__x1 < __x2) /* did we get it? */ \ + __x3 += __ll_B; /* yes, add it in the proper pos. */ \ + \ + (w1) = __x3 + __ll_highpart (__x1); \ + (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \ + } while (0) + +union DWunion { + struct { + s32 high; + s32 low; + } s; + s64 ll; +}; + +u64 __umulsidi3(u32 u, u32 v) +{ + union DWunion __w; + + umul_ppmm(__w.s.high, __w.s.low, u, v); + + return __w.ll; +} diff --git a/arch/parisc/lib/libgcc/libgcc.h b/arch/parisc/lib/libgcc/libgcc.h new file mode 100644 index 00000000000..5a6f7a510fb --- /dev/null +++ b/arch/parisc/lib/libgcc/libgcc.h @@ -0,0 +1,32 @@ +#ifndef _PA_LIBGCC_H_ +#define _PA_LIBGCC_H_ + +#include <linux/types.h> +#include <linux/module.h> + +/* Cribbed from klibc/libgcc/ */ +u64 __ashldi3(u64 v, int cnt); +u64 __ashrdi3(u64 v, int cnt); + +u32 __clzsi2(u32 v); + +s64 __divdi3(s64 num, s64 den); +s32 __divsi3(s32 num, s32 den); + +u64 __lshrdi3(u64 v, int cnt); + +s64 __moddi3(s64 num, s64 den); +s32 __modsi3(s32 num, s32 den); + +u64 __udivdi3(u64 num, u64 den); +u32 __udivsi3(u32 num, u32 den); + +u64 __udivmoddi4(u64 num, u64 den, u64 * rem_p); +u32 __udivmodsi4(u32 num, u32 den, u32 * rem_p); + +u64 __umulsidi3(u32 u, u32 v); + +u64 __umoddi3(u64 num, u64 den); +u32 __umodsi3(u32 num, u32 den); + +#endif /*_PA_LIBGCC_H_*/ diff --git a/arch/parisc/lib/milli/Makefile b/arch/parisc/lib/milli/Makefile new file mode 100644 index 00000000000..9b24e9b1f3c --- /dev/null +++ b/arch/parisc/lib/milli/Makefile @@ -0,0 +1 @@ +obj-y := dyncall.o divI.o divU.o remI.o remU.o div_const.o mulI.o diff --git a/arch/parisc/lib/milli/divI.S b/arch/parisc/lib/milli/divI.S new file mode 100644 index 00000000000..ac106b7b6f2 --- /dev/null +++ b/arch/parisc/lib/milli/divI.S @@ -0,0 +1,254 @@ +/* 32 and 64-bit millicode, original author Hewlett-Packard + adapted for gcc by Paul Bame <bame@debian.org> + and Alan Modra <alan@linuxcare.com.au>. + + Copyright 2001, 2002, 2003 Free Software Foundation, Inc. + + This file is part of GCC and is released under the terms of + of the GNU General Public License as published by the Free Software + Foundation; either version 2, or (at your option) any later version. + See the file COPYING in the top-level GCC source directory for a copy + of the license. */ + +#include "milli.h" + +#ifdef L_divI +/* ROUTINES: $$divI, $$divoI + + Single precision divide for signed binary integers. + + The quotient is truncated towards zero. + The sign of the quotient is the XOR of the signs of the dividend and + divisor. + Divide by zero is trapped. + Divide of -2**31 by -1 is trapped for $$divoI but not for $$divI. + + INPUT REGISTERS: + . arg0 == dividend + . arg1 == divisor + . mrp == return pc + . sr0 == return space when called externally + + OUTPUT REGISTERS: + . arg0 = undefined + . arg1 = undefined + . ret1 = quotient + + OTHER REGISTERS AFFECTED: + . r1 = undefined + + SIDE EFFECTS: + . Causes a trap under the following conditions: + . divisor is zero (traps with ADDIT,= 0,25,0) + . dividend==-2**31 and divisor==-1 and routine is $$divoI + . (traps with ADDO 26,25,0) + . Changes memory at the following places: + . NONE + + PERMISSIBLE CONTEXT: + . Unwindable. + . Suitable for internal or external millicode. + . Assumes the special millicode register conventions. + + DISCUSSION: + . Branchs to other millicode routines using BE + . $$div_# for # being 2,3,4,5,6,7,8,9,10,12,14,15 + . + . For selected divisors, calls a divide by constant routine written by + . Karl Pettis. Eligible divisors are 1..15 excluding 11 and 13. + . + . The only overflow case is -2**31 divided by -1. + . Both routines return -2**31 but only $$divoI traps. */ + +RDEFINE(temp,r1) +RDEFINE(retreg,ret1) /* r29 */ +RDEFINE(temp1,arg0) + SUBSPA_MILLI_DIV + ATTR_MILLI + .import $$divI_2,millicode + .import $$divI_3,millicode + .import $$divI_4,millicode + .import $$divI_5,millicode + .import $$divI_6,millicode + .import $$divI_7,millicode + .import $$divI_8,millicode + .import $$divI_9,millicode + .import $$divI_10,millicode + .import $$divI_12,millicode + .import $$divI_14,millicode + .import $$divI_15,millicode + .export $$divI,millicode + .export $$divoI,millicode + .proc + .callinfo millicode + .entry +GSYM($$divoI) + comib,=,n -1,arg1,LREF(negative1) /* when divisor == -1 */ +GSYM($$divI) + ldo -1(arg1),temp /* is there at most one bit set ? */ + and,<> arg1,temp,r0 /* if not, don't use power of 2 divide */ + addi,> 0,arg1,r0 /* if divisor > 0, use power of 2 divide */ + b,n LREF(neg_denom) +LSYM(pow2) + addi,>= 0,arg0,retreg /* if numerator is negative, add the */ + add arg0,temp,retreg /* (denominaotr -1) to correct for shifts */ + extru,= arg1,15,16,temp /* test denominator with 0xffff0000 */ + extrs retreg,15,16,retreg /* retreg = retreg >> 16 */ + or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 16) */ + ldi 0xcc,temp1 /* setup 0xcc in temp1 */ + extru,= arg1,23,8,temp /* test denominator with 0xff00 */ + extrs retreg,23,24,retreg /* retreg = retreg >> 8 */ + or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 8) */ + ldi 0xaa,temp /* setup 0xaa in temp */ + extru,= arg1,27,4,r0 /* test denominator with 0xf0 */ + extrs retreg,27,28,retreg /* retreg = retreg >> 4 */ + and,= arg1,temp1,r0 /* test denominator with 0xcc */ + extrs retreg,29,30,retreg /* retreg = retreg >> 2 */ + and,= arg1,temp,r0 /* test denominator with 0xaa */ + extrs retreg,30,31,retreg /* retreg = retreg >> 1 */ + MILLIRETN +LSYM(neg_denom) + addi,< 0,arg1,r0 /* if arg1 >= 0, it's not power of 2 */ + b,n LREF(regular_seq) + sub r0,arg1,temp /* make denominator positive */ + comb,=,n arg1,temp,LREF(regular_seq) /* test against 0x80000000 and 0 */ + ldo -1(temp),retreg /* is there at most one bit set ? */ + and,= temp,retreg,r0 /* if so, the denominator is power of 2 */ + b,n LREF(regular_seq) + sub r0,arg0,retreg /* negate numerator */ + comb,=,n arg0,retreg,LREF(regular_seq) /* test against 0x80000000 */ + copy retreg,arg0 /* set up arg0, arg1 and temp */ + copy temp,arg1 /* before branching to pow2 */ + b LREF(pow2) + ldo -1(arg1),temp +LSYM(regular_seq) + comib,>>=,n 15,arg1,LREF(small_divisor) + add,>= 0,arg0,retreg /* move dividend, if retreg < 0, */ +LSYM(normal) + subi 0,retreg,retreg /* make it positive */ + sub 0,arg1,temp /* clear carry, */ + /* negate the divisor */ + ds 0,temp,0 /* set V-bit to the comple- */ + /* ment of the divisor sign */ + add retreg,retreg,retreg /* shift msb bit into carry */ + ds r0,arg1,temp /* 1st divide step, if no carry */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 2nd divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 3rd divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 4th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 5th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 6th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 7th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 8th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 9th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 10th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 11th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 12th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 13th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 14th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 15th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 16th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 17th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 18th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 19th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 20th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 21st divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 22nd divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 23rd divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 24th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 25th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 26th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 27th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 28th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 29th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 30th divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 31st divide step */ + addc retreg,retreg,retreg /* shift retreg with/into carry */ + ds temp,arg1,temp /* 32nd divide step, */ + addc retreg,retreg,retreg /* shift last retreg bit into retreg */ + xor,>= arg0,arg1,0 /* get correct sign of quotient */ + sub 0,retreg,retreg /* based on operand signs */ + MILLIRETN + nop + +LSYM(small_divisor) + +#if defined(CONFIG_64BIT) +/* Clear the upper 32 bits of the arg1 register. We are working with */ +/* small divisors (and 32-bit integers) We must not be mislead */ +/* by "1" bits left in the upper 32 bits. */ + depd %r0,31,32,%r25 +#endif + blr,n arg1,r0 + nop +/* table for divisor == 0,1, ... ,15 */ + addit,= 0,arg1,r0 /* trap if divisor == 0 */ + nop + MILLIRET /* divisor == 1 */ + copy arg0,retreg + MILLI_BEN($$divI_2) /* divisor == 2 */ + nop + MILLI_BEN($$divI_3) /* divisor == 3 */ + nop + MILLI_BEN($$divI_4) /* divisor == 4 */ + nop + MILLI_BEN($$divI_5) /* divisor == 5 */ + nop + MILLI_BEN($$divI_6) /* divisor == 6 */ + nop + MILLI_BEN($$divI_7) /* divisor == 7 */ + nop + MILLI_BEN($$divI_8) /* divisor == 8 */ + nop + MILLI_BEN($$divI_9) /* divisor == 9 */ + nop + MILLI_BEN($$divI_10) /* divisor == 10 */ + nop + b LREF(normal) /* divisor == 11 */ + add,>= 0,arg0,retreg + MILLI_BEN($$divI_12) /* divisor == 12 */ + nop + b LREF(normal) /* divisor == 13 */ + add,>= 0,arg0,retreg + MILLI_BEN($$divI_14) /* divisor == 14 */ + nop + MILLI_BEN($$divI_15) /* divisor == 15 */ + nop + +LSYM(negative1) + sub 0,arg0,retreg /* result is negation of dividend */ + MILLIRET + addo arg0,arg1,r0 /* trap iff dividend==0x80000000 && divisor==-1 */ + .exit + .procend + .end +#endif diff --git a/arch/parisc/lib/milli/divU.S b/arch/parisc/lib/milli/divU.S new file mode 100644 index 00000000000..9287fe2546f --- /dev/null +++ b/arch/parisc/lib/milli/divU.S @@ -0,0 +1,235 @@ +/* 32 and 64-bit millicode, original author Hewlett-Packard + adapted for gcc by Paul Bame <bame@debian.org> + and Alan Modra <alan@linuxcare.com.au>. + + Copyright 2001, 2002, 2003 Free Software Foundation, Inc. + + This file is part of GCC and is released under the terms of + of the GNU General Public License as published by the Free Software + Foundation; either version 2, or (at your option) any later version. + See the file COPYING in the top-level GCC source directory for a copy + of the license. */ + +#include "milli.h" + +#ifdef L_divU +/* ROUTINE: $$divU + . + . Single precision divide for unsigned integers. + . + . Quotient is truncated towards zero. + . Traps on divide by zero. + + INPUT REGISTERS: + . arg0 == dividend + . arg1 == divisor + . mrp == return pc + . sr0 == return space when called externally + + OUTPUT REGISTERS: + . arg0 = undefined + . arg1 = undefined + . ret1 = quotient + + OTHER REGISTERS AFFECTED: + . r1 = undefined + + SIDE EFFECTS: + . Causes a trap under the following conditions: + . divisor is zero + . Changes memory at the following places: + . NONE + + PERMISSIBLE CONTEXT: + . Unwindable. + . Does not create a stack frame. + . Suitable for internal or external millicode. + . Assumes the special millicode register conventions. + + DISCUSSION: + . Branchs to other millicode routines using BE: + . $$divU_# for 3,5,6,7,9,10,12,14,15 + . + . For selected small divisors calls the special divide by constant + . routines written by Karl Pettis. These are: 3,5,6,7,9,10,12,14,15. */ + +RDEFINE(temp,r1) +RDEFINE(retreg,ret1) /* r29 */ +RDEFINE(temp1,arg0) + SUBSPA_MILLI_DIV + ATTR_MILLI + .export $$divU,millicode + .import $$divU_3,millicode + .import $$divU_5,millicode + .import $$divU_6,millicode + .import $$divU_7,millicode + .import $$divU_9,millicode + .import $$divU_10,millicode + .import $$divU_12,millicode + .import $$divU_14,millicode + .import $$divU_15,millicode + .proc + .callinfo millicode + .entry +GSYM($$divU) +/* The subtract is not nullified since it does no harm and can be used + by the two cases that branch back to "normal". */ + ldo -1(arg1),temp /* is there at most one bit set ? */ + and,= arg1,temp,r0 /* if so, denominator is power of 2 */ + b LREF(regular_seq) + addit,= 0,arg1,0 /* trap for zero dvr */ + copy arg0,retreg + extru,= arg1,15,16,temp /* test denominator with 0xffff0000 */ + extru retreg,15,16,retreg /* retreg = retreg >> 16 */ + or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 16) */ + ldi 0xcc,temp1 /* setup 0xcc in temp1 */ + extru,= arg1,23,8,temp /* test denominator with 0xff00 */ + extru retreg,23,24,retreg /* retreg = retreg >> 8 */ + or arg1,temp,arg1 /* arg1 = arg1 | (arg1 >> 8) */ + ldi 0xaa,temp /* setup 0xaa in temp */ + extru,= arg1,27,4,r0 /* test denominator with 0xf0 */ + extru retreg,27,28,retreg /* retreg = retreg >> 4 */ + and,= arg1,temp1,r0 /* test denominator with 0xcc */ + ext |