diff options
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/Kconfig | 45 | ||||
| -rw-r--r-- | arch/mips/configs/ip27_defconfig | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/irixsig.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/reset.c | 5 | ||||
| -rw-r--r-- | arch/mips/kernel/setup.c | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/signal.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/signal32.c | 2 | ||||
| -rw-r--r-- | arch/mips/mm/init.c | 4 | ||||
| -rw-r--r-- | arch/mips/mm/pgtable.c | 2 | ||||
| -rw-r--r-- | arch/mips/sgi-ip27/ip27-memory.c | 5 | ||||
| -rw-r--r-- | arch/mips/vr41xx/common/Makefile | 2 | ||||
| -rw-r--r-- | arch/mips/vr41xx/common/giu.c | 455 |
12 files changed, 23 insertions, 507 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ab9944693f1..898de2df1fc 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -492,7 +492,7 @@ config SGI_SN0_N_MODE which allows for more memory. Your system is most probably running in M-Mode, so you should say N here. -config DISCONTIGMEM +config ARCH_DISCONTIGMEM_ENABLE bool default y if SGI_IP27 help @@ -1088,41 +1088,6 @@ config ARC32 depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32 default y -config FB - bool - depends on MIPS_MAGNUM_4000 || OLIVETTI_M700 - default y - ---help--- - The frame buffer device provides an abstraction for the graphics - hardware. It represents the frame buffer of some video hardware and - allows application software to access the graphics hardware through - a well-defined interface, so the software doesn't need to know - anything about the low-level (hardware register) stuff. - - Frame buffer devices work identically across the different - architectures supported by Linux and make the implementation of - application programs easier and more portable; at this point, an X - server exists which uses the frame buffer device exclusively. - On several non-X86 architectures, the frame buffer device is the - only way to use the graphics hardware. - - The device is accessed through special device nodes, usually located - in the /dev directory, i.e. /dev/fb*. - - You need an utility program called fbset to make full use of frame - buffer devices. Please read <file:Documentation/fb/framebuffer.txt> - and the Framebuffer-HOWTO at <http://www.tldp.org/docs.html#howto> - for more information. - - Say Y here and to the driver for your graphics board below if you - are compiling a kernel for a non-x86 architecture. - - If you are compiling for the x86 architecture, you can say Y if you - want to play with it, but it is not essential. Please note that - running graphical applications that directly touch the hardware - (e.g. an accelerated X server) and that are not frame buffer - device-aware may cause unexpected results. If unsure, say N. - config HAVE_STD_PC_SERIAL_PORT bool @@ -1416,6 +1381,12 @@ config HIGHMEM bool "High Memory Support" depends on MIPS32 && (CPU_R3000 || CPU_SB1 || CPU_R7000 || CPU_RM9000 || CPU_R10000) && !(MACH_DECSTATION || MOMENCO_JAGUAR_ATX) +config ARCH_FLATMEM_ENABLE + def_bool y + depends on !NUMA + +source "mm/Kconfig" + config SMP bool "Multi-Processing support" depends on CPU_RM9000 || (SIBYTE_SB1250 && !SIBYTE_STANDALONE) || SGI_IP27 @@ -1634,6 +1605,8 @@ config PM endmenu +source "net/Kconfig" + source "drivers/Kconfig" source "fs/Kconfig" diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index 13472292d0e..b5bab3a42fc 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -82,7 +82,7 @@ CONFIG_STOP_MACHINE=y # CONFIG_SGI_IP22 is not set CONFIG_SGI_IP27=y # CONFIG_SGI_SN0_N_MODE is not set -CONFIG_DISCONTIGMEM=y +CONFIG_ARCH_DISCONTIGMEM_ENABLE=y CONFIG_NUMA=y # CONFIG_MAPPED_KERNEL is not set # CONFIG_REPLICATE_KTEXT is not set diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c index 3f956f809fa..40244782a8e 100644 --- a/arch/mips/kernel/irixsig.c +++ b/arch/mips/kernel/irixsig.c @@ -178,7 +178,7 @@ asmlinkage int do_irix_signal(sigset_t *oldset, struct pt_regs *regs) if (!user_mode(regs)) return 1; - if (try_to_freeze(0)) + if (try_to_freeze()) goto no_signal; if (!oldset) diff --git a/arch/mips/kernel/reset.c b/arch/mips/kernel/reset.c index 7e0a9821931..ae2ba67b7ef 100644 --- a/arch/mips/kernel/reset.c +++ b/arch/mips/kernel/reset.c @@ -26,18 +26,13 @@ void machine_restart(char *command) _machine_restart(command); } -EXPORT_SYMBOL(machine_restart); - void machine_halt(void) { _machine_halt(); } -EXPORT_SYMBOL(machine_halt); - void machine_power_off(void) { _machine_power_off(); } -EXPORT_SYMBOL(machine_power_off); diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 6018ca25ace..3a240e3e004 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -33,6 +33,7 @@ #include <linux/root_dev.h> #include <linux/highmem.h> #include <linux/console.h> +#include <linux/mmzone.h> #include <asm/addrspace.h> #include <asm/bootinfo.h> @@ -356,6 +357,8 @@ static inline void bootmem_init(void) } #endif + memory_present(0, first_usable_pfn, max_low_pfn); + /* Initialize the boot-time allocator with low memory only. */ bootmap_size = init_bootmem(first_usable_pfn, max_low_pfn); @@ -557,6 +560,7 @@ void __init setup_arch(char **cmdline_p) parse_cmdline_early(); bootmem_init(); + sparse_init(); paging_init(); resource_init(); } diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 508026ae584..65ee15396ff 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c @@ -457,7 +457,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs) if (!user_mode(regs)) return 1; - if (try_to_freeze(0)) + if (try_to_freeze()) goto no_signal; if (!oldset) diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 1f3b19124c0..c1a69cf232f 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -774,7 +774,7 @@ int do_signal32(sigset_t *oldset, struct pt_regs *regs) if (!user_mode(regs)) return 1; - if (try_to_freeze(0)) + if (try_to_freeze()) goto no_signal; if (!oldset) diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 73843c52877..9c9a271c8a3 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -128,7 +128,7 @@ static void __init fixrange_init(unsigned long start, unsigned long end, #endif /* CONFIG_MIPS64 */ #endif /* CONFIG_HIGHMEM */ -#ifndef CONFIG_DISCONTIGMEM +#ifndef CONFIG_NEED_MULTIPLE_NODES extern void pagetable_init(void); void __init paging_init(void) @@ -253,7 +253,7 @@ void __init mem_init(void) initsize >> 10, (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); } -#endif /* !CONFIG_DISCONTIGMEM */ +#endif /* !CONFIG_NEED_MULTIPLE_NODES */ #ifdef CONFIG_BLK_DEV_INITRD void free_initrd_mem(unsigned long start, unsigned long end) diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c index 3b88fdeef32..3fe94202da8 100644 --- a/arch/mips/mm/pgtable.c +++ b/arch/mips/mm/pgtable.c @@ -5,7 +5,7 @@ void show_mem(void) { -#ifndef CONFIG_DISCONTIGMEM /* XXX(hch): later.. */ +#ifndef CONFIG_NEED_MULTIPLE_NODES /* XXX(hch): later.. */ int pfn, total = 0, reserved = 0; int shared = 0, cached = 0; int highmem = 0; diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index 0a44a98d7ad..a160d04f7db 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c @@ -549,9 +549,8 @@ void __init mem_init(void) */ numslots = node_getlastslot(node); for (slot = 1; slot <= numslots; slot++) { - p = NODE_DATA(node)->node_mem_map + - (slot_getbasepfn(node, slot) - - slot_getbasepfn(node, 0)); + p = nid_page_nr(node, slot_getbasepfn(node, slot) - + slot_getbasepfn(node, 0)); /* * Free valid memory in current slot. diff --git a/arch/mips/vr41xx/common/Makefile b/arch/mips/vr41xx/common/Makefile index 92c11e9bbb3..fa98ef3855b 100644 --- a/arch/mips/vr41xx/common/Makefile +++ b/arch/mips/vr41xx/common/Makefile @@ -2,7 +2,7 @@ # Makefile for common code of the NEC VR4100 series. # -obj-y += bcu.o cmu.o giu.o icu.o init.o int-handler.o pmu.o +obj-y += bcu.o cmu.o icu.o init.o int-handler.o pmu.o obj-$(CONFIG_VRC4173) += vrc4173.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c deleted file mode 100644 index 9c6b21a79e8..00000000000 --- a/arch/mips/vr41xx/common/giu.c +++ /dev/null @@ -1,455 +0,0 @@ -/* - * giu.c, General-purpose I/O Unit Interrupt routines for NEC VR4100 series. - * - * Copyright (C) 2002 MontaVista Software Inc. - * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> - * Copyright (C) 2003-2004 Yoichi Yuasa <yuasa@hh.iij4u.or.jp> - * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* - * Changes: - * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> - * - New creation, NEC VR4111, VR4121, VR4122 and VR4131 are supported. - * - * Yoichi Yuasa <yuasa@hh.iij4u.or.jp> - * - Added support for NEC VR4133. - * - Removed board_irq_init. - */ -#include <linux/errno.h> -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/smp.h> -#include <linux/types.h> - -#include <asm/cpu.h> -#include <asm/io.h> -#include <asm/vr41xx/vr41xx.h> - -#define GIUIOSELL_TYPE1 KSEG1ADDR(0x0b000100) -#define GIUIOSELL_TYPE2 KSEG1ADDR(0x0f000140) - -#define GIUIOSELL 0x00 -#define GIUIOSELH 0x02 -#define GIUINTSTATL 0x08 -#define GIUINTSTATH 0x0a -#define GIUINTENL 0x0c -#define GIUINTENH 0x0e -#define GIUINTTYPL 0x10 -#define GIUINTTYPH 0x12 -#define GIUINTALSELL 0x14 -#define GIUINTALSELH 0x16 -#define GIUINTHTSELL 0x18 -#define GIUINTHTSELH 0x1a -#define GIUFEDGEINHL 0x20 -#define GIUFEDGEINHH 0x22 -#define GIUREDGEINHL 0x24 -#define GIUREDGEINHH 0x26 - -static uint32_t giu_base; - -static struct irqaction giu_cascade = { - .handler = no_action, - .mask = CPU_MASK_NONE, - .name = "cascade", -}; - -#define read_giuint(offset) readw(giu_base + (offset)) -#define write_giuint(val, offset) writew((val), giu_base + (offset)) - -#define GIUINT_HIGH_OFFSET 16 - -static inline uint16_t set_giuint(uint8_t offset, uint16_t set) -{ - uint16_t res; - - res = read_giuint(offset); - res |= set; - write_giuint(res, offset); - - return res; -} - -static inline uint16_t clear_giuint(uint8_t offset, uint16_t clear) -{ - uint16_t res; - - res = read_giuint(offset); - res &= ~clear; - write_giuint(res, offset); - - return res; -} - -static unsigned int startup_giuint_low_irq(unsigned int irq) -{ - unsigned int pin; - - pin = GIU_IRQ_TO_PIN(irq); - write_giuint((uint16_t)1 << pin, GIUINTSTATL); - set_giuint(GIUINTENL, (uint16_t)1 << pin); - - return 0; -} - -static void shutdown_giuint_low_irq(unsigned int irq) -{ - clear_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); -} - -static void enable_giuint_low_irq(unsigned int irq) -{ - set_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); -} - -#define disable_giuint_low_irq shutdown_giuint_low_irq - -static void ack_giuint_low_irq(unsigned int irq) -{ - unsigned int pin; - - pin = GIU_IRQ_TO_PIN(irq); - clear_giuint(GIUINTENL, (uint16_t)1 << pin); - write_giuint((uint16_t)1 << pin, GIUINTSTATL); -} - -static void end_giuint_low_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - set_giuint(GIUINTENL, (uint16_t)1 << GIU_IRQ_TO_PIN(irq)); -} - -static struct hw_interrupt_type giuint_low_irq_type = { - .typename = "GIUINTL", - .startup = startup_giuint_low_irq, - .shutdown = shutdown_giuint_low_irq, - .enable = enable_giuint_low_irq, - .disable = disable_giuint_low_irq, - .ack = ack_giuint_low_irq, - .end = end_giuint_low_irq, -}; - -static unsigned int startup_giuint_high_irq(unsigned int irq) -{ - unsigned int pin; - - pin = GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET); - write_giuint((uint16_t)1 << pin, GIUINTSTATH); - set_giuint(GIUINTENH, (uint16_t)1 << pin); - - return 0; -} - -static void shutdown_giuint_high_irq(unsigned int irq) -{ - clear_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); -} - -static void enable_giuint_high_irq(unsigned int irq) -{ - set_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); -} - -#define disable_giuint_high_irq shutdown_giuint_high_irq - -static void ack_giuint_high_irq(unsigned int irq) -{ - unsigned int pin; - - pin = GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET); - clear_giuint(GIUINTENH, (uint16_t)1 << pin); - write_giuint((uint16_t)1 << pin, GIUINTSTATH); -} - -static void end_giuint_high_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) - set_giuint(GIUINTENH, (uint16_t)1 << GIU_IRQ_TO_PIN(irq - GIUINT_HIGH_OFFSET)); -} - -static struct hw_interrupt_type giuint_high_irq_type = { - .typename = "GIUINTH", - .startup = startup_giuint_high_irq, - .shutdown = shutdown_giuint_high_irq, - .enable = enable_giuint_high_irq, - .disable = disable_giuint_high_irq, - .ack = ack_giuint_high_irq, - .end = end_giuint_high_irq, -}; - -void __init init_vr41xx_giuint_irq(void) -{ - int i; - - for (i = GIU_IRQ_BASE; i <= GIU_IRQ_LAST; i++) { - if (i < (GIU_IRQ_BASE + GIUINT_HIGH_OFFSET)) - irq_desc[i].handler = &giuint_low_irq_type; - else - irq_desc[i].handler = &giuint_high_irq_type; - } - - setup_irq(GIUINT_CASCADE_IRQ, &giu_cascade); -} - -void vr41xx_set_irq_trigger(int pin, int trigger, int hold) -{ - uint16_t mask; - - if (pin < GIUINT_HIGH_OFFSET) { - mask = (uint16_t)1 << pin; - if (trigger != TRIGGER_LEVEL) { - set_giuint(GIUINTTYPL, mask); - if (hold == SIGNAL_HOLD) - set_giuint(GIUINTHTSELL, mask); - else - clear_giuint(GIUINTHTSELL, mask); - if (current_cpu_data.cputype == CPU_VR4133) { - switch (trigger) { - case TRIGGER_EDGE_FALLING: - set_giuint(GIUFEDGEINHL, mask); - clear_giuint(GIUREDGEINHL, mask); - break; - case TRIGGER_EDGE_RISING: - clear_giuint(GIUFEDGEINHL, mask); - set_giuint(GIUREDGEINHL, mask); - break; - default: - set_giuint(GIUFEDGEINHL, mask); - set_giuint(GIUREDGEINHL, mask); - break; - } - } - } else { - clear_giuint(GIUINTTYPL, mask); - clear_giuint(GIUINTHTSELL, mask); - } - write_giuint(mask, GIUINTSTATL); - } else { - mask = (uint16_t)1 << (pin - GIUINT_HIGH_OFFSET); - if (trigger != TRIGGER_LEVEL) { - set_giuint(GIUINTTYPH, mask); - if (hold == SIGNAL_HOLD) - set_giuint(GIUINTHTSELH, mask); - else - clear_giuint(GIUINTHTSELH, mask); - if (current_cpu_data.cputype == CPU_VR4133) { - switch (trigger) { - case TRIGGER_EDGE_FALLING: - set_giuint(GIUFEDGEINHH, mask); - clear_giuint(GIUREDGEINHH, mask); - break; - case TRIGGER_EDGE_RISING: - clear_giuint(GIUFEDGEINHH, mask); - set_giuint(GIUREDGEINHH, mask); - break; - default: - set_giuint(GIUFEDGEINHH, mask); - set_giuint(GIUREDGEINHH, mask); - break; - } - } - } else { - clear_giuint(GIUINTTYPH, mask); - clear_giuint(GIUINTHTSELH, mask); - } - write_giuint(mask, GIUINTSTATH); - } -} - -EXPORT_SYMBOL(vr41xx_set_irq_trigger); - -void vr41xx_set_irq_level(int pin, int level) -{ - uint16_t mask; - - if (pin < GIUINT_HIGH_OFFSET) { - mask = (uint16_t)1 << pin; - if (level == LEVEL_HIGH) - set_giuint(GIUINTALSELL, mask); - else - clear_giuint(GIUINTALSELL, mask); - write_giuint(mask, GIUINTSTATL); - } else { - mask = (uint16_t)1 << (pin - GIUINT_HIGH_OFFSET); - if (level == LEVEL_HIGH) - set_giuint(GIUINTALSELH, mask); - else - clear_giuint(GIUINTALSELH, mask); - write_giuint(mask, GIUINTSTATH); - } -} - -EXPORT_SYMBOL(vr41xx_set_irq_level); - -#define GIUINT_NR_IRQS 32 - -enum { - GIUINT_NO_CASCADE, - GIUINT_CASCADE -}; - -struct vr41xx_giuint_cascade { - unsigned int flag; - int (*get_irq_number)(int irq); -}; - -static struct vr41xx_giuint_cascade giuint_cascade[GIUINT_NR_IRQS]; - -static int no_irq_number(int irq) -{ - return -EINVAL; -} - -int vr41xx_cascade_irq(unsigned int irq, int (*get_irq_number)(int irq)) -{ - unsigned int pin; - int retval; - - if (irq < GIU_IRQ(0) || irq > GIU_IRQ(31)) - return -EINVAL; - - if(!get_irq_number) - return -EINVAL; - - pin = GIU_IRQ_TO_PIN(irq); - giuint_cascade[pin].flag = GIUINT_CASCADE; - giuint_cascade[pin].get_irq_number = get_irq_number; - - retval = setup_irq(irq, &giu_cascade); - if (retval != 0) { - giuint_cascade[pin].flag = GIUINT_NO_CASCADE; - giuint_cascade[pin].get_irq_number = no_irq_number; - } - - return retval; -} - -EXPORT_SYMBOL(vr41xx_cascade_irq); - -static inline int get_irq_pin_number(void) -{ - uint16_t pendl, pendh, maskl, maskh; - int i; - - pendl = read_giuint(GIUINTSTATL); - pendh = read_giuint(GIUINTSTATH); - maskl = read_giuint(GIUINTENL); - maskh = read_giuint(GIUINTENH); - - maskl &= pendl; - maskh &= pendh; - - if (maskl) { - for (i = 0; i < 16; i++) { - if (maskl & ((uint16_t)1 << i)) - return i; - } - } else if (maskh) { - for (i = 0; i < 16; i++) { - if (maskh & ((uint16_t)1 << i)) - return i + GIUINT_HIGH_OFFSET; - } - } - - printk(KERN_ERR "spurious GIU interrupt: %04x(%04x),%04x(%04x)\n", - maskl, pendl, maskh, pendh); - - atomic_inc(&irq_err_count); - - return -1; -} - -static inline void ack_giuint_irq(int pin) -{ - if (pin < GIUINT_HIGH_OFFSET) { - clear_giuint(GIUINTENL, (uint16_t)1 << pin); - write_giuint((uint16_t)1 << pin, GIUINTSTATL); - } else { - pin -= GIUINT_HIGH_OFFSET; - clear_giuint(GIUINTENH, (uint16_t)1 << pin); - write_giuint((uint16_t)1 << pin, GIUINTSTATH); - } -} - -static inline void end_giuint_irq(int pin) -{ - if (pin < GIUINT_HIGH_OFFSET) - set_giuint(GIUINTENL, (uint16_t)1 << pin); - else - set_giuint(GIUINTENH, (uint16_t)1 << (pin - GIUINT_HIGH_OFFSET)); -} - -void giuint_irq_dispatch(struct pt_regs *regs) -{ - struct vr41xx_giuint_cascade *cascade; - unsigned int giuint_irq; - int pin; - - pin = get_irq_pin_number(); - if (pin < 0) - return; - - disable_irq(GIUINT_CASCADE_IRQ); - - cascade = &giuint_cascade[pin]; - giuint_irq = GIU_IRQ(pin); - if (cascade->flag == GIUINT_CASCADE) { - int irq = cascade->get_irq_number(giuint_irq); - ack_giuint_irq(pin); - if (irq >= 0) - do_IRQ(irq, regs); - end_giuint_irq(pin); - } else { - do_IRQ(giuint_irq, regs); - } - - enable_irq(GIUINT_CASCADE_IRQ); -} - -static int __init vr41xx_giu_init(void) -{ - int i; - - switch (current_cpu_data.cputype) { - case CPU_VR4111: - case CPU_VR4121: - giu_base = GIUIOSELL_TYPE1; - break; - case CPU_VR4122: - case CPU_VR4131: - case CPU_VR4133: - giu_base = GIUIOSELL_TYPE2; - break; - default: - printk(KERN_ERR "GIU: Unexpected CPU of NEC VR4100 series\n"); - return -EINVAL; - } - - for (i = 0; i < GIUINT_NR_IRQS; i++) { - if (i < GIUINT_HIGH_OFFSET) - clear_giuint(GIUINTENL, (uint16_t)1 << i); - else - clear_giuint(GIUINTENH, (uint16_t)1 << (i - GIUINT_HIGH_OFFSET)); - giuint_cascade[i].flag = GIUINT_NO_CASCADE; - giuint_cascade[i].get_irq_number = no_irq_number; - } - - return 0; -} - -early_initcall(vr41xx_giu_init); |