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-rw-r--r--arch/mips/Kconfig101
-rw-r--r--arch/mips/Makefile1
-rw-r--r--arch/mips/arc/identify.c1
-rw-r--r--arch/mips/au1000/common/au1xxx_irqmap.c1
-rw-r--r--arch/mips/au1000/common/dbdma.c9
-rw-r--r--arch/mips/au1000/common/dbg_io.c1
-rw-r--r--arch/mips/au1000/common/dma.c1
-rw-r--r--arch/mips/au1000/common/gpio.c1
-rw-r--r--arch/mips/au1000/common/irq.c37
-rw-r--r--arch/mips/au1000/common/pci.c1
-rw-r--r--arch/mips/au1000/common/platform.c1
-rw-r--r--arch/mips/au1000/common/power.c23
-rw-r--r--arch/mips/au1000/common/reset.c1
-rw-r--r--arch/mips/au1000/common/setup.c1
-rw-r--r--arch/mips/au1000/common/time.c1
-rw-r--r--arch/mips/au1000/common/usbdev.c8
-rw-r--r--arch/mips/au1000/csb250/board_setup.c1
-rw-r--r--arch/mips/au1000/csb250/init.c6
-rw-r--r--arch/mips/au1000/db1x00/board_setup.c1
-rw-r--r--arch/mips/au1000/db1x00/init.c1
-rw-r--r--arch/mips/au1000/db1x00/irqmap.c1
-rw-r--r--arch/mips/au1000/db1x00/mirage_ts.c1
-rw-r--r--arch/mips/au1000/hydrogen3/board_setup.c1
-rw-r--r--arch/mips/au1000/hydrogen3/init.c1
-rw-r--r--arch/mips/au1000/mtx-1/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1000/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1100/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1200/board_setup.c1
-rw-r--r--arch/mips/au1000/pb1200/irqmap.c3
-rw-r--r--arch/mips/au1000/pb1500/board_setup.c1
-rw-r--r--arch/mips/au1000/xxs1500/board_setup.c1
-rw-r--r--arch/mips/basler/excite/excite_iodev.c2
-rw-r--r--arch/mips/basler/excite/excite_setup.c2
-rw-r--r--arch/mips/cobalt/console.c1
-rw-r--r--arch/mips/cobalt/setup.c1
-rw-r--r--arch/mips/ddb5xxx/common/prom.c3
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq.c1
-rw-r--r--arch/mips/ddb5xxx/ddb5477/irq_5477.c2
-rw-r--r--arch/mips/ddb5xxx/ddb5477/setup.c1
-rw-r--r--arch/mips/dec/int-handler.S1
-rw-r--r--arch/mips/dec/ioasic-irq.c4
-rw-r--r--arch/mips/dec/kn02-irq.c2
-rw-r--r--arch/mips/dec/prom/init.c1
-rw-r--r--arch/mips/dec/prom/memory.c1
-rw-r--r--arch/mips/dec/setup.c4
-rw-r--r--arch/mips/galileo-boards/ev96100/setup.c1
-rw-r--r--arch/mips/galileo-boards/ev96100/time.c1
-rw-r--r--arch/mips/gt64120/common/Makefile1
-rw-r--r--arch/mips/gt64120/common/pci.c147
-rw-r--r--arch/mips/gt64120/common/time.c3
-rw-r--r--arch/mips/gt64120/ev64120/irq.c2
-rw-r--r--arch/mips/gt64120/momenco_ocelot/dbg_io.c1
-rw-r--r--arch/mips/gt64120/momenco_ocelot/setup.c4
-rw-r--r--arch/mips/gt64120/wrppmc/Makefile2
-rw-r--r--arch/mips/gt64120/wrppmc/int-handler.S59
-rw-r--r--arch/mips/gt64120/wrppmc/irq.c20
-rw-r--r--arch/mips/gt64120/wrppmc/setup.c2
-rw-r--r--arch/mips/gt64120/wrppmc/time.c4
-rw-r--r--arch/mips/ite-boards/generic/dbg_io.c1
-rw-r--r--arch/mips/ite-boards/generic/irq.c4
-rw-r--r--arch/mips/ite-boards/generic/it8172_cir.c1
-rw-r--r--arch/mips/ite-boards/generic/it8172_setup.c1
-rw-r--r--arch/mips/ite-boards/generic/pmon_prom.c1
-rw-r--r--arch/mips/jazz/irq.c2
-rw-r--r--arch/mips/jazz/setup.c1
-rw-r--r--arch/mips/jmr3927/rbhma3100/init.c1
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c3
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c1
-rw-r--r--arch/mips/kernel/apm.c2
-rw-r--r--arch/mips/kernel/asm-offsets.c1
-rw-r--r--arch/mips/kernel/cpu-bugs64.c1
-rw-r--r--arch/mips/kernel/cpu-probe.c3
-rw-r--r--arch/mips/kernel/entry.S7
-rw-r--r--arch/mips/kernel/gdb-low.S5
-rw-r--r--arch/mips/kernel/gdb-stub.c1
-rw-r--r--arch/mips/kernel/genex.S3
-rw-r--r--arch/mips/kernel/head.S3
-rw-r--r--arch/mips/kernel/i8259.c4
-rw-r--r--arch/mips/kernel/irq-msc01.c4
-rw-r--r--arch/mips/kernel/irq-mv6434x.c2
-rw-r--r--arch/mips/kernel/irq-rm7000.c2
-rw-r--r--arch/mips/kernel/irq-rm9000.c4
-rw-r--r--arch/mips/kernel/irq.c5
-rw-r--r--arch/mips/kernel/irq_cpu.c4
-rw-r--r--arch/mips/kernel/linux32.c1
-rw-r--r--arch/mips/kernel/mips_ksyms.c1
-rw-r--r--arch/mips/kernel/proc.c1
-rw-r--r--arch/mips/kernel/process.c1
-rw-r--r--arch/mips/kernel/ptrace.c1
-rw-r--r--arch/mips/kernel/r2300_switch.S1
-rw-r--r--arch/mips/kernel/r4k_fpu.S1
-rw-r--r--arch/mips/kernel/r4k_switch.S7
-rw-r--r--arch/mips/kernel/rtlx.c2
-rw-r--r--arch/mips/kernel/scall32-o32.S2
-rw-r--r--arch/mips/kernel/scall64-64.S2
-rw-r--r--arch/mips/kernel/scall64-n32.S2
-rw-r--r--arch/mips/kernel/scall64-o32.S2
-rw-r--r--arch/mips/kernel/setup.c4
-rw-r--r--arch/mips/kernel/signal-common.h1
-rw-r--r--arch/mips/kernel/signal.c1
-rw-r--r--arch/mips/kernel/smp-mt.c4
-rw-r--r--arch/mips/kernel/smtc-asm.S10
-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/kernel/syscall.c9
-rw-r--r--arch/mips/kernel/time.c3
-rw-r--r--arch/mips/kernel/traps.c16
-rw-r--r--arch/mips/kernel/unaligned.c1
-rw-r--r--arch/mips/kernel/vmlinux.lds.S1
-rw-r--r--arch/mips/lasat/interrupt.c2
-rw-r--r--arch/mips/lasat/lasat_board.c1
-rw-r--r--arch/mips/lasat/reset.c1
-rw-r--r--arch/mips/lasat/setup.c1
-rw-r--r--arch/mips/lasat/sysctl.c1
-rw-r--r--arch/mips/lib-32/dump_tlb.c1
-rw-r--r--arch/mips/lib-64/dump_tlb.c1
-rw-r--r--arch/mips/lib/memcpy.S1
-rw-r--r--arch/mips/math-emu/kernel_linkage.c1
-rw-r--r--arch/mips/mips-boards/atlas/atlas_int.c2
-rw-r--r--arch/mips/mips-boards/atlas/atlas_setup.c1
-rw-r--r--arch/mips/mips-boards/generic/init.c1
-rw-r--r--arch/mips/mips-boards/generic/memory.c1
-rw-r--r--arch/mips/mips-boards/generic/printf.c1
-rw-r--r--arch/mips/mips-boards/generic/reset.c1
-rw-r--r--arch/mips/mips-boards/generic/time.c1
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c1
-rw-r--r--arch/mips/mips-boards/sead/sead_setup.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_IRQ.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_irq.S1
-rw-r--r--arch/mips/mips-boards/sim/sim_setup.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_smp.c1
-rw-r--r--arch/mips/mips-boards/sim/sim_time.c1
-rw-r--r--arch/mips/mm/Makefile1
-rw-r--r--arch/mips/mm/c-r4k.c100
-rw-r--r--arch/mips/mm/c-sb1.c1
-rw-r--r--arch/mips/mm/cache.c1
-rw-r--r--arch/mips/mm/cerr-sb1.c1
-rw-r--r--arch/mips/mm/dma-coherent.c1
-rw-r--r--arch/mips/mm/dma-noncoherent.c1
-rw-r--r--arch/mips/mm/highmem.c1
-rw-r--r--arch/mips/mm/init.c1
-rw-r--r--arch/mips/mm/pg-sb1.c1
-rw-r--r--arch/mips/mm/pgtable-32.c1
-rw-r--r--arch/mips/mm/pgtable.c1
-rw-r--r--arch/mips/mm/sc-mips.c112
-rw-r--r--arch/mips/mm/tlb-r4k.c1
-rw-r--r--arch/mips/mm/tlb-r8k.c1
-rw-r--r--arch/mips/mm/tlbex.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/dbg_io.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/irq.c2
-rw-r--r--arch/mips/momentum/jaguar_atx/prom.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/reset.c1
-rw-r--r--arch/mips/momentum/jaguar_atx/setup.c5
-rw-r--r--arch/mips/momentum/ocelot_3/irq.c2
-rw-r--r--arch/mips/momentum/ocelot_3/prom.c1
-rw-r--r--arch/mips/momentum/ocelot_c/cpci-irq.c2
-rw-r--r--arch/mips/momentum/ocelot_c/dbg_io.c1
-rw-r--r--arch/mips/momentum/ocelot_c/irq.c4
-rw-r--r--arch/mips/momentum/ocelot_c/ocelot_c_fpga.h1
-rw-r--r--arch/mips/momentum/ocelot_c/prom.c1
-rw-r--r--arch/mips/momentum/ocelot_c/reset.c1
-rw-r--r--arch/mips/momentum/ocelot_c/setup.c5
-rw-r--r--arch/mips/momentum/ocelot_c/uart-irq.c4
-rw-r--r--arch/mips/momentum/ocelot_g/dbg_io.c1
-rw-r--r--arch/mips/momentum/ocelot_g/gt-irq.c3
-rw-r--r--arch/mips/momentum/ocelot_g/prom.c1
-rw-r--r--arch/mips/momentum/ocelot_g/setup.c5
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c148
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/fixup-atlas.c1
-rw-r--r--arch/mips/pci/fixup-vr4133.c1
-rw-r--r--arch/mips/pci/ops-au1000.c1
-rw-r--r--arch/mips/pci/ops-tx4927.c8
-rw-r--r--arch/mips/pci/ops-tx4938.c8
-rw-r--r--arch/mips/pci/pci-bcm1480.c1
-rw-r--r--arch/mips/pci/pci-bcm1480ht.c1
-rw-r--r--arch/mips/pci/pci-ip32.c1
-rw-r--r--arch/mips/pci/pci-sb1250.c1
-rw-r--r--arch/mips/pci/pci.c5
-rw-r--r--arch/mips/philips/pnx8550/common/int.c15
-rw-r--r--arch/mips/philips/pnx8550/common/setup.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/ht.c5
-rw-r--r--arch/mips/pmc-sierra/yosemite/irq.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/prom.c1
-rw-r--r--arch/mips/sgi-ip22/ip22-eisa.c5
-rw-r--r--arch/mips/sgi-ip22/ip22-int.c13
-rw-r--r--arch/mips/sgi-ip22/ip22-setup.c1
-rw-r--r--arch/mips/sgi-ip27/Kconfig3
-rw-r--r--arch/mips/sgi-ip27/Makefile11
-rw-r--r--arch/mips/sgi-ip27/ip27-console.c40
-rw-r--r--arch/mips/sgi-ip27/ip27-init.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c5
-rw-r--r--arch/mips/sgi-ip27/ip27-klnuma.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-memory.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-reset.c1
-rw-r--r--arch/mips/sgi-ip27/ip27-timer.c2
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c14
-rw-r--r--arch/mips/sgi-ip32/ip32-setup.c1
-rw-r--r--arch/mips/sibyte/Kconfig3
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c5
-rw-r--r--arch/mips/sibyte/bcm1480/setup.c1
-rw-r--r--arch/mips/sibyte/bcm1480/time.c1
-rw-r--r--arch/mips/sibyte/cfe/console.c1
-rw-r--r--arch/mips/sibyte/cfe/setup.c1
-rw-r--r--arch/mips/sibyte/sb1250/bus_watcher.c1
-rw-r--r--arch/mips/sibyte/sb1250/irq.c5
-rw-r--r--arch/mips/sibyte/sb1250/prom.c1
-rw-r--r--arch/mips/sibyte/sb1250/setup.c1
-rw-r--r--arch/mips/sibyte/sb1250/time.c1
-rw-r--r--arch/mips/sibyte/swarm/setup.c1
-rw-r--r--arch/mips/sni/irq.c2
-rw-r--r--arch/mips/sni/setup.c1
-rw-r--r--arch/mips/tx4927/common/tx4927_irq.c5
-rw-r--r--arch/mips/tx4927/common/tx4927_setup.c1
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c17
-rw-r--r--arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c1
-rw-r--r--arch/mips/tx4938/common/irq.c4
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/irq.c2
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/prom.c1
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/setup.c1
-rw-r--r--arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c1
-rw-r--r--arch/mips/vr41xx/common/icu.c4
-rw-r--r--arch/mips/vr41xx/common/irq.c4
-rw-r--r--arch/mips/vr41xx/common/vrc4173.c2
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/init.c1
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/irq.c2
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c1
-rw-r--r--arch/mips/vr41xx/nec-cmbvr4133/setup.c1
227 files changed, 591 insertions, 702 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 35e038a974c..747a9c1228f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -308,6 +308,7 @@ config MIPS_ATLAS
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
help
This enables support for the MIPS Technologies Atlas evaluation
board.
@@ -324,6 +325,7 @@ config MIPS_MALTA
select I8259
select MIPS_BOARDS_GEN
select MIPS_BONITO64
+ select MIPS_CPU_SCACHE
select MIPS_GT64120
select MIPS_MSC
select SWAP_IO_SPACE
@@ -336,6 +338,7 @@ config MIPS_MALTA
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_MULTITHREADING
help
This enables support for the MIPS Technologies Malta evaluation
board.
@@ -358,7 +361,7 @@ config MIPS_SEAD
board.
config WR_PPMC
- bool "Support for Wind River PPMC board"
+ bool "Wind River PPMC board"
select IRQ_CPU
select BOOT_ELF32
select DMA_NONCOHERENT
@@ -536,6 +539,7 @@ config PMC_YOSEMITE
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_HIGHMEM
+ select SYS_SUPPORTS_SMP
help
Yosemite is an evaluation board for the RM9000x2 processor
manufactured by PMC-Sierra.
@@ -590,6 +594,7 @@ config SGI_IP22
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_SMP
help
This are the SGI Indy, Challenge S and Indigo2, as well as certain
OEM variants like the Tandem CMN B006S. To compile a Linux kernel
@@ -601,6 +606,7 @@ config SGI_IP27
select ARC64
select BOOT_ELF64
select DMA_IP27
+ select EARLY_PRINTK
select HW_HAS_PCI
select PCI_DOMAINS
select SYS_HAS_CPU_R10000
@@ -1249,7 +1255,7 @@ config CPU_R6000
select CPU_SUPPORTS_32BIT_KERNEL
help
MIPS Technologies R6000 and R6000A series processors. Note these
- processors are extremly rare and the support for them is incomplete.
+ processors are extremely rare and the support for them is incomplete.
config CPU_NEVADA
bool "RM52xx"
@@ -1370,7 +1376,7 @@ config SYS_HAS_CPU_SB1
endmenu
#
-# These two indicate any levelof the MIPS32 and MIPS64 architecture
+# These two indicate any level of the MIPS32 and MIPS64 architecture
#
config CPU_MIPS32
bool
@@ -1381,7 +1387,7 @@ config CPU_MIPS64
default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
#
-# These two indicate the revision of the architecture, either 32 bot 64 bit.
+# These two indicate the revision of the architecture, either Release 1 or Release 2
#
config CPU_MIPSR1
bool
@@ -1474,6 +1480,13 @@ config IP22_CPU_SCACHE
bool
select BOARD_SCACHE
+#
+# Support for a MIPS32 / MIPS64 style S-caches
+#
+config MIPS_CPU_SCACHE
+ bool
+ select BOARD_SCACHE
+
config R5000_CPU_SCACHE
bool
select BOARD_SCACHE
@@ -1493,32 +1506,57 @@ config SIBYTE_DMA_PAGEOPS
config CPU_HAS_PREFETCH
bool
-config MIPS_MT
- bool "Enable MIPS MT"
-
choice
prompt "MIPS MT options"
- depends on MIPS_MT
+
+config MIPS_MT_DISABLED
+ bool "Disable multithreading support."
+ help
+ Use this option if your workload can't take advantage of
+ MIPS hardware multithreading support. On systems that don't have
+ the option of an MT-enabled processor this option will be the only
+ option in this menu.
config MIPS_MT_SMTC
bool "SMTC: Use all TCs on all VPEs for SMP"
+ depends on CPU_MIPS32_R2
+ #depends on CPU_MIPS64_R2 # once there is hardware ...
+ depends on SYS_SUPPORTS_MULTITHREADING
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
+ select MIPS_MT
select SMP
+ help
+ This is a kernel model which is known a SMTC or lately has been
+ marketesed into SMVP.
config MIPS_MT_SMP
bool "Use 1 TC on each available VPE for SMP"
+ depends on SYS_SUPPORTS_MULTITHREADING
+ select CPU_MIPSR2_IRQ_VI
+ select CPU_MIPSR2_SRS
+ select MIPS_MT
select SMP
+ help
+ This is a kernel model which is also known a VSMP or lately
+ has been marketesed into SMVP.
config MIPS_VPE_LOADER
bool "VPE loader support."
- depends on MIPS_MT
+ depends on SYS_SUPPORTS_MULTITHREADING
+ select MIPS_MT
help
Includes a loader for loading an elf relocatable object
onto another VPE and running it.
endchoice
+config MIPS_MT
+ bool
+
+config SYS_SUPPORTS_MULTITHREADING
+ bool
+
config MIPS_MT_FPAFF
bool "Dynamic FPU affinity for FP-intensive threads"
depends on MIPS_MT
@@ -1575,32 +1613,23 @@ config CPU_HAS_LLSC
config CPU_HAS_WB
bool
+#
+# Vectored interrupt mode is an R2 feature
+#
config CPU_MIPSR2_IRQ_VI
- bool "Vectored interrupt mode"
- depends on CPU_MIPSR2
- help
- Vectored interrupt mode allowing faster dispatching of interrupts.
- The board support code needs to be written to take advantage of this
- mode. Compatibility code is included to allow the kernel to run on
- a CPU that does not support vectored interrupts. It's safe to
- say Y here.
+ bool
+#
+# Extended interrupt mode is an R2 feature
+#
config CPU_MIPSR2_IRQ_EI
- bool "External interrupt controller mode"
- depends on CPU_MIPSR2
- help
- Extended interrupt mode takes advantage of an external interrupt
- controller to allow fast dispatching from many possible interrupt
- sources. Say N unless you know that external interrupt support is
- required.
+ bool
+#
+# Shadow registers are an R2 feature
+#
config CPU_MIPSR2_SRS
- bool "Make shadow set registers available for interrupt handlers"
- depends on CPU_MIPSR2_IRQ_VI || CPU_MIPSR2_IRQ_EI
- help
- Allow the kernel to use shadow register sets for fast interrupts.
- Interrupt handlers must be specially written to use shadow sets.
- Say N unless you know that shadow register set upport is needed.
+ bool
config CPU_HAS_SYNC
bool
@@ -1618,6 +1647,11 @@ config GENERIC_IRQ_PROBE
bool
default y
+config IRQ_PER_CPU
+ depends on SMP
+ bool
+ default y
+
#
# - Highmem only makes sense for the 32-bit kernel.
# - The current highmem code will only work properly on physically indexed
@@ -1676,8 +1710,8 @@ source "mm/Kconfig"
config SMP
bool "Multi-Processing support"
- depends on CPU_RM9000 || ((SIBYTE_BCM1x80 || SIBYTE_BCM1x55 || SIBYTE_SB1250 || QEMU) && !SIBYTE_STANDALONE) || SGI_IP27 || MIPS_MT_SMP || MIPS_MT_SMTC
- ---help---
+ depends on SYS_SUPPORTS_SMP
+ help
This enables support for systems with more than one CPU. If you have
a system with only one CPU, like most personal computers, say N. If
you have a system with more than one CPU, say Y.
@@ -1696,6 +1730,9 @@ config SMP
If you don't know what to do here, say N.
+config SYS_SUPPORTS_SMP
+ bool
+
config NR_CPUS
int "Maximum number of CPUs (2-64)"
range 2 64
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index d5930148495..ebbb9adc0e2 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -374,6 +374,7 @@ core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
+#
# Qemu simulating MIPS32 4Kc
#
core-$(CONFIG_QEMU) += arch/mips/qemu/
diff --git a/arch/mips/arc/identify.c b/arch/mips/arc/identify.c
index 1bd6199e174..3ba7c47f9f2 100644
--- a/arch/mips/arc/identify.c
+++ b/arch/mips/arc/identify.c
@@ -11,7 +11,6 @@
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
diff --git a/arch/mips/au1000/common/au1xxx_irqmap.c b/arch/mips/au1000/common/au1xxx_irqmap.c
index 5a1e3687caf..7acfe9bf5fc 100644
--- a/arch/mips/au1000/common/au1xxx_irqmap.c
+++ b/arch/mips/au1000/common/au1xxx_irqmap.c
@@ -25,7 +25,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c
index 6ee090bd86c..98244d51c15 100644
--- a/arch/mips/au1000/common/dbdma.c
+++ b/arch/mips/au1000/common/dbdma.c
@@ -30,7 +30,6 @@
*
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/sched.h>
@@ -290,7 +289,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid,
/* If kmalloc fails, it is caught below same
* as a channel not available.
*/
- ctp = kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
+ ctp = kmalloc(sizeof(chan_tab_t), GFP_ATOMIC);
chan_tab_ptr[i] = ctp;
break;
}
@@ -730,6 +729,8 @@ au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes)
return rv;
}
+EXPORT_SYMBOL_GPL(au1xxx_dbdma_get_dest);
+
void
au1xxx_dbdma_stop(u32 chanid)
{
@@ -821,6 +822,8 @@ au1xxx_get_dma_residue(u32 chanid)
return rv;
}
+EXPORT_SYMBOL_GPL(au1xxx_get_dma_residue);
+
void
au1xxx_dbdma_chan_free(u32 chanid)
{
@@ -889,7 +892,7 @@ static void au1xxx_dbdma_init(void)
#error Unknown Au1x00 SOC
#endif
- if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
+ if (request_irq(irq_nr, dbdma_interrupt, IRQF_DISABLED,
"Au1xxx dbdma", (void *)dbdma_gptr))
printk("Can't get 1550 dbdma irq");
}
diff --git a/arch/mips/au1000/common/dbg_io.c b/arch/mips/au1000/common/dbg_io.c
index 7bc768e558d..0a50af7f34b 100644
--- a/arch/mips/au1000/common/dbg_io.c
+++ b/arch/mips/au1000/common/dbg_io.c
@@ -1,5 +1,4 @@
-#include <linux/config.h>
#include <asm/io.h>
#include <asm/mach-au1x00/au1000.h>
diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/au1000/common/dma.c
index 1d82f227751..fb7c47c1585 100644
--- a/arch/mips/au1000/common/dma.c
+++ b/arch/mips/au1000/common/dma.c
@@ -30,7 +30,6 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
diff --git a/arch/mips/au1000/common/gpio.c b/arch/mips/au1000/common/gpio.c
index 5f5915b8314..ce55297dcb8 100644
--- a/arch/mips/au1000/common/gpio.c
+++ b/arch/mips/au1000/common/gpio.c
@@ -19,7 +19,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <au1000.h>
#include <au1xxx_gpio.h>
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index afe05ec12c2..29d6f8178ba 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -26,7 +26,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
@@ -310,7 +309,7 @@ void startup_match20_interrupt(irqreturn_t (*handler)(int, void *, struct pt_reg
* can avoid it. --cgray
*/
action.dev_id = handler;
- action.flags = SA_INTERRUPT;
+ action.flags = IRQF_DISABLED;
cpus_clear(action.mask);
action.name = "Au1xxx TOY";
action.handler = handler;
@@ -333,31 +332,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
au_writel(1<<(irq_nr-32), IC1_CFG0SET);
- irq_desc[irq_nr].handler = &rise_edge_irq_type;
+ irq_desc[irq_nr].chip = &rise_edge_irq_type;
break;
case INTC_INT_FALL_EDGE: /* 0:1:0 */
au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
au_writel(1<<(irq_nr-32), IC1_CFG1SET);
au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
- irq_desc[irq_nr].handler = &fall_edge_irq_type;
+ irq_desc[irq_nr].chip = &fall_edge_irq_type;
break;
case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
au_writel(1<<(irq_nr-32), IC1_CFG2CLR);
au_writel(1<<(irq_nr-32), IC1_CFG1SET);
au_writel(1<<(irq_nr-32), IC1_CFG0SET);
- irq_desc[irq_nr].handler = &either_edge_irq_type;
+ irq_desc[irq_nr].chip = &either_edge_irq_type;
break;
case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
au_writel(1<<(irq_nr-32), IC1_CFG2SET);
au_writel(1<<(irq_nr-32), IC1_CFG1CLR);
au_writel(1<<(irq_nr-32), IC1_CFG0SET);
- irq_desc[irq_nr].handler = &level_irq_type;
+ irq_desc[irq_nr].chip = &level_irq_type;
break;
case INTC_INT_LOW_LEVEL: /* 1:1:0 */
au_writel(1<<(irq_nr-32), IC1_CFG2SET);
au_writel(1<<(irq_nr-32), IC1_CFG1SET);
au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
- irq_desc[irq_nr].handler = &level_irq_type;
+ irq_desc[irq_nr].chip = &level_irq_type;
break;
case INTC_INT_DISABLED: /* 0:0:0 */
au_writel(1<<(irq_nr-32), IC1_CFG0CLR);
@@ -385,31 +384,31 @@ static void setup_local_irq(unsigned int irq_nr, int type, int int_req)
au_writel(1<<irq_nr, IC0_CFG2CLR);
au_writel(1<<irq_nr, IC0_CFG1CLR);
au_writel(1<<irq_nr, IC0_CFG0SET);
- irq_desc[irq_nr].handler = &rise_edge_irq_type;
+ irq_desc[irq_nr].chip = &rise_edge_irq_type;
break;
case INTC_INT_FALL_EDGE: /* 0:1:0 */
au_writel(1<<irq_nr, IC0_CFG2CLR);
au_writel(1<<irq_nr, IC0_CFG1SET);
au_writel(1<<irq_nr, IC0_CFG0CLR);
- irq_desc[irq_nr].handler = &fall_edge_irq_type;
+ irq_desc[irq_nr].chip = &fall_edge_irq_type;
break;
case INTC_INT_RISE_AND_FALL_EDGE: /* 0:1:1 */
au_writel(1<<irq_nr, IC0_CFG2CLR);
au_writel(1<<irq_nr, IC0_CFG1SET);
au_writel(1<<irq_nr, IC0_CFG0SET);
- irq_desc[irq_nr].handler = &either_edge_irq_type;
+ irq_desc[irq_nr].chip = &either_edge_irq_type;
break;
case INTC_INT_HIGH_LEVEL: /* 1:0:1 */
au_writel(1<<irq_nr, IC0_CFG2SET);
au_writel(1<<irq_nr, IC0_CFG1CLR);
au_writel(1<<irq_nr, IC0_CFG0SET);
- irq_desc[irq_nr].handler = &level_irq_type;
+ irq_desc[irq_nr].chip = &level_irq_type;
break;
case INTC_INT_LOW_LEVEL: /* 1:1:0 */
au_writel(1<<irq_nr, IC0_CFG2SET);
au_writel(1<<irq_nr, IC0_CFG1SET);
au_writel(1<<irq_nr, IC0_CFG0CLR);
- irq_desc[irq_nr].handler = &level_irq_type;
+ irq_desc[irq_nr].chip = &level_irq_type;
break;
case INTC_INT_DISABLED: /* 0:0:0 */
au_writel(1<<irq_nr, IC0_CFG0CLR);
@@ -585,13 +584,13 @@ void intc1_req1_irqdispatch(struct pt_regs *regs)
* au_sleep function in power.c.....maybe I should just pm_register()
* them instead?
*/
-static uint sleep_intctl_config0[2];
-static uint sleep_intctl_config1[2];
-static uint sleep_intctl_config2[2];
-static uint sleep_intctl_src[2];
-static uint sleep_intctl_assign[2];
-static uint sleep_intctl_wake[2];
-static uint sleep_intctl_mask[2];
+static unsigned int sleep_intctl_config0[2];
+static unsigned int sleep_intctl_config1[2];
+static unsigned int sleep_intctl_config2[2];
+static unsigned int sleep_intctl_src[2];
+static unsigned int sleep_intctl_assign[2];
+static unsigned int sleep_intctl_wake[2];
+static unsigned int sleep_intctl_mask[2];
void
save_au1xxx_intctl(void)
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c
index b1392abac80..da591f67489 100644
--- a/arch/mips/au1000/common/pci.c
+++ b/arch/mips/au1000/common/pci.c
@@ -30,7 +30,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 32702e5fbf6..8fd203d4a33 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -7,7 +7,6 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
-#include <linux/config.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/kernel.h>
diff --git a/arch/mips/au1000/common/power.c b/arch/mips/au1000/common/power.c
index f4926315fb6..7504a636461 100644
--- a/arch/mips/au1000/common/power.c
+++ b/arch/mips/au1000/common/power.c
@@ -29,7 +29,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/pm.h>
#include <linux/pm_legacy.h>
@@ -80,17 +79,17 @@ static DEFINE_SPINLOCK(pm_lock);
* We only have to save/restore registers that aren't otherwise
* done as part of a driver pm_* function.
*/
-static uint sleep_aux_pll_cntrl;
-static uint sleep_cpu_pll_cntrl;
-static uint sleep_pin_function;
-static uint sleep_uart0_inten;
-static uint sleep_uart0_fifoctl;
-static uint sleep_uart0_linectl;
-static uint sleep_uart0_clkdiv;
-static uint sleep_uart0_enable;
-static uint sleep_usbhost_enable;
-static uint sleep_usbdev_enable;
-static uint sleep_static_memctlr[4][3];
+static unsigned int sleep_aux_pll_cntrl;
+static unsigned int sleep_cpu_pll_cntrl;
+static unsigned int sleep_pin_function;
+static unsigned int sleep_uart0_inten;
+static unsigned int sleep_uart0_fifoctl;
+static unsigned int sleep_uart0_linectl;
+static unsigned int sleep_uart0_clkdiv;
+static unsigned int sleep_uart0_enable;
+static unsigned int sleep_usbhost_enable;
+static unsigned int sleep_usbdev_enable;
+static unsigned int sleep_static_memctlr[4][3];
/* Define this to cause the value you write to /proc/sys/pm/sleep to
* set the TOY timer for the amount of time you want to sleep.
diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index c93af224c1b..de5447e8384 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -27,7 +27,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 97165b6b389..cc5138ce9c9 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -25,7 +25,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index 842e1b5ac4a..7e988b0b013 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -33,7 +33,6 @@
*/
#include <linux/types.h>
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
diff --git a/arch/mips/au1000/common/usbdev.c b/arch/mips/au1000/common/usbdev.c
index 2cab7629702..63bcb3a95dc 100644
--- a/arch/mips/au1000/common/usbdev.c
+++ b/arch/mips/au1000/common/usbdev.c
@@ -1465,14 +1465,14 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
*/
/* request the USB device transfer complete interrupt */
- if (request_irq(AU1000_USB_DEV_REQ_INT, req_sus_intr, SA_INTERRUPT,
+ if (request_irq(AU1000_USB_DEV_REQ_INT, req_sus_intr, IRQF_DISABLED,
"USBdev req", &usbdev)) {
err("Can't get device request intr");
ret = -ENXIO;
goto out;
}
/* request the USB device suspend interrupt */
- if (request_irq(AU1000_USB_DEV_SUS_INT, req_sus_intr, SA_INTERRUPT,
+ if (request_irq(AU1000_USB_DEV_SUS_INT, req_sus_intr, IRQF_DISABLED,
"USBdev sus", &usbdev)) {
err("Can't get device suspend intr");
ret = -ENXIO;
@@ -1483,7 +1483,7 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
if ((ep0->indma = request_au1000_dma(ep_dma_id[0].id,
ep_dma_id[0].str,
dma_done_ep0_intr,
- SA_INTERRUPT,
+ IRQF_DISABLED,
&usbdev)) < 0) {
err("Can't get %s DMA", ep_dma_id[0].str);
ret = -ENXIO;
@@ -1516,7 +1516,7 @@ usbdev_init(struct usb_device_descriptor* dev_desc,
request_au1000_dma(ep_dma_id[ep->address].id,
ep_dma_id[ep->address].str,
dma_done_ep_intr,
- SA_INTERRUPT,
+ IRQF_DISABLED,
&usbdev);
if (ep->indma < 0) {
err("Can't get %s DMA",
diff --git a/arch/mips/au1000/csb250/board_setup.c b/arch/mips/au1000/csb250/board_setup.c
index 1c55c5f59d7..348c3024d3d 100644
--- a/arch/mips/au1000/csb250/board_setup.c
+++ b/arch/mips/au1000/csb250/board_setup.c
@@ -26,7 +26,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/csb250/init.c b/arch/mips/au1000/csb250/init.c
index a4898b1bc66..83f1b31a0b8 100644
--- a/arch/mips/au1000/csb250/init.c
+++ b/arch/mips/au1000/csb250/init.c
@@ -65,9 +65,9 @@ int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
/* We use a0 and a1 to pass initrd start and size.
*/
- if (((uint) argc > 0) && ((uint)argv > 0)) {
- my_initrd_start = (uint)argc;
- my_initrd_size = (uint)argv;
+ if (((unsigned int) argc > 0) && ((uint)argv > 0)) {
+ my_initrd_start = (unsigned int)argc;
+ my_initrd_size = (unsigned int)argv;
}
/* First argv is ignored.
diff --git a/arch/mips/au1000/db1x00/board_setup.c b/arch/mips/au1000/db1x00/board_setup.c
index f00ec3b175d..7a79293f852 100644
--- a/arch/mips/au1000/db1x00/board_setup.c
+++ b/arch/mips/au1000/db1x00/board_setup.c
@@ -27,7 +27,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/db1x00/init.c b/arch/mips/au1000/db1x00/init.c
index 41e0522f3cf..0a3f025eb02 100644
--- a/arch/mips/au1000/db1x00/init.c
+++ b/arch/mips/au1000/db1x00/init.c
@@ -33,7 +33,6 @@
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
diff --git a/arch/mips/au1000/db1x00/irqmap.c b/arch/mips/au1000/db1x00/irqmap.c
index 0138c5b7c86..3e5729145c2 100644
--- a/arch/mips/au1000/db1x00/irqmap.c
+++ b/arch/mips/au1000/db1x00/irqmap.c
@@ -25,7 +25,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
diff --git a/arch/mips/au1000/db1x00/mirage_ts.c b/arch/mips/au1000/db1x00/mirage_ts.c
index c29852c24b4..0942dcf6951 100644
--- a/arch/mips/au1000/db1x00/mirage_ts.c
+++ b/arch/mips/au1000/db1x00/mirage_ts.c
@@ -31,7 +31,6 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/sched.h>
diff --git a/arch/mips/au1000/hydrogen3/board_setup.c b/arch/mips/au1000/hydrogen3/board_setup.c
index 2efae106464..d081640e2e0 100644
--- a/arch/mips/au1000/hydrogen3/board_setup.c
+++ b/arch/mips/au1000/hydrogen3/board_setup.c
@@ -27,7 +27,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/hydrogen3/init.c b/arch/mips/au1000/hydrogen3/init.c
index 01ab2848395..8f02bb80a55 100644
--- a/arch/mips/au1000/hydrogen3/init.c
+++ b/arch/mips/au1000/hydrogen3/init.c
@@ -34,7 +34,6 @@
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
diff --git a/arch/mips/au1000/mtx-1/board_setup.c b/arch/mips/au1000/mtx-1/board_setup.c
index 638de7bb43f..e917e54fc68 100644
--- a/arch/mips/au1000/mtx-1/board_setup.c
+++ b/arch/mips/au1000/mtx-1/board_setup.c
@@ -28,7 +28,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1000/board_setup.c b/arch/mips/au1000/pb1000/board_setup.c
index 0b4807dc9f4..1cf18e16ab5 100644
--- a/arch/mips/au1000/pb1000/board_setup.c
+++ b/arch/mips/au1000/pb1000/board_setup.c
@@ -23,7 +23,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 13c2f6ca7e3..db27b9331ff 100644
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -23,7 +23,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
index a45b17538ac..8b953b9fc25 100644
--- a/arch/mips/au1000/pb1200/board_setup.c
+++ b/arch/mips/au1000/pb1200/board_setup.c
@@ -23,7 +23,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
index bacc0c6bfe6..2d49f32f462 100644
--- a/arch/mips/au1000/pb1200/irqmap.c
+++ b/arch/mips/au1000/pb1200/irqmap.c
@@ -22,7 +22,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/irq.h>
@@ -172,7 +171,7 @@ void _board_init_irq(void)
for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
{
- irq_desc[irq_nr].handler = &external_irq_type;
+ irq_desc[irq_nr].chip = &external_irq_type;
pb1200_disable_irq(irq_nr);
}
diff --git a/arch/mips/au1000/pb1500/board_setup.c b/arch/mips/au1000/pb1500/board_setup.c
index 30bb87282b1..1a9a293de6a 100644
--- a/arch/mips/au1000/pb1500/board_setup.c
+++ b/arch/mips/au1000/pb1500/board_setup.c
@@ -23,7 +23,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/au1000/xxs1500/board_setup.c b/arch/mips/au1000/xxs1500/board_setup.c
index 1e59433dfd6..ae3d6b19e94 100644
--- a/arch/mips/au1000/xxs1500/board_setup.c
+++ b/arch/mips/au1000/xxs1500/board_setup.c
@@ -23,7 +23,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c
index 91121e52304..b288151b532 100644
--- a/arch/mips/basler/excite/excite_iodev.c
+++ b/arch/mips/basler/excite/excite_iodev.c
@@ -113,7 +113,7 @@ static int __exit iodev_remove(struct device *dev)
static int iodev_open(struct inode *i, struct file *f)
{
- return request_irq(iodev_irq, iodev_irqhdl, SA_INTERRUPT,
+ return request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED,
iodev_name, &miscdev);
}
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 005b025605e..3d7670edd5c 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -254,7 +254,7 @@ static int __init excite_platform_init(void)
return 0;
}
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
{
volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000;
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index 300797d5f55..46c23b66bc1 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -2,7 +2,6 @@
* (C) P. Horton 2006
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/console.h>
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index ca719d6398b..c99714587ce 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -9,7 +9,6 @@
* Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
*
*/
-#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c
index 00c62c1c28a..efef0f57ce1 100644
--- a/arch/mips/ddb5xxx/common/prom.c
+++ b/arch/mips/ddb5xxx/common/prom.c
@@ -7,7 +7,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
@@ -21,8 +20,6 @@
const char *get_system_type(void)
{
switch (mips_machtype) {
- case MACH_NEC_DDB5074: return "NEC DDB Vrc-5074";
- case MACH_NEC_DDB5476: return "NEC DDB Vrc-5476";
case MACH_NEC_DDB5477: return "NEC DDB Vrc-5477";
case MACH_NEC_ROCKHOPPER: return "NEC Rockhopper";
case MACH_NEC_ROCKHOPPERII: return "NEC RockhopperII";
diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c
index de433cf9fb5..22fb94b7c44 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq.c
@@ -10,7 +10,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
index 5fcd5f070cd..63c3d6534b3 100644
--- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c
@@ -107,7 +107,7 @@ void __init vrc5477_irq_init(u32 irq_base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &vrc5477_irq_controller;
+ irq_desc[i].chip = &vrc5477_irq_controller;
}
vrc5477_irq_base = irq_base;
diff --git a/arch/mips/ddb5xxx/ddb5477/setup.c b/arch/mips/ddb5xxx/ddb5477/setup.c
index 93167ecdb42..47ba0b6f210 100644
--- a/arch/mips/ddb5xxx/ddb5477/setup.c
+++ b/arch/mips/ddb5xxx/ddb5477/setup.c
@@ -13,7 +13,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index e8ec93e33fe..455a65b91cb 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -13,7 +13,6 @@
* Rewritten extensively for controller-driven IRQ support
* by Maciej W. Rozycki.
*/
-#include <linux/config.h>
#include <asm/addrspace.h>
#include <asm/asm.h>
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
index d5bca5d233b..da2dbb42f91 100644
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -144,13 +144,13 @@ void __init init_ioasic_irqs(int base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &ioasic_irq_type;
+ irq_desc[i].chip = &ioasic_irq_type;
}
for (; i < base + IO_IRQ_LINES; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &ioasic_dma_irq_type;
+ irq_desc[i].chip = &ioasic_dma_irq_type;
}
ioasic_irq_base = base;
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index 898bed502a3..d44c00d9e80 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -123,7 +123,7 @@ void __init init_kn02_irqs(int base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &kn02_irq_type;
+ irq_desc[i].chip = &kn02_irq_type;
}
kn02_irq_base = base;
diff --git a/arch/mips/dec/prom/init.c b/arch/mips/dec/prom/init.c
index 32a7cc7e4c6..bf2858071f1 100644
--- a/arch/mips/dec/prom/init.c
+++ b/arch/mips/dec/prom/init.c
@@ -4,7 +4,6 @@
* Copyright (C) 1998 Harald Koerfgen
* Copyright (C) 2002, 2004 Maciej W. Rozycki
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/linkage.h>
diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c
index 1edaf3074ee..3027ce78279 100644
--- a/arch/mips/dec/prom/memory.c
+++ b/arch/mips/dec/prom/memory.c
@@ -4,7 +4,6 @@
* Copyright (C) 1998 Harald Koerfgen, Frieder Streffer and Paul M. Antoine
* Copyright (C) 2000, 2002 Maciej W. Rozycki
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mm.h>
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 9c707b9ceb6..2684f121784 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -105,7 +105,7 @@ static struct irqaction fpuirq = {
};
static struct irqaction busirq = {
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "bus error",
};
@@ -124,7 +124,7 @@ static void __init dec_be_init(void)
case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */
board_be_handler = dec_kn01_be_handler;
busirq.handler = dec_kn01_be_interrupt;
- busirq.flags |= SA_SHIRQ;
+ busirq.flags |= IRQF_SHARED;
dec_kn01_be_init();
break;
case MACH_DS5000_1XX: /* DS5000/1xx 3min */
diff --git a/arch/mips/galileo-boards/ev96100/setup.c b/arch/mips/galileo-boards/ev96100/setup.c
index a04aea6123d..639ad5562c6 100644
--- a/arch/mips/galileo-boards/ev96100/setup.c
+++ b/arch/mips/galileo-boards/ev96100/setup.c
@@ -32,7 +32,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/galileo-boards/ev96100/time.c b/arch/mips/galileo-boards/ev96100/time.c
index bff5b1c174e..8cbe8426491 100644
--- a/arch/mips/galileo-boards/ev96100/time.c
+++ b/arch/mips/galileo-boards/ev96100/time.c
@@ -32,7 +32,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/module.h>
diff --git a/arch/mips/gt64120/common/Makefile b/arch/mips/gt64120/common/Makefile
index eba5051015a..1ef676e22ab 100644
--- a/arch/mips/gt64120/common/Makefile
+++ b/arch/mips/gt64120/common/Makefile
@@ -3,4 +3,3 @@
#
obj-y += time.o
-obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/mips/gt64120/common/pci.c b/arch/mips/gt64120/common/pci.c
deleted file mode 100644
index e9e5419a0d5..00000000000
--- a/arch/mips/gt64120/common/pci.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Galileo Evaluation Boards PCI support.
- *
- * The general-purpose functions to read/write and configure the GT64120A's
- * PCI registers (function names start with pci0 or pci1) are either direct
- * copies of functions written by Galileo Technology, or are modifications
- * of their functions to work with Linux 2.4 vs Linux 2.2. These functions
- * are Copyright - Galileo Technology.
- *
- * Other functions are derived from other MIPS PCI implementations, or were
- * written by RidgeRun, Inc, Copyright (C) 2000 RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <asm/gt64120.h>
-
-#define SELF 0
-
-/*
- * pciXReadConfigReg - Read from a PCI configuration register
- * - Make sure the GT is configured as a master before
- * reading from another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * INPUTS: regOffset: The register offset as it apears in the GT spec (or PCI
- * spec)
- * pciDevNum: The device number needs to be addressed.
- * RETURNS: data , if the data == 0xffffffff check the master abort bit in the
- * cause register to make sure the data is valid
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static unsigned int pci0ReadConfigReg(int offset, struct pci_dev *device)
-{
- unsigned int DataForRegCf8;
- unsigned int data;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
-
- /*
- * The casual observer might wonder why the READ is duplicated here,
- * rather than immediately following the WRITE, and just have the swap
- * in the "if". That's because there is a latency problem with trying
- * to read immediately after setting up the address register. The "if"
- * check gives enough time for the address to stabilize, so the READ
- * can work.
- */
- if (PCI_SLOT(device->devfn) == SELF) /* This board */
- return GT_READ(GT_PCI0_CFGDATA_OFS);
- else /* PCI is little endian so swap the Data. */
- return __GT_READ(GT_PCI0_CFGDATA_OFS);
-}
-
-/*
- * pciXWriteConfigReg - Write to a PCI configuration register
- * - Make sure the GT is configured as a master before
- * writingto another device on the PCI.
- * - The function takes care of Big/Little endian conversion.
- * Inputs: unsigned int regOffset: The register offset as it apears in the
- * GT spec
- * (or any other PCI device spec)
- * pciDevNum: The device number needs to be addressed.
- *
- * Configuration Address 0xCF8:
- *
- * 31 30 24 23 16 15 11 10 8 7 2 0 <=bit Number
- * |congif|Reserved| Bus |Device|Function|Register|00|
- * |Enable| |Number|Number| Number | Number | | <=field Name
- *
- */
-static void pci0WriteConfigReg(unsigned int offset,
- struct pci_dev *device, unsigned int data)
-{
- unsigned int DataForRegCf8;
-
- DataForRegCf8 = ((PCI_SLOT(device->devfn) << 11) |
- (PCI_FUNC(device->devfn) << 8) |
- (offset & ~0x3)) | 0x80000000;
- GT_WRITE(GT_PCI0_CFGADDR_OFS, DataForRegCf8);
-
- if (PCI_SLOT(device->devfn) == SELF) /* This board */
- GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
- else /* configuration Transaction over the pci. */
- __GT_WRITE(GT_PCI0_CFGDATA_OFS, data);
-}
-
-extern struct pci_ops gt64120_pci_ops;
-
-void __init pcibios_init(void)
-{
- u32 tmp;
- struct pci_dev controller;
-
- controller.devfn = SELF;
-
- tmp = GT_READ(GT_PCI0_CMD_OFS); /* Huh??? -- Ralf */
- tmp = GT_READ(GT_PCI0_BARE_OFS);
-
- /*
- * You have to enable bus mastering to configure any other
- * card on the bus.
- */
- tmp = pci0ReadConfigReg(PCI_COMMAND, &controller);
- tmp |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
- pci0WriteConfigReg(PCI_COMMAND, &controller, tmp);
-
- /*
- * Reset PCI I/O and PCI MEM values to ones supported by EVM.
- */
- ioport_resource.start = GT_PCI_IO_BASE;
- ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;
- iomem_resource.start = GT_PCI_MEM_BASE;
- iomem_resource.end = GT_PCI_MEM_BASE + GT_PCI_MEM_SIZE - 1;
-
- pci_scan_bus(0, &gt64120_pci_ops, NULL);
-}
diff --git a/arch/mips/gt64120/common/time.c b/arch/mips/gt64120/common/time.c
index 2287b59536e..d837b26fbe5 100644
--- a/arch/mips/gt64120/common/time.c
+++ b/arch/mips/gt64120/common/time.c
@@ -8,7 +8,6 @@
*/
#include <linux/interrupt.h>
#include <linux/kernel.h>
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/kernel_stat.h>
#include <asm/ptrace.h>
@@ -78,7 +77,7 @@ void gt64120_time_init(void)
* the values to the correct interrupt line.
*/
timer.handler = gt64120_irq;
- timer.flags = SA_SHIRQ | SA_INTERRUPT;
+ timer.flags = IRQF_SHARED | IRQF_DISABLED;
timer.name = "timer";
timer.dev_id = NULL;
timer.next = NULL;
diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c
index 46c468b26b3..f489a8067a9 100644
--- a/arch/mips/gt64120/ev64120/irq.c
+++ b/arch/mips/gt64120/ev64120/irq.c
@@ -138,7 +138,7 @@ void __init arch_init_irq(void)
/* Let's initialize our IRQ descriptors */
for (i = 0; i < NR_IRQS; i++) {
irq_desc[i].status = 0;
- irq_desc[i].handler = &no_irq_type;
+ irq_desc[i].chip = &no_irq_type;
irq_desc[i].action = NULL;
irq_desc[i].depth = 0;
spin_lock_init(&irq_desc[i].lock);
diff --git a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
index f0a6a38fcf4..2128684584f 100644
--- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c
+++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#ifdef CONFIG_KGDB
diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c
index 1193a22c469..9804642ecf8 100644
--- a/arch/mips/gt64120/momenco_ocelot/setup.c
+++ b/arch/mips/gt64120/momenco_ocelot/setup.c
@@ -164,8 +164,8 @@ void __init plat_mem_setup(void)
pm_power_off = momenco_ocelot_power_off;
/*
- * initrd_start = (ulong)ocelot_initrd_start;
- * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
+ * initrd_start = (unsigned long)ocelot_initrd_start;
+ * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
* initrd_below_start_ok = 1;
*/
diff --git a/arch/mips/gt64120/wrppmc/Makefile b/arch/mips/gt64120/wrppmc/Makefile
index 72606b9af12..7cf52205511 100644
--- a/arch/mips/gt64120/wrppmc/Makefile
+++ b/arch/mips/gt64120/wrppmc/Makefile
@@ -9,6 +9,6 @@
# Makefile for the Wind River MIPS 4KC PPMC Eval Board
#
-obj-y += int-handler.o irq.o reset.o setup.o time.o pci.o
+obj-y += irq.o reset.o setup.o time.o pci.o
EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/gt64120/wrppmc/int-handler.S b/arch/mips/gt64120/wrppmc/int-handler.S
deleted file mode 100644
index edee7b39417..00000000000
--- a/arch/mips/gt64120/wrppmc/int-handler.S
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
- * Copyright (C) Wind River System Inc. Rongkai.Zhan <rongkai.zhan@windriver.com>
- */
-#include <asm/asm.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/regdef.h>
-#include <asm/stackframe.h>
-#include <asm/mach-wrppmc/mach-gt64120.h>
-
- .align 5
- .set noat
-NESTED(handle_IRQ, PT_SIZE, sp)
- SAVE_ALL
- CLI # Important: mark KERNEL mode !
- .set at
-
- mfc0 t0, CP0_CAUSE # get pending interrupts
- mfc0 t1, CP0_STATUS # get enabled interrupts
- and t0, t0, t1 # get allowed interrupts
- andi t0, t0, 0xFF00
- beqz t0, 1f
- move a1, sp # Prepare 'struct pt_regs *regs' pointer
-
- andi t1, t0, CAUSEF_IP7 # CPU Compare/Count internal timer
- bnez t1, handle_cputimer_irq
- andi t1, t0, CAUSEF_IP6 # UART 16550 port
- bnez t1, handle_uart_irq
- andi t1, t0, CAUSEF_IP3 # PCI INT_A
- bnez t1, handle_pci_intA_irq
-
- /* wrong alarm or masked ... */
-1: j spurious_interrupt
- nop
-END(handle_IRQ)
-
- .align 5
-handle_cputimer_irq:
- li a0, WRPPMC_MIPS_TIMER_IRQ
- jal do_IRQ
- j ret_from_irq
-
- .align 5
-handle_uart_irq:
- li a0, WRPPMC_UART16550_IRQ
- jal do_IRQ
- j ret_from_irq
-
- .align 5
-handle_pci_intA_irq:
- li a0, WRPPMC_PCI_INTA_IRQ
- jal do_IRQ
- j ret_from_irq
-
diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c
index 8605687e24e..8d75a43ce87 100644
--- a/arch/mips/gt64120/wrppmc/irq.c
+++ b/arch/mips/gt64120/wrppmc/irq.c
@@ -30,7 +30,19 @@
#include <asm/irq_cpu.h>
#include <asm/gt64120.h>
-extern asmlinkage void handle_IRQ(void);
+asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+{
+ unsigned int pending = read_c0_status() & read_c0_cause();
+
+ if (pending & STATUSF_IP7)
+ do_IRQ(WRPPMC_MIPS_TIMER_IRQ, regs); /* CPU Compare/Count internal timer */
+ else if (pending & STATUSF_IP6)
+ do_IRQ(WRPPMC_UART16550_IRQ, regs); /* UART 16550 port */
+ else if (pending & STATUSF_IP3)
+ do_IRQ(WRPPMC_PCI_INTA_IRQ, regs); /* PCI INT_A */
+ else
+ spurious_interrupt(regs);
+}
/**
* Initialize GT64120 Interrupt Controller
@@ -50,12 +62,6 @@ void gt64120_init_pic(void)
void __init arch_init_irq(void)
{
- /* enable all CPU interrupt bits. */
- set_c0_status(ST0_IM); /* IE bit is still 0 */
-
- /* Install MIPS Interrupt Trap Vector */
- set_except_vector(0, handle_IRQ);
-
/* IRQ 0 - 7 are for MIPS common irq_cpu controller */
mips_cpu_irq_init(0);
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
index 20c591e49da..2db6375ef29 100644
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -125,7 +125,7 @@ static void wrppmc_setup_serial(void)
}
#endif
-void __init plat_setup(void)
+void __init plat_mem_setup(void)
{
extern void wrppmc_time_init(void);
extern void wrppmc_timer_setup(struct irqaction *);
diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c
index 175d22adb45..6c24a82df0d 100644
--- a/arch/mips/gt64120/wrppmc/time.c
+++ b/arch/mips/gt64120/wrppmc/time.c
@@ -31,10 +31,6 @@ void __init wrppmc_timer_setup(struct irqaction *irq)
{
/* Install ISR for timer interrupt */
setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq);
-
- /* to generate the first timer interrupt */
- write_c0_compare(mips_hpt_frequency/HZ);
- write_c0_count(0);
}
/*
diff --git a/arch/mips/ite-boards/generic/dbg_io.c b/arch/mips/ite-boards/generic/dbg_io.c
index 6a7ccaf9350..8e9cd8a9670 100644
--- a/arch/mips/ite-boards/generic/dbg_io.c
+++ b/arch/mips/ite-boards/generic/dbg_io.c
@@ -1,5 +1,4 @@
-#include <linux/config.h>
#ifdef CONFIG_KGDB
diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c
index 77be7216bdd..a6749c56fe3 100644
--- a/arch/mips/ite-boards/generic/irq.c
+++ b/arch/mips/ite-boards/generic/irq.c
@@ -208,10 +208,10 @@ void __init arch_init_irq(void)
#endif
for (i = 0; i <= IT8172_LAST_IRQ; i++) {
- irq_desc[i].handler = &it8172_irq_type;
+ irq_desc[i].chip = &it8172_irq_type;
spin_lock_init(&irq_desc[i].lock);
}
- irq_desc[MIPS_CPU_TIMER_IRQ].handler = &cp0_irq_type;
+ irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type;
set_c0_status(ALLINTS_NOTIMER);
}
diff --git a/arch/mips/ite-boards/generic/it8172_cir.c b/arch/mips/ite-boards/generic/it8172_cir.c
index 19deb153d00..bfc25adcfec 100644
--- a/arch/mips/ite-boards/generic/it8172_cir.c
+++ b/arch/mips/ite-boards/generic/it8172_cir.c
@@ -28,7 +28,6 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#ifdef CONFIG_IT8172_CIR
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
index da6ae099119..a4615a5904a 100644
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ b/arch/mips/ite-boards/generic/it8172_setup.c
@@ -26,7 +26,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/ite-boards/generic/pmon_prom.c b/arch/mips/ite-boards/generic/pmon_prom.c
index 6e505af0cc0..7d0a79be34d 100644
--- a/arch/mips/ite-boards/generic/pmon_prom.c
+++ b/arch/mips/ite-boards/generic/pmon_prom.c
@@ -35,7 +35,6 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index becc9accd49..478be9858a1 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -73,7 +73,7 @@ void __init init_r4030_ints(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &r4030_irq_type;
+ irq_desc[i].chip = &r4030_irq_type;
}
r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index c8d0df7d0c3..385413e30fd 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -8,7 +8,6 @@
* Copyright (C) 1996, 1997, 1998, 2001 by Ralf Baechle
* Copyright (C) 2001 MIPS Technologies, Inc.
*/
-#include <linux/config.h>
#include <linux/eisa.h>
#include <linux/hdreg.h>
#include <linux/init.h>
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c
index a0674d73962..a55cb4572de 100644
--- a/arch/mips/jmr3927/rbhma3100/init.c
+++ b/arch/mips/jmr3927/rbhma3100/init.c
@@ -27,7 +27,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index 11304d1354f..9c43702e7a9 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -29,7 +29,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/errno.h>
@@ -435,7 +434,7 @@ void jmr3927_irq_init(u32 irq_base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &jmr3927_irq_controller;
+ irq_desc[i].chip = &jmr3927_irq_controller;
}
jmr3927_irq_base = irq_base;
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index 308e6cdcd24..6d4635d89d9 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -33,7 +33,6 @@
***********************************************************************
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/kdev_t.h>
diff --git a/arch/mips/kernel/apm.c b/arch/mips/kernel/apm.c
index 15f46b4471f..7bdbcd811b5 100644
--- a/arch/mips/kernel/apm.c
+++ b/arch/mips/kernel/apm.c
@@ -260,7 +260,7 @@ static unsigned int apm_poll(struct file *fp, poll_table * wait)
* has acknowledge does the actual suspend happen.
*/
static int
-apm_ioctl(struct inode * inode, struct file *filp, u_int cmd, u_long arg)
+apm_ioctl(struct inode * inode, struct file *filp, unsigned int cmd, unsigned long arg)
{
struct apm_user *as = filp->private_data;
unsigned long flags;
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index f1bb6a2dc5f..ec28077d5ee 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -8,7 +8,6 @@
* Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc.
*/
-#include <linux/config.h>
#include <linux/compat.h>
#include <linux/types.h>
#include <linux/sched.h>
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index d268827c62b..c09337b947b 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -6,7 +6,6 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ptrace.h>
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 8c2c359a05f..ba08f055feb 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -11,7 +11,6 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ptrace.h>
@@ -597,8 +596,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
break;
case PRID_IMP_25KF:
c->cputype = CPU_25KF;
- /* Probe for L2 cache */
- c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
break;
case PRID_IMP_34K:
c->cputype = CPU_34K;
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index a9c6de1b954..ecfd637d702 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -7,7 +7,6 @@
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Copyright (C) 2001 MIPS Technologies, Inc.
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
@@ -87,7 +86,7 @@ FEXPORT(restore_all) # restore full frame
ori v1, v0, TCSTATUS_IXMT
mtc0 v1, CP0_TCSTATUS
andi v0, TCSTATUS_IXMT
- ehb
+ _ehb
mfc0 t0, CP0_TCCONTEXT
DMT 9 # dmt t1
jal mips_ihb
@@ -95,7 +94,7 @@ FEXPORT(restore_all) # restore full frame
andi t3, t0, 0xff00
or t2, t2, t3
mtc0 t2, CP0_STATUS
- ehb
+ _ehb
andi t1, t1, VPECONTROL_TE
beqz t1, 1f
EMT
@@ -105,7 +104,7 @@ FEXPORT(restore_all) # restore full frame
xori v1, v1, TCSTATUS_IXMT
or v1, v0, v1
mtc0 v1, CP0_TCSTATUS
- ehb
+ _ehb
xor t0, t0, t3
mtc0 t0, CP0_TCCONTEXT
#endif /* CONFIG_MIPS_MT_SMTC */
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index 5fd7a8af0c6..666bc9014cb 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -3,7 +3,6 @@
*
* Copyright (C) 1995 Andreas Busse
*/
-#include <linux/config.h>
#include <linux/sys.h>
#include <asm/asm.h>
@@ -291,7 +290,7 @@
ori t1, t2, TCSTATUS_IXMT
mtc0 t1, CP0_TCSTATUS
andi t2, t2, TCSTATUS_IXMT
- ehb
+ _ehb
DMT 9 # dmt t1
jal mips_ihb
nop
@@ -310,7 +309,7 @@
xori t1, t1, TCSTATUS_IXMT
or t1, t1, t2
mtc0 t1, CP0_TCSTATUS
- ehb
+ _ehb
#endif /* CONFIG_MIPS_MT_SMTC */
LONG_L v0, GDB_FR_STATUS(sp)
LONG_L v1, GDB_FR_EPC(sp)
diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c
index 6ecbdc1fefd..719d26968cb 100644
--- a/arch/mips/kernel/gdb-stub.c
+++ b/arch/mips/kernel/gdb-stub.c
@@ -120,7 +120,6 @@
* breakpoints, single stepping,
* printing variables, etc.
*/
-#include <linux/config.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/signal.h>
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index ff7af369f28..5254a2222d2 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -8,7 +8,6 @@
* Copyright (C) 2001 MIPS Technologies, Inc.
* Copyright (C) 2002 Maciej W. Rozycki
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <asm/asm.h>
@@ -214,7 +213,7 @@ NESTED(except_vec_vi_handler, 0, sp)
mtc0 t0, CP0_TCCONTEXT
xor t1, t1, t0
mtc0 t1, CP0_STATUS
- ehb
+ _ehb
#endif /* CONFIG_MIPS_MT_SMTC */
CLI
move a0, sp
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index bdf6f6eff72..476c1eb33c9 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -13,7 +13,6 @@
* Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/threads.h>
@@ -96,7 +95,7 @@
/* Clear TKSU, leave IXMT */
xori t0, 0x00001800
mtc0 t0, CP0_TCSTATUS
- ehb
+ _ehb
/* We need to leave the global IE bit set, but clear EXL...*/
mfc0 t0, CP0_STATUS
or t0, ST0_CU0 | ST0_EXL | ST0_ERL | \set | \clr
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 0cb8ed5662f..91ffb1233ca 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -120,7 +120,7 @@ int i8259A_irq_pending(unsigned int irq)
void make_8259A_irq(unsigned int irq)
{
disable_irq_nosync(irq);
- irq_desc[irq].handler = &i8259A_irq_type;
+ irq_desc[irq].chip = &i8259A_irq_type;
enable_irq(irq);
}
@@ -327,7 +327,7 @@ void __init init_i8259_irqs (void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &i8259A_irq_type;
+ irq_desc[i].chip = &i8259A_irq_type;
}
setup_irq(2, &irq2);
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 97ebdc754b9..f8cd1ac64d8 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -174,14 +174,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq)
switch (imp->im_type) {
case MSC01_IRQ_EDGE:
- irq_desc[base+n].handler = &msc_edgeirq_type;
+ irq_desc[base+n].chip = &msc_edgeirq_type;
if (cpu_has_veic)
MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT);
else
MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl);
break;
case MSC01_IRQ_LEVEL:
- irq_desc[base+n].handler = &msc_levelirq_type;
+ irq_desc[base+n].chip = &msc_levelirq_type;
if (cpu_has_veic)
MSCIC_WRITE(MSC01_IC_SUP+n*8, 0);
else
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index 0613f1f36b1..f9c763a6554 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -155,7 +155,7 @@ void __init mv64340_irq_init(unsigned int base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 2;
- irq_desc[i].handler = &mv64340_irq_type;
+ irq_desc[i].chip = &mv64340_irq_type;
}
irq_base = base;
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index 0b130c5ac5d..121da385a94 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -91,7 +91,7 @@ void __init rm7k_cpu_irq_init(int base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &rm7k_irq_controller;
+ irq_desc[i].chip = &rm7k_irq_controller;
}
irq_base = base;
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index 9b5f20c32ac..25109c103e4 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -139,11 +139,11 @@ void __init rm9k_cpu_irq_init(int base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &rm9k_irq_controller;
+ irq_desc[i].chip = &rm9k_irq_controller;
}
rm9000_perfcount_irq = base + 1;
- irq_desc[rm9000_perfcount_irq].handler = &rm9k_perfcounter_irq;
+ irq_desc[rm9000_perfcount_irq].chip = &rm9k_perfcounter_irq;
irq_base = base;
}
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 3dce742e716..cde5e5afa17 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -8,7 +8,6 @@
* Copyright (C) 1992 Linus Torvalds
* Copyright (C) 1994 - 2000 Ralf Baechle
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/init.h>
@@ -95,7 +94,7 @@ int show_interrupts(struct seq_file *p, void *v)
for_each_online_cpu(j)
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
#endif
- seq_printf(p, " %14s", irq_desc[i].handler->typename);
+ seq_printf(p, " %14s", irq_desc[i].chip->typename);
seq_printf(p, " %s", action->name);
for (action=action->next; action; action = action->next)
@@ -137,7 +136,7 @@ void __init init_IRQ(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &no_irq_type;
+ irq_desc[i].chip = &no_irq_type;
spin_lock_init(&irq_desc[i].lock);
#ifdef CONFIG_MIPS_MT_SMTC
irq_hwmask[i] = 0;
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 5db67e31ec1..0e455a8ad86 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -167,14 +167,14 @@ void __init mips_cpu_irq_init(int irq_base)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &mips_mt_cpu_irq_controller;
+ irq_desc[i].chip = &mips_mt_cpu_irq_controller;
}
for (i = irq_base + 2; i < irq_base + 8; i++) {
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &mips_cpu_irq_controller;
+ irq_desc[i].chip = &mips_cpu_irq_controller;
}
mips_cpu_irq_base = irq_base;
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index a7d2bb3cf83..450ac592da5 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -5,7 +5,6 @@
* Written by Ulf Carlsson (ulfc@engr.sgi.com)
* sys32_execve from ia64/ia32 code, Feb 2000, Kanoj Sarcar (kanoj@sgi.com)
*/
-#include <linux/config.h>
#include <linux/compiler.h>
#include <linux/mm.h>
#include <linux/errno.h>
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 0a71a4c3371..f44a01357ad 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -8,7 +8,6 @@
* Copyright (C) 1996, 97, 98, 99, 2000, 01, 03, 04, 05 by Ralf Baechle
* Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <asm/checksum.h>
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 9def554f335..d8beef10790 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -5,7 +5,6 @@
* Copyright (C) 2001, 2004 MIPS Technologies, Inc.
* Copyright (C) 2004 Maciej W. Rozycki
*/
-#include <linux/config.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/sched.h>
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 199a06e873c..7ab67f786bf 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -8,7 +8,6 @@
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Copyright (C) 2004 Thiemo Seufer
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/sched.h>
diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c
index 1d44025188d..362d1728e53 100644
--- a/arch/mips/kernel/ptrace.c
+++ b/arch/mips/kernel/ptrace.c
@@ -14,7 +14,6 @@
* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
* binaries.
*/
-#include <linux/config.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/sched.h>
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 0d9c4a32a9c..656bde2e11b 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -10,7 +10,6 @@
* Further modifications to make this work:
* Copyright (c) 1998-2000 Harald Koerfgen
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/cachectl.h>
#include <asm/fpregdef.h>
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 283a98508fc..880fa6e841e 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -12,7 +12,6 @@
* Copyright (C) 2000 MIPS Technologies, Inc.
* Copyright (C) 1999, 2001 Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/errno.h>
#include <asm/fpregdef.h>
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index db94e556fc9..d5c8b82fed7 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -10,7 +10,6 @@
* Copyright (C) 2000 MIPS Technologies, Inc.
* written by Carsten Langgaard, carstenl@mips.com
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/cachectl.h>
#include <asm/fpregdef.h>
@@ -94,7 +93,7 @@
ori t1, t2, TCSTATUS_IXMT
mtc0 t1, CP0_TCSTATUS
andi t2, t2, TCSTATUS_IXMT
- ehb
+ _ehb
DMT 8 # dmt t0
move t1,ra
jal mips_ihb
@@ -109,7 +108,7 @@
or a2, t1
mtc0 a2, CP0_STATUS
#ifdef CONFIG_MIPS_MT_SMTC
- ehb
+ _ehb
andi t0, t0, VPECONTROL_TE
beqz t0, 1f
emt
@@ -118,7 +117,7 @@
xori t1, t1, TCSTATUS_IXMT
or t1, t1, t2
mtc0 t1, CP0_TCSTATUS
- ehb
+ _ehb
#endif /* CONFIG_MIPS_MT_SMTC */
move v0, a0
jr ra
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index caf777f8328..cdab1b2cd13 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -487,7 +487,7 @@ static struct file_operations rtlx_fops = {
static struct irqaction rtlx_irq = {
.handler = rtlx_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "RTLX",
};
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 2d2fdf77e30..8f8101f878c 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -7,7 +7,6 @@
* Copyright (C) 2001 MIPS Technologies, Inc.
* Copyright (C) 2004 Thiemo Seufer
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
@@ -647,6 +646,7 @@ einval: li v0, -EINVAL
sys sys_unshare 1
sys sys_splice 4
sys sys_sync_file_range 7 /* 4305 */
+ sys sys_tee 4
.endm
/* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 9ba75088737..b4a34a625a2 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -7,7 +7,6 @@
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Copyright (C) 2001 MIPS Technologies, Inc.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
@@ -462,3 +461,4 @@ sys_call_table:
PTR sys_unshare
PTR sys_splice
PTR sys_sync_file_range
+ PTR sys_tee /* 5265 */
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 942aca26f9c..df8c4f8ccd6 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -7,7 +7,6 @@
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Copyright (C) 2001 MIPS Technologies, Inc.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
@@ -388,3 +387,4 @@ EXPORT(sysn32_call_table)
PTR sys_unshare
PTR sys_splice
PTR sys_sync_file_range
+ PTR sys_tee
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 8efb23a8413..f04fe4f085c 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -13,7 +13,6 @@
* to ABI64 calling convention. 64-bit syscalls are also processed
* here for now.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
@@ -510,4 +509,5 @@ sys_call_table:
PTR sys_unshare
PTR sys_splice
PTR sys32_sync_file_range /* 4305 */
+ PTR sys_tee
.size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index bfcec8d9bfe..5edd8d4bb66 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -10,7 +10,6 @@
* Copyright (C) 1999 Silicon Graphics, Inc.
* Copyright (C) 2000 2001, 2002 Maciej W. Rozycki
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/ioport.h>
@@ -488,6 +487,9 @@ static inline void resource_init(void)
{
int i;
+ if (UNCAC_BASE != IO_BASE)
+ return;
+
code_resource.start = virt_to_phys(&_text);
code_resource.end = virt_to_phys(&_etext) - 1;
data_resource.start = virt_to_phys(&_etext);
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index ce6cb915c0a..b1f09d54ebe 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -8,7 +8,6 @@
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
-#include <linux/config.h>
static inline int
setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 402efd27c79..6b4d9be3161 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -7,7 +7,6 @@
* Copyright (C) 1994 - 2000 Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/cache.h>
#include <linux/sched.h>
#include <linux/mm.h>
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 57770902b9a..93429a4d301 100644
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -130,13 +130,13 @@ irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static struct irqaction irq_resched = {
.handler = ipi_resched_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "IPI_resched"
};
static struct irqaction irq_call = {
.handler = ipi_call_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "IPI_call"
};
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S
index c9d65196d91..72c6d98f885 100644
--- a/arch/mips/kernel/smtc-asm.S
+++ b/arch/mips/kernel/smtc-asm.S
@@ -52,12 +52,12 @@ FEXPORT(__smtc_ipi_vector)
.set noat
/* Disable thread scheduling to make Status update atomic */
DMT 27 # dmt k1
- ehb
+ _ehb
/* Set EXL */
mfc0 k0,CP0_STATUS
ori k0,k0,ST0_EXL
mtc0 k0,CP0_STATUS
- ehb
+ _ehb
/* Thread scheduling now inhibited by EXL. Restore TE state. */
andi k1,k1,VPECONTROL_TE
beqz k1,1f
@@ -82,7 +82,7 @@ FEXPORT(__smtc_ipi_vector)
li k1,ST0_CU0
or k1,k1,k0
mtc0 k1,CP0_STATUS
- ehb
+ _ehb
get_saved_sp
/* Interrupting TC will have pre-set values in slots in the new frame */
2: subu k1,k1,PT_SIZE
@@ -90,7 +90,7 @@ FEXPORT(__smtc_ipi_vector)
lw k0,PT_TCSTATUS(k1)
/* Write it to TCStatus to restore CU/KSU/IXMT state */
mtc0 k0,$2,1
- ehb
+ _ehb
lw k0,PT_EPC(k1)
mtc0 k0,CP0_EPC
/* Save all will redundantly recompute the SP, but use it for now */
@@ -116,7 +116,7 @@ LEAF(self_ipi)
mfc0 t0,CP0_TCSTATUS
ori t1,t0,TCSTATUS_IXMT
mtc0 t1,CP0_TCSTATUS
- ehb
+ _ehb
/* We know we're in kernel mode, so prepare stack frame */
subu t1,sp,PT_SIZE
sw ra,PT_EPC(t1)
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 70cf09afdf5..a48d9e55308 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -1002,7 +1002,7 @@ void setup_cross_vpe_interrupts(void)
set_vi_handler(MIPS_CPU_IPI_IRQ, ipi_irq_dispatch);
irq_ipi.handler = ipi_interrupt;
- irq_ipi.flags = SA_INTERRUPT;
+ irq_ipi.flags = IRQF_DISABLED;
irq_ipi.name = "SMTC_IPI";
setup_irq_smtc(cpu_ipi_irq, &irq_ipi, (0x100 << MIPS_CPU_IPI_IRQ));
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 5e8a18a8e2b..0721314db65 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -7,7 +7,6 @@
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
* Copyright (C) 2001 MIPS Technologies, Inc.
*/
-#include <linux/config.h>
#include <linux/a.out.h>
#include <linux/capability.h>
#include <linux/errno.h>
@@ -301,7 +300,7 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
*
* This is really horribly ugly.
*/
-asmlinkage int sys_ipc (uint call, int first, int second,
+asmlinkage int sys_ipc (unsigned int call, int first, int second,
unsigned long third, void __user *ptr, long fifth)
{
int version, ret;
@@ -359,18 +358,18 @@ asmlinkage int sys_ipc (uint call, int first, int second,
case SHMAT:
switch (version) {
default: {
- ulong raddr;
+ unsigned long raddr;
ret = do_shmat (first, (char __user *) ptr, second,
&raddr);
if (ret)
return ret;
- return put_user (raddr, (ulong __user *) third);
+ return put_user (raddr, (unsigned long __user *) third);
}
case 1: /* iBCS2 emulator entry point */
if (!segment_eq(get_fs(), get_ds()))
return -EINVAL;
return do_shmat (first, (char __user *) ptr, second,
- (ulong *) third);
+ (unsigned long *) third);
}
case SHMDT:
return sys_shmdt ((char __user *)ptr);
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 13ff4da598c..2393c11d5a2 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -11,7 +11,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
@@ -580,7 +579,7 @@ unsigned int mips_hpt_frequency;
static struct irqaction timer_irqaction = {
.handler = timer_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "timer",
};
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index ad16eceb24d..8b95eca9ac7 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -11,7 +11,6 @@
* Copyright (C) 2000, 01 MIPS Technologies, Inc.
* Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/module.h>
@@ -1050,7 +1049,7 @@ void *set_except_vector(int n, void *addr)
return (void *)old_handler;
}
-#ifdef CONFIG_CPU_MIPSR2
+#ifdef CONFIG_CPU_MIPSR2_SRS
/*
* MIPSR2 shadow register set allocation
* FIXME: SMP...
@@ -1069,11 +1068,9 @@ static struct shadow_registers {
static void mips_srs_init(void)
{
-#ifdef CONFIG_CPU_MIPSR2_SRS
shadow_registers.sr_supported = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
printk(KERN_INFO "%d MIPSR2 register sets available\n",
shadow_registers.sr_supported);
-#endif
shadow_registers.sr_allocated = 1; /* Set 0 used by kernel */
}
@@ -1198,7 +1195,14 @@ void *set_vi_handler(int n, void *addr)
{
return set_vi_srs_handler(n, addr, 0);
}
-#endif
+
+#else
+
+static inline void mips_srs_init(void)
+{
+}
+
+#endif /* CONFIG_CPU_MIPSR2_SRS */
/*
* This is used by native signal handling
@@ -1388,9 +1392,7 @@ void __init trap_init(void)
else
ebase = CAC_BASE;
-#ifdef CONFIG_CPU_MIPSR2
mips_srs_init();
-#endif
per_cpu_trap_init();
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index 5b5a3736cbb..7e7d5482348 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -72,7 +72,6 @@
* A store crossing a page boundary might be executed only partially.
* Undo the partial store in this case.
*/
-#include <linux/config.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/signal.h>
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index b84d1f9ce28..0bb9cd88945 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#include <asm/asm-offsets.h>
#include <asm-generic/vmlinux.lds.h>
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index 2d3472b21eb..9316a024a81 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -156,6 +156,6 @@ void __init arch_init_irq(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &lasat_irq_type;
+ irq_desc[i].chip = &lasat_irq_type;
}
}
diff --git a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
index fc9b0e2a6be..d425120b028 100644
--- a/arch/mips/lasat/lasat_board.c
+++ b/arch/mips/lasat/lasat_board.c
@@ -17,7 +17,6 @@
*
* Routines specific to the LASAT boards
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/crc32.h>
#include <asm/lasat/lasat.h>
diff --git a/arch/mips/lasat/reset.c b/arch/mips/lasat/reset.c
index 181bf68175f..9e22acf0308 100644
--- a/arch/mips/lasat/reset.c
+++ b/arch/mips/lasat/reset.c
@@ -17,7 +17,6 @@
*
* Reset the LASAT board.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/pm.h>
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index 3f64277429e..2187e63c6d8 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -22,7 +22,6 @@
*
* Lasat specific setup.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/pci.h>
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
index e3d5aaa90f0..6dd7ae1b7c2 100644
--- a/arch/mips/lasat/sysctl.c
+++ b/arch/mips/lasat/sysctl.c
@@ -20,7 +20,6 @@
#include <linux/types.h>
#include <asm/lasat/lasat.h>
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/sysctl.h>
#include <linux/stddef.h>
diff --git a/arch/mips/lib-32/dump_tlb.c b/arch/mips/lib-32/dump_tlb.c
index c49a925d016..6a68deb51aa 100644
--- a/arch/mips/lib-32/dump_tlb.c
+++ b/arch/mips/lib-32/dump_tlb.c
@@ -4,7 +4,6 @@
* Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
* Copyright (C) 1999 by Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/sched.h>
diff --git a/arch/mips/lib-64/dump_tlb.c b/arch/mips/lib-64/dump_tlb.c
index 11a5f015f04..be8261be679 100644
--- a/arch/mips/lib-64/dump_tlb.c
+++ b/arch/mips/lib-64/dump_tlb.c
@@ -4,7 +4,6 @@
* Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
* Copyright (C) 1999 by Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/sched.h>
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index 7f9aafa4d80..a526c62cb76 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -12,7 +12,6 @@
*
* Mnemonic names for arguments to memcpy/__copy_user
*/
-#include <linux/config.h>
/*
* Hack to resolve longstanding prefetch issue
diff --git a/arch/mips/math-emu/kernel_linkage.c b/arch/mips/math-emu/kernel_linkage.c
index 56ca0c6a717..5b3390f6491 100644
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -19,7 +19,6 @@
* manipulation primitives for the Algorithmics MIPS
* FPU Emulator
*/
-#include <linux/config.h>
#include <linux/sched.h>
#include <asm/processor.h>
#include <asm/signal.h>
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
index db53950b7cf..9dd6b892558 100644
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ b/arch/mips/mips-boards/atlas/atlas_int.c
@@ -215,7 +215,7 @@ void __init arch_init_irq(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &atlas_irq_type;
+ irq_desc[i].chip = &atlas_irq_type;
spin_lock_init(&irq_desc[i].lock);
}
}
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
index 8cc9effcb83..3a7c3d28aa0 100644
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ b/arch/mips/mips-boards/atlas/atlas_setup.c
@@ -15,7 +15,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
index df4e9473560..58a0fe88359 100644
--- a/arch/mips/mips-boards/generic/init.c
+++ b/arch/mips/mips-boards/generic/init.c
@@ -19,7 +19,6 @@
*
* PROM library initialisation code.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/kernel.h>
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
index fd492562584..c89fcf9e9c2 100644
--- a/arch/mips/mips-boards/generic/memory.c
+++ b/arch/mips/mips-boards/generic/memory.c
@@ -18,7 +18,6 @@
* PROM library functions for acquiring/using memory descriptors given to
* us from the YAMON.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
diff --git a/arch/mips/mips-boards/generic/printf.c b/arch/mips/mips-boards/generic/printf.c
index 2c1ab1f19fd..1a711bd79b5 100644
--- a/arch/mips/mips-boards/generic/printf.c
+++ b/arch/mips/mips-boards/generic/printf.c
@@ -17,7 +17,6 @@
*
* Putting things on the screen/serial line using YAMONs facilities.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/serial_reg.h>
diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c
index 7213c395fb6..0996ba368b2 100644
--- a/arch/mips/mips-boards/generic/reset.c
+++ b/arch/mips/mips-boards/generic/reset.c
@@ -22,7 +22,6 @@
* Reset the MIPS boards.
*
*/
-#include <linux/config.h>
#include <linux/pm.h>
#include <asm/io.h>
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index a9f6124b3a2..5e207760826 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -19,7 +19,6 @@
*/
#include <linux/types.h>
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index 0766e434b6b..bc4ac6f0187 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -15,7 +15,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
index 6430f11f3a9..a856bd66487 100644
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ b/arch/mips/mips-boards/sead/sead_setup.c
@@ -17,7 +17,6 @@
*
* SEAD specific setup.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c
index 5b84c7fe102..ec549f3e201 100644
--- a/arch/mips/mips-boards/sim/sim_IRQ.c
+++ b/arch/mips/mips-boards/sim/sim_IRQ.c
@@ -17,7 +17,6 @@
*
* Interrupt exception dispatch code.
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S
index d16cf382207..b7444e74a6a 100644
--- a/arch/mips/mips-boards/sim/sim_irq.S
+++ b/arch/mips/mips-boards/sim/sim_irq.S
@@ -17,7 +17,6 @@
* Interrupt exception dispatch code.
*
*/
-#include <linux/config.h>
#include <asm/asm.h>
#include <asm/mipsregs.h>
diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c
index 15a5dac4ae1..3d4a785b565 100644
--- a/arch/mips/mips-boards/sim/sim_setup.c
+++ b/arch/mips/mips-boards/sim/sim_setup.c
@@ -16,7 +16,6 @@
*
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/kernel.h>
diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c
index 004070956cc..cb47863ecf1 100644
--- a/arch/mips/mips-boards/sim/sim_smp.c
+++ b/arch/mips/mips-boards/sim/sim_smp.c
@@ -18,7 +18,6 @@
/*
* Simulator Platform-specific hooks for SMP operation
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/cpumask.h>
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index 18b968c696d..e7f6003357f 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -1,5 +1,4 @@
#include <linux/types.h>
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
#include <linux/sched.h>
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 4a6220116c9..19e41fd186c 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_CPU_VR41XX) += c-r4k.o cex-gen.o pg-r4k.o tlb-r4k.o
obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o
obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
+obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o
#
# Choose one DMA coherency model
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4a43924cd4f..857b726f4d4 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -7,7 +7,6 @@
* Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002 Ralf Baechle (ralf@gnu.org)
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
@@ -60,13 +59,13 @@ static unsigned long scache_size __read_mostly;
/*
* Dummy cache handling routines for machines without boardcaches
*/
-static void no_sc_noop(void) {}
+static void cache_noop(void) {}
static struct bcache_ops no_sc_ops = {
- .bc_enable = (void *)no_sc_noop,
- .bc_disable = (void *)no_sc_noop,
- .bc_wback_inv = (void *)no_sc_noop,
- .bc_inv = (void *)no_sc_noop
+ .bc_enable = (void *)cache_noop,
+ .bc_disable = (void *)cache_noop,
+ .bc_wback_inv = (void *)cache_noop,
+ .bc_inv = (void *)cache_noop
};
struct bcache_ops *bcops = &no_sc_ops;
@@ -94,7 +93,9 @@ static inline void r4k_blast_dcache_page_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
- if (dc_lsize == 16)
+ if (dc_lsize == 0)
+ r4k_blast_dcache_page = (void *)cache_noop;
+ else if (dc_lsize == 16)
r4k_blast_dcache_page = blast_dcache16_page;
else if (dc_lsize == 32)
r4k_blast_dcache_page = r4k_blast_dcache_page_dc32;
@@ -106,7 +107,9 @@ static inline void r4k_blast_dcache_page_indexed_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
- if (dc_lsize == 16)
+ if (dc_lsize == 0)
+ r4k_blast_dcache_page_indexed = (void *)cache_noop;
+ else if (dc_lsize == 16)
r4k_blast_dcache_page_indexed = blast_dcache16_page_indexed;
else if (dc_lsize == 32)
r4k_blast_dcache_page_indexed = blast_dcache32_page_indexed;
@@ -118,7 +121,9 @@ static inline void r4k_blast_dcache_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
- if (dc_lsize == 16)
+ if (dc_lsize == 0)
+ r4k_blast_dcache = (void *)cache_noop;
+ else if (dc_lsize == 16)
r4k_blast_dcache = blast_dcache16;
else if (dc_lsize == 32)
r4k_blast_dcache = blast_dcache32;
@@ -201,7 +206,9 @@ static inline void r4k_blast_icache_page_setup(void)
{
unsigned long ic_lsize = cpu_icache_line_size();
- if (ic_lsize == 16)
+ if (ic_lsize == 0)
+ r4k_blast_icache_page = (void *)cache_noop;
+ else if (ic_lsize == 16)
r4k_blast_icache_page = blast_icache16_page;
else if (ic_lsize == 32)
r4k_blast_icache_page = blast_icache32_page;
@@ -216,7 +223,9 @@ static inline void r4k_blast_icache_page_indexed_setup(void)
{
unsigned long ic_lsize = cpu_icache_line_size();
- if (ic_lsize == 16)
+ if (ic_lsize == 0)
+ r4k_blast_icache_page_indexed = (void *)cache_noop;
+ else if (ic_lsize == 16)
r4k_blast_icache_page_indexed = blast_icache16_page_indexed;
else if (ic_lsize == 32) {
if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
@@ -238,7 +247,9 @@ static inline void r4k_blast_icache_setup(void)
{
unsigned long ic_lsize = cpu_icache_line_size();
- if (ic_lsize == 16)
+ if (ic_lsize == 0)
+ r4k_blast_icache = (void *)cache_noop;
+ else if (ic_lsize == 16)
r4k_blast_icache = blast_icache16;
else if (ic_lsize == 32) {
if (R4600_V1_INDEX_ICACHEOP_WAR && cpu_is_r4600_v1_x())
@@ -258,7 +269,7 @@ static inline void r4k_blast_scache_page_setup(void)
unsigned long sc_lsize = cpu_scache_line_size();
if (scache_size == 0)
- r4k_blast_scache_page = (void *)no_sc_noop;
+ r4k_blast_scache_page = (void *)cache_noop;
else if (sc_lsize == 16)
r4k_blast_scache_page = blast_scache16_page;
else if (sc_lsize == 32)
@@ -276,7 +287,7 @@ static inline void r4k_blast_scache_page_indexed_setup(void)
unsigned long sc_lsize = cpu_scache_line_size();
if (scache_size == 0)
- r4k_blast_scache_page_indexed = (void *)no_sc_noop;
+ r4k_blast_scache_page_indexed = (void *)cache_noop;
else if (sc_lsize == 16)
r4k_blast_scache_page_indexed = blast_scache16_page_indexed;
else if (sc_lsize == 32)
@@ -294,7 +305,7 @@ static inline void r4k_blast_scache_setup(void)
unsigned long sc_lsize = cpu_scache_line_size();
if (scache_size == 0)
- r4k_blast_scache = (void *)no_sc_noop;
+ r4k_blast_scache = (void *)cache_noop;
else if (sc_lsize == 16)
r4k_blast_scache = blast_scache16;
else if (sc_lsize == 32)
@@ -508,7 +519,7 @@ static inline void local_r4k_flush_icache_range(void *args)
unsigned long end = fir_args->end;
if (!cpu_has_ic_fills_f_dc) {
- if (end - start > dcache_size) {
+ if (end - start >= dcache_size) {
r4k_blast_dcache();
} else {
R4600_HIT_CACHEOP_WAR_IMPL;
@@ -683,10 +694,12 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
unsigned long addr = (unsigned long) arg;
R4600_HIT_CACHEOP_WAR_IMPL;
- protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
+ if (dc_lsize)
+ protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
if (!cpu_icache_snoops_remote_store && scache_size)
protected_writeback_scache_line(addr & ~(sc_lsize - 1));
- protected_flush_icache_line(addr & ~(ic_lsize - 1));
+ if (ic_lsize)
+ protected_flush_icache_line(addr & ~(ic_lsize - 1));
if (MIPS4K_ICACHE_REFILL_WAR) {
__asm__ __volatile__ (
".set push\n\t"
@@ -973,8 +986,10 @@ static void __init probe_pcache(void)
c->icache.waysize = icache_size / c->icache.ways;
c->dcache.waysize = dcache_size / c->dcache.ways;
- c->icache.sets = icache_size / (c->icache.linesz * c->icache.ways);
- c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways);
+ c->icache.sets = c->icache.linesz ?
+ icache_size / (c->icache.linesz * c->icache.ways) : 0;
+ c->dcache.sets = c->dcache.linesz ?
+ dcache_size / (c->dcache.linesz * c->dcache.ways) : 0;
/*
* R10000 and R12000 P-caches are odd in a positive way. They're 32kB
@@ -993,10 +1008,16 @@ static void __init probe_pcache(void)
break;
case CPU_24K:
case CPU_34K:
- if (!(read_c0_config7() & (1 << 16)))
+ case CPU_74K:
+ if ((read_c0_config7() & (1 << 16))) {
+ /* effectively physically indexed dcache,
+ thus no virtual aliases. */
+ c->dcache.flags |= MIPS_CACHE_PINDEX;
+ break;
+ }
default:
- if (c->dcache.waysize > PAGE_SIZE)
- c->dcache.flags |= MIPS_CACHE_ALIASES;
+ if (c->dcache.waysize > PAGE_SIZE)
+ c->dcache.flags |= MIPS_CACHE_ALIASES;
}
switch (c->cputype) {
@@ -1092,6 +1113,7 @@ static int __init probe_scache(void)
extern int r5k_sc_init(void);
extern int rm7k_sc_init(void);
+extern int mips_sc_init(void);
static void __init setup_scache(void)
{
@@ -1139,17 +1161,29 @@ static void __init setup_scache(void)
return;
default:
+ if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
+ c->isa_level == MIPS_CPU_ISA_M32R2 ||
+ c->isa_level == MIPS_CPU_ISA_M64R1 ||
+ c->isa_level == MIPS_CPU_ISA_M64R2) {
+#ifdef CONFIG_MIPS_CPU_SCACHE
+ if (mips_sc_init ()) {
+ scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
+ printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
+ scache_size >> 10,
+ way_string[c->scache.ways], c->scache.linesz);
+ }
+#else
+ if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
+ panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
+#endif
+ return;
+ }
sc_present = 0;
}
if (!sc_present)
return;
- if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
- c->isa_level == MIPS_CPU_ISA_M64R1) &&
- !(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
- panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
-
/* compute a couple of other cache variables */
c->scache.waysize = scache_size / c->scache.ways;
@@ -1246,10 +1280,12 @@ void __init r4k_cache_init(void)
* This code supports virtually indexed processors and will be
* unnecessarily inefficient on physically indexed processors.
*/
- shm_align_mask = max_t( unsigned long,
- c->dcache.sets * c->dcache.linesz - 1,
- PAGE_SIZE - 1);
-
+ if (c->dcache.linesz)
+ shm_align_mask = max_t( unsigned long,
+ c->dcache.sets * c->dcache.linesz - 1,
+ PAGE_SIZE - 1);
+ else
+ shm_align_mask = PAGE_SIZE-1;
flush_cache_all = r4k_flush_cache_all;
__flush_cache_all = r4k___flush_cache_all;
flush_cache_mm = r4k_flush_cache_mm;
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c
index f9b129491b1..2d71efb82ac 100644
--- a/arch/mips/mm/c-sb1.c
+++ b/arch/mips/mm/c-sb1.c
@@ -18,7 +18,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <asm/asm.h>
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 83a56296be8..ddd3a2de1d7 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -5,7 +5,6 @@
*
* Copyright (C) 1994 - 2003 by Ralf Baechle
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c
index 1cf3c6006cc..e19fbb9ee47 100644
--- a/arch/mips/mm/cerr-sb1.c
+++ b/arch/mips/mm/cerr-sb1.c
@@ -15,7 +15,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/sched.h>
#include <asm/mipsregs.h>
#include <asm/sibyte/sb1250.h>
diff --git a/arch/mips/mm/dma-coherent.c b/arch/mips/mm/dma-coherent.c
index f6b3c722230..7fa5fd16e46 100644
--- a/arch/mips/mm/dma-coherent.c
+++ b/arch/mips/mm/dma-coherent.c
@@ -7,7 +7,6 @@
* Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/dma-mapping.h>
#include <linux/mm.h>
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c
index cd4ea8474f8..2eeffe5c2a3 100644
--- a/arch/mips/mm/dma-noncoherent.c
+++ b/arch/mips/mm/dma-noncoherent.c
@@ -7,7 +7,6 @@
* Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org>
* swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/module.h>
diff --git a/arch/mips/mm/highmem.c b/arch/mips/mm/highmem.c
index 0c544375b85..99ebf3ccc22 100644
--- a/arch/mips/mm/highmem.c
+++ b/arch/mips/mm/highmem.c
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/highmem.h>
#include <asm/tlbflush.h>
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 33f6e1cdfd5..802bdd32aa2 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -8,7 +8,6 @@
* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/signal.h>
diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 148c65b9cd8..fc3c7878fb4 100644
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -22,7 +22,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/smp.h>
diff --git a/arch/mips/mm/pgtable-32.c b/arch/mips/mm/pgtable-32.c
index 4a3c4919e31..4bdaa05f485 100644
--- a/arch/mips/mm/pgtable-32.c
+++ b/arch/mips/mm/pgtable-32.c
@@ -5,7 +5,6 @@
*
* Copyright (C) 2003 by Ralf Baechle
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c
index 3fe94202da8..792c6eb4423 100644
--- a/arch/mips/mm/pgtable.c
+++ b/arch/mips/mm/pgtable.c
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/swap.h>
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
new file mode 100644
index 00000000000..42b50964c64
--- /dev/null
+++ b/arch/mips/mm/sc-mips.c
@@ -0,0 +1,112 @@
+/*
+ * Copyright (C) 2006 Chris Dearman (chris@mips.com),
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/mm.h>
+
+#include <asm/mipsregs.h>
+#include <asm/bcache.h>
+#include <asm/cacheops.h>
+#include <asm/page.h>
+#include <asm/pgtable.h>
+#include <asm/system.h>
+#include <asm/mmu_context.h>
+#include <asm/r4kcache.h>
+
+/*
+ * MIPS32/MIPS64 L2 cache handling
+ */
+
+/*
+ * Writeback and invalidate the secondary cache before DMA.
+ */
+static void mips_sc_wback_inv(unsigned long addr, unsigned long size)
+{
+ blast_scache_range(addr, addr + size);
+}
+
+/*
+ * Invalidate the secondary cache before DMA.
+ */
+static void mips_sc_inv(unsigned long addr, unsigned long size)
+{
+ blast_inv_scache_range(addr, addr + size);
+}
+
+static void mips_sc_enable(void)
+{
+ /* L2 cache is permanently enabled */
+}
+
+static void mips_sc_disable(void)
+{
+ /* L2 cache is permanently enabled */
+}
+
+static struct bcache_ops mips_sc_ops = {
+ .bc_enable = mips_sc_enable,
+ .bc_disable = mips_sc_disable,
+ .bc_wback_inv = mips_sc_wback_inv,
+ .bc_inv = mips_sc_inv
+};
+
+static inline int __init mips_sc_probe(void)
+{
+ struct cpuinfo_mips *c = &current_cpu_data;
+ unsigned int config1, config2;
+ unsigned int tmp;
+
+ /* Mark as not present until probe completed */
+ c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
+
+ /* Ignore anything but MIPSxx processors */
+ if (c->isa_level != MIPS_CPU_ISA_M32R1 &&
+ c->isa_level != MIPS_CPU_ISA_M32R2 &&
+ c->isa_level != MIPS_CPU_ISA_M64R1 &&
+ c->isa_level != MIPS_CPU_ISA_M64R2)
+ return 0;
+
+ /* Does this MIPS32/MIPS64 CPU have a config2 register? */
+ config1 = read_c0_config1();
+ if (!(config1 & MIPS_CONF_M))
+ return 0;
+
+ config2 = read_c0_config2();
+ tmp = (config2 >> 4) & 0x0f;
+ if (0 < tmp && tmp <= 7)
+ c->scache.linesz = 2 << tmp;
+ else
+ return 0;
+
+ tmp = (config2 >> 8) & 0x0f;
+ if (0 <= tmp && tmp <= 7)
+ c->scache.sets = 64 << tmp;
+ else
+ return 0;
+
+ tmp = (config2 >> 0) & 0x0f;
+ if (0 <= tmp && tmp <= 7)
+ c->scache.ways = tmp + 1;
+ else
+ return 0;
+
+ c->scache.waysize = c->scache.sets * c->scache.linesz;
+ c->scache.waybit = __ffs(c->scache.waysize);
+
+ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
+
+ return 1;
+}
+
+int __init mips_sc_init(void)
+{
+ int found = mips_sc_probe ();
+ if (found) {
+ mips_sc_enable();
+ bcops = &mips_sc_ops;
+ }
+ return found;
+}
+
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 965cb4c4359..2cde1b77244 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -8,7 +8,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>
diff --git a/arch/mips/mm/tlb-r8k.c b/arch/mips/mm/tlb-r8k.c
index 1bfb09198ce..266a47d65ee 100644
--- a/arch/mips/mm/tlb-r8k.c
+++ b/arch/mips/mm/tlb-r8k.c
@@ -8,7 +8,6 @@
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 54507be2ab5..e1a8139fc8f 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -21,7 +21,6 @@
#include <stdarg.h>
-#include <linux/config.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/types.h>
diff --git a/arch/mips/momentum/jaguar_atx/dbg_io.c b/arch/mips/momentum/jaguar_atx/dbg_io.c
index d7dea0a136a..b85a6521f72 100644
--- a/arch/mips/momentum/jaguar_atx/dbg_io.c
+++ b/arch/mips/momentum/jaguar_atx/dbg_io.c
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#if defined(CONFIG_REMOTE_DEBUG)
diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c
index ec4032b38f1..f9067469a65 100644
--- a/arch/mips/momentum/jaguar_atx/irq.c
+++ b/arch/mips/momentum/jaguar_atx/irq.c
@@ -71,7 +71,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
}
static struct irqaction cascade_mv64340 = {
- no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
+ no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
};
void __init arch_init_irq(void)
diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c
index 1cadaa92946..3d271292929 100644
--- a/arch/mips/momentum/jaguar_atx/prom.c
+++ b/arch/mips/momentum/jaguar_atx/prom.c
@@ -16,7 +16,6 @@
*
* Added changes for SMP - Manish Lachwani (lachwani@pmc-sierra.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c
index ce9fb2e3d95..c73b0897dc5 100644
--- a/arch/mips/momentum/jaguar_atx/reset.c
+++ b/arch/mips/momentum/jaguar_atx/reset.c
@@ -14,7 +14,6 @@
* Louis Hamilton, Red Hat, Inc.
* hamilton@redhat.com [MIPS64 modifications]
*/
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c
index df1485501ce..b08e6a0456c 100644
--- a/arch/mips/momentum/jaguar_atx/setup.c
+++ b/arch/mips/momentum/jaguar_atx/setup.c
@@ -39,7 +39,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/bcd.h>
#include <linux/init.h>
#include <linux/kernel.h>
@@ -370,8 +369,8 @@ void __init plat_mem_setup(void)
pm_power_off = momenco_jaguar_power_off;
/*
- * initrd_start = (ulong)jaguar_initrd_start;
- * initrd_end = (ulong)jaguar_initrd_start + (ulong)jaguar_initrd_size;
+ * initrd_start = (unsigned long)jaguar_initrd_start;
+ * initrd_end = (unsigned long)jaguar_initrd_start + (ulong)jaguar_initrd_size;
* initrd_below_start_ok = 1;
*/
diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c
index 87c63c340ae..793782a9c19 100644
--- a/arch/mips/momentum/ocelot_3/irq.c
+++ b/arch/mips/momentum/ocelot_3/irq.c
@@ -54,7 +54,7 @@
#include <asm/system.h>
static struct irqaction cascade_mv64340 = {
- no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
+ no_action, IRQF_DISABLED, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
};
void __init arch_init_irq(void)
diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c
index 9803daa2a79..296d945bc24 100644
--- a/arch/mips/momentum/ocelot_3/prom.c
+++ b/arch/mips/momentum/ocelot_3/prom.c
@@ -21,7 +21,6 @@
* Author: Manish Lachwani, mlachwani@mvista.com
*
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/mv643xx.h>
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c
index bd885785e2f..31d179c4673 100644
--- a/arch/mips/momentum/ocelot_c/cpci-irq.c
+++ b/arch/mips/momentum/ocelot_c/cpci-irq.c
@@ -147,6 +147,6 @@ void cpci_irq_init(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 2;
- irq_desc[i].handler = &cpci_irq_type;
+ irq_desc[i].chip = &cpci_irq_type;
}
}
diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c
index f0a6a38fcf4..2128684584f 100644
--- a/arch/mips/momentum/ocelot_c/dbg_io.c
+++ b/arch/mips/momentum/ocelot_c/dbg_io.c
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#ifdef CONFIG_KGDB
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c
index 86f61ce59e5..9d44ae1e156 100644
--- a/arch/mips/momentum/ocelot_c/irq.c
+++ b/arch/mips/momentum/ocelot_c/irq.c
@@ -52,11 +52,11 @@ extern void uart_irq_init(void);
extern void cpci_irq_init(void);
static struct irqaction cascade_fpga = {
- no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL
+ no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via FPGA", NULL, NULL
};
static struct irqaction cascade_mv64340 = {
- no_action, SA_INTERRUPT, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
+ no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
};
extern void ll_uart_irq(struct pt_regs *regs);
diff --git a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
index 97fb77dad72..7228cd19e5e 100644
--- a/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
+++ b/arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
@@ -30,7 +30,6 @@
#ifndef __OCELOT_C_FPGA_H__
#define __OCELOT_C_FPGA_H__
-#include <linux/config.h>
#ifdef CONFIG_64BIT
#define OCELOT_C_CS0_ADDR (0xfffffffffc000000)
diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c
index e92364482c7..4c50a147f42 100644
--- a/arch/mips/momentum/ocelot_c/prom.c
+++ b/arch/mips/momentum/ocelot_c/prom.c
@@ -14,7 +14,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c
index 9dcd154c776..3fdcb64ff1e 100644
--- a/arch/mips/momentum/ocelot_c/reset.c
+++ b/arch/mips/momentum/ocelot_c/reset.c
@@ -14,7 +14,6 @@
* Louis Hamilton, Red Hat, Inc.
* hamilton@redhat.com [MIPS64 modifications]
*/
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/io.h>
diff --git a/arch/mips/momentum/ocelot_c/setup.c b/arch/mips/momentum/ocelot_c/setup.c
index 257e1d1b72d..6a4519936ee 100644
--- a/arch/mips/momentum/ocelot_c/setup.c
+++ b/arch/mips/momentum/ocelot_c/setup.c
@@ -40,7 +40,6 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
-#include <linux/config.h>
#include <linux/bcd.h>
#include <linux/init.h>
#include <linux/kernel.h>
@@ -242,8 +241,8 @@ void __init plat_mem_setup(void)
pm_power_off = momenco_ocelot_power_off;
/*
- * initrd_start = (ulong)ocelot_initrd_start;
- * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
+ * initrd_start = (unsigned long)ocelot_initrd_start;
+ * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
* initrd_below_start_ok = 1;
*/
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c
index 755bde5146b..852265026fd 100644
--- a/arch/mips/momentum/ocelot_c/uart-irq.c
+++ b/arch/mips/momentum/ocelot_c/uart-irq.c
@@ -137,10 +137,10 @@ void uart_irq_init(void)
irq_desc[80].status = IRQ_DISABLED;
irq_desc[80].action = 0;
irq_desc[80].depth = 2;
- irq_desc[80].handler = &uart_irq_type;
+ irq_desc[80].chip = &uart_irq_type;
irq_desc[81].status = IRQ_DISABLED;
irq_desc[81].action = 0;
irq_desc[81].depth = 2;
- irq_desc[81].handler = &uart_irq_type;
+ irq_desc[81].chip = &uart_irq_type;
}
diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c
index f0a6a38fcf4..2128684584f 100644
--- a/arch/mips/momentum/ocelot_g/dbg_io.c
+++ b/arch/mips/momentum/ocelot_g/dbg_io.c
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#ifdef CONFIG_KGDB
diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c
index 8bd9b844fa9..9fb2493fff0 100644
--- a/arch/mips/momentum/ocelot_g/gt-irq.c
+++ b/arch/mips/momentum/ocelot_g/gt-irq.c
@@ -11,7 +11,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
@@ -174,7 +173,7 @@ void gt64240_time_init(void)
* the values to the correct interrupt line.
*/
timer.handler = &gt64240_p0int_irq;
- timer.flags = SA_SHIRQ | SA_INTERRUPT;
+ timer.flags = IRQF_SHARED | IRQF_DISABLED;
timer.name = "timer";
timer.dev_id = NULL;
timer.next = NULL;
diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c
index 6b4f577c275..6509a9c9863 100644
--- a/arch/mips/momentum/ocelot_g/prom.c
+++ b/arch/mips/momentum/ocelot_g/prom.c
@@ -11,7 +11,6 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c
index 72143ab1e90..c580b1de33b 100644
--- a/arch/mips/momentum/ocelot_g/setup.c
+++ b/arch/mips/momentum/ocelot_g/setup.c
@@ -37,7 +37,6 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
@@ -174,8 +173,8 @@ void __init plat_mem_setup(void)
pm_power_off = momenco_ocelot_power_off;
/*
- * initrd_start = (ulong)ocelot_initrd_start;
- * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
+ * initrd_start = (unsigned long)ocelot_initrd_start;
+ * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
* initrd_below_start_ok = 1;
*/
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index f26a00e1320..a09c5f90123 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -12,16 +12,70 @@
#include "op_impl.h"
-#define M_PERFCTL_EXL (1UL << 0)
-#define M_PERFCTL_KERNEL (1UL << 1)
-#define M_PERFCTL_SUPERVISOR (1UL << 2)
-#define M_PERFCTL_USER (1UL << 3)
-#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
-#define M_PERFCTL_EVENT(event) ((event) << 5)
-#define M_PERFCTL_WIDE (1UL << 30)
-#define M_PERFCTL_MORE (1UL << 31)
+#define M_PERFCTL_EXL (1UL << 0)
+#define M_PERFCTL_KERNEL (1UL << 1)
+#define M_PERFCTL_SUPERVISOR (1UL << 2)
+#define M_PERFCTL_USER (1UL << 3)
+#define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4)
+#define M_PERFCTL_EVENT(event) ((event) << 5)
+#define M_PERFCTL_VPEID(vpe) ((vpe) << 16)
+#define M_PERFCTL_MT_EN(filter) ((filter) << 20)
+#define M_TC_EN_ALL M_PERFCTL_MT_EN(0)
+#define M_TC_EN_VPE M_PERFCTL_MT_EN(1)
+#define M_TC_EN_TC M_PERFCTL_MT_EN(2)
+#define M_PERFCTL_TCID(tcid) ((tcid) << 22)
+#define M_PERFCTL_WIDE (1UL << 30)
+#define M_PERFCTL_MORE (1UL << 31)
+
+#define M_COUNTER_OVERFLOW (1UL << 31)
+
+#ifdef CONFIG_MIPS_MT_SMP
+#define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id()))
+#else
+#define WHAT 0
+#endif
-#define M_COUNTER_OVERFLOW (1UL << 31)
+#define __define_perf_accessors(r, n, np) \
+ \
+static inline unsigned int r_c0_ ## r ## n(void) \
+{ \
+ unsigned int cpu = smp_processor_id(); \
+ \
+ switch (cpu) { \
+ case 0: \
+ return read_c0_ ## r ## n(); \
+ case 1: \
+ return read_c0_ ## r ## np(); \
+ default: \
+ BUG(); \
+ } \
+} \
+ \
+static inline void w_c0_ ## r ## n(unsigned int value) \
+{ \
+ unsigned int cpu = smp_processor_id(); \
+ \
+ switch (cpu) { \
+ case 0: \
+ write_c0_ ## r ## n(value); \
+ return; \
+ case 1: \
+ write_c0_ ## r ## np(value); \
+ return; \
+ default: \
+ BUG(); \
+ } \
+} \
+
+__define_perf_accessors(perfcntr, 0, 2)
+__define_perf_accessors(perfcntr, 1, 3)
+__define_perf_accessors(perfcntr, 2, 2)
+__define_perf_accessors(perfcntr, 3, 2)
+
+__define_perf_accessors(perfctrl, 0, 2)
+__define_perf_accessors(perfctrl, 1, 3)
+__define_perf_accessors(perfctrl, 2, 2)
+__define_perf_accessors(perfctrl, 3, 2)
struct op_mips_model op_model_mipsxx_ops;
@@ -66,17 +120,17 @@ static void mipsxx_cpu_setup (void *args)
switch (counters) {
case 4:
- write_c0_perfctrl3(0);
- write_c0_perfcntr3(reg.counter[3]);
+ w_c0_perfctrl3(0);
+ w_c0_perfcntr3(reg.counter[3]);
case 3:
- write_c0_perfctrl2(0);
- write_c0_perfcntr2(reg.counter[2]);
+ w_c0_perfctrl2(0);
+ w_c0_perfcntr2(reg.counter[2]);
case 2:
- write_c0_perfctrl1(0);
- write_c0_perfcntr1(reg.counter[1]);
+ w_c0_perfctrl1(0);
+ w_c0_perfcntr1(reg.counter[1]);
case 1:
- write_c0_perfctrl0(0);
- write_c0_perfcntr0(reg.counter[0]);
+ w_c0_perfctrl0(0);
+ w_c0_perfcntr0(reg.counter[0]);
}
}
@@ -87,13 +141,13 @@ static void mipsxx_cpu_start(void *args)
switch (counters) {
case 4:
- write_c0_perfctrl3(reg.control[3]);
+ w_c0_perfctrl3(WHAT | reg.control[3]);
case 3:
- write_c0_perfctrl2(reg.control[2]);
+ w_c0_perfctrl2(WHAT | reg.control[2]);
case 2:
- write_c0_perfctrl1(reg.control[1]);
+ w_c0_perfctrl1(WHAT | reg.control[1]);
case 1:
- write_c0_perfctrl0(reg.control[0]);
+ w_c0_perfctrl0(WHAT | reg.control[0]);
}
}
@@ -104,13 +158,13 @@ static void mipsxx_cpu_stop(void *args)
switch (counters) {
case 4:
- write_c0_perfctrl3(0);
+ w_c0_perfctrl3(0);
case 3:
- write_c0_perfctrl2(0);
+ w_c0_perfctrl2(0);
case 2:
- write_c0_perfctrl1(0);
+ w_c0_perfctrl1(0);
case 1:
- write_c0_perfctrl0(0);
+ w_c0_perfctrl0(0);
}
}
@@ -124,12 +178,12 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs)
switch (counters) {
#define HANDLE_COUNTER(n) \
case n + 1: \
- control = read_c0_perfctrl ## n(); \
- counter = read_c0_perfcntr ## n(); \
+ control = r_c0_perfctrl ## n(); \
+ counter = r_c0_perfcntr ## n(); \
if ((control & M_PERFCTL_INTERRUPT_ENABLE) && \
(counter & M_COUNTER_OVERFLOW)) { \
oprofile_add_sample(regs, n); \
- write_c0_perfcntr ## n(reg.counter[n]); \
+ w_c0_perfcntr ## n(reg.counter[n]); \
handled = 1; \
}
HANDLE_COUNTER(3)
@@ -143,35 +197,47 @@ static int mipsxx_perfcount_handler(struct pt_regs *regs)
#define M_CONFIG1_PC (1 << 4)
-static inline int n_counters(void)
+static inline int __n_counters(void)
{
if (!(read_c0_config1() & M_CONFIG1_PC))
return 0;
- if (!(read_c0_perfctrl0() & M_PERFCTL_MORE))
+ if (!(r_c0_perfctrl0() & M_PERFCTL_MORE))
return 1;
- if (!(read_c0_perfctrl1() & M_PERFCTL_MORE))
+ if (!(r_c0_perfctrl1() & M_PERFCTL_MORE))
return 2;
- if (!(read_c0_perfctrl2() & M_PERFCTL_MORE))
+ if (!(r_c0_perfctrl2() & M_PERFCTL_MORE))
return 3;
return 4;
}
+static inline int n_counters(void)
+{
+ int counters = __n_counters();
+
+#ifndef CONFIG_SMP
+ if (current_cpu_data.cputype == CPU_34K)
+ return counters >> 1;
+#endif
+
+ return counters;
+}
+
static inline void reset_counters(int counters)
{
switch (counters) {
case 4:
- write_c0_perfctrl3(0);
- write_c0_perfcntr3(0);
+ w_c0_perfctrl3(0);
+ w_c0_perfcntr3(0);
case 3:
- write_c0_perfctrl2(0);
- write_c0_perfcntr2(0);
+ w_c0_perfctrl2(0);
+ w_c0_perfcntr2(0);
case 2:
- write_c0_perfctrl1(0);
- write_c0_perfcntr1(0);
+ w_c0_perfctrl1(0);
+ w_c0_perfcntr1(0);
case 1:
- write_c0_perfctrl0(0);
- write_c0_perfcntr0(0);
+ w_c0_perfctrl0(0);
+ w_c0_perfcntr0(0);
}
}
@@ -201,7 +267,6 @@ static int __init mipsxx_init(void)
op_model_mipsxx_ops.cpu_type = "mips/25K";
break;
-#ifndef CONFIG_SMP
case CPU_34K:
op_model_mipsxx_ops.cpu_type = "mips/34K";
break;
@@ -209,7 +274,6 @@ static int __init mipsxx_init(void)
case CPU_74K:
op_model_mipsxx_ops.cpu_type = "mips/74K";
break;
-#endif
case CPU_5KC:
op_model_mipsxx_ops.cpu_type = "mips/5K";
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 465778c5d81..35d5927706e 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -23,7 +23,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
#
# These are still pretty much in the old state, watch, go blind.
#
-obj-$(CONFIG_BASLER_EXCITE) = ops-titan.o pci-excite.o fixup-excite.o
+obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
obj-$(CONFIG_DDB5477) += fixup-ddb5477.o pci-ddb5477.o ops-ddb5477.o
obj-$(CONFIG_LASAT) += pci-lasat.o
obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
index 87920b24593..439510af303 100644
--- a/arch/mips/pci/fixup-atlas.c
+++ b/arch/mips/pci/fixup-atlas.c
@@ -16,7 +16,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/pci.h>
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c
index a8a47b494b2..8e01d0c1b76 100644
--- a/arch/mips/pci/fixup-vr4133.c
+++ b/arch/mips/pci/fixup-vr4133.c
@@ -15,7 +15,6 @@
* Author: Manish Lachwani (mlachwani@mvista.com)
*
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/pci.h>
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c
index be1420126c4..0c0c1e6519f 100644
--- a/arch/mips/pci/ops-au1000.c
+++ b/arch/mips/pci/ops-au1000.c
@@ -28,7 +28,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index 7688b771132..150419c8b41 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -119,7 +119,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i
switch (size) {
case 1:
- *val = *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ *val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
g2pcfgdata |
#ifdef __LITTLE_ENDIAN
(where & 3));
@@ -128,7 +128,7 @@ static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, i
#endif
break;
case 2:
- *val = *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ *val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
g2pcfgdata |
#ifdef __LITTLE_ENDIAN
(where & 3));
@@ -168,7 +168,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
switch (size) {
case 1:
- *(volatile u8 *) ((ulong) & tx4927_pcicptr->
+ *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
g2pcfgdata |
#ifdef __LITTLE_ENDIAN
(where & 3)) = val;
@@ -178,7 +178,7 @@ static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
break;
case 2:
- *(volatile u16 *) ((ulong) & tx4927_pcicptr->
+ *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
g2pcfgdata |
#ifdef __LITTLE_ENDIAN
(where & 3)) = val;
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c
index 0ff083489ef..44500708451 100644
--- a/arch/mips/pci/ops-tx4938.c
+++ b/arch/mips/pci/ops-tx4938.c
@@ -106,7 +106,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
switch (size) {
case 1:
- *val = *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
+ *val = *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
#ifdef __BIG_ENDIAN
((where & 3) ^ 3));
#else
@@ -114,7 +114,7 @@ static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
#endif
break;
case 2:
- *val = *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
+ *val = *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
#ifdef __BIG_ENDIAN
((where & 3) ^ 2));
#else
@@ -154,7 +154,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
switch (size) {
case 1:
- *(volatile u8 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
+ *(volatile u8 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
#ifdef __BIG_ENDIAN
((where & 3) ^ 3)) = val;
#else
@@ -162,7 +162,7 @@ static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn,
#endif
break;
case 2:
- *(volatile u16 *) ((ulong) & tx4938_pcicptr->g2pcfgdata |
+ *(volatile u16 *) ((unsigned long) & tx4938_pcicptr->g2pcfgdata |
#ifdef __BIG_ENDIAN
((where & 0x3) ^ 0x2)) = val;
#else
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index f4ef1a35ca1..f6774f54cd3 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -32,7 +32,6 @@
*
* XXX: AT THIS TIME, ONLY the NATIVE PCI-X INTERFACE IS SUPPORTED.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c
index a3eebe5890a..ba2e34b0923 100644
--- a/arch/mips/pci/pci-bcm1480ht.c
+++ b/arch/mips/pci/pci-bcm1480ht.c
@@ -31,7 +31,6 @@
* problem.
*
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c
index 180af89bcb1..17c7932cf0a 100644
--- a/arch/mips/pci/pci-ip32.c
+++ b/arch/mips/pci/pci-ip32.c
@@ -6,7 +6,6 @@
* Copyright (C) 2000, 2001 Keith M Wesolowski
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index 7cca3bde59b..80f5e8c4bcd 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -30,7 +30,6 @@
* kernel mapped memory. Hopefully neither of these should be a huge
* problem.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 4dfce154d4a..5ace368657a 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -6,7 +6,6 @@
*
* Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
@@ -51,11 +50,11 @@ unsigned long PCIBIOS_MIN_MEM = 0;
*/
void
pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
+ resource_size_t size, resource_size_t align)
{
struct pci_dev *dev = data;
struct pci_controller *hose = dev->sysdata;
- unsigned long start = res->start;
+ resource_size_t start = res->start;
if (res->flags & IORESOURCE_IO) {
/* Make sure we start at our min on all hoses */
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
index 39ee6314f62..8aca317d462 100644
--- a/arch/mips/philips/pnx8550/common/int.c
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -23,7 +23,6 @@
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h>
@@ -220,13 +219,13 @@ static struct hw_interrupt_type level_irq_type = {
static struct irqaction gic_action = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "GIC",
};
static struct irqaction timer_action = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "Timer",
};
@@ -236,7 +235,7 @@ void __init arch_init_irq(void)
int configPR;
for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) {
- irq_desc[i].handler = &level_irq_type;
+ irq_desc[i].chip = &level_irq_type;
pnx8550_ack(i); /* mask the irq just in case */
}
@@ -273,7 +272,7 @@ void __init arch_init_irq(void)
/* mask/priority is still 0 so we will not get any
* interrupts until it is unmasked */
- irq_desc[i].handler = &level_irq_type;
+ irq_desc[i].chip = &level_irq_type;
}
/* Priority level 0 */
@@ -282,12 +281,12 @@ void __init arch_init_irq(void)
/* Set int vector table address */
PNX8550_GIC_VECTOR_0 = PNX8550_GIC_VECTOR_1 = 0;
- irq_desc[MIPS_CPU_GIC_IRQ].handler = &level_irq_type;
+ irq_desc[MIPS_CPU_GIC_IRQ].chip = &level_irq_type;
setup_irq(MIPS_CPU_GIC_IRQ, &gic_action);
/* init of Timer interrupts */
for (i = PNX8550_INT_TIMER_MIN; i <= PNX8550_INT_TIMER_MAX; i++) {
- irq_desc[i].handler = &level_irq_type;
+ irq_desc[i].chip = &level_irq_type;
}
/* Stop Timer 1-3 */
@@ -295,7 +294,7 @@ void __init arch_init_irq(void)
configPR |= 0x00000038;
write_c0_config7(configPR);
- irq_desc[MIPS_CPU_TIMER_IRQ].handler = &level_irq_type;
+ irq_desc[MIPS_CPU_TIMER_IRQ].chip = &level_irq_type;
setup_irq(MIPS_CPU_TIMER_IRQ, &timer_action);
}
diff --git a/arch/mips/philips/pnx8550/common/setup.c b/arch/mips/philips/pnx8550/common/setup.c
index 0e791f4f6ea..8ac81a9dc29 100644
--- a/arch/mips/philips/pnx8550/common/setup.c
+++ b/arch/mips/philips/pnx8550/common/setup.c
@@ -17,7 +17,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/ioport.h>
diff --git a/arch/mips/pmc-sierra/yosemite/ht.c b/arch/mips/pmc-sierra/yosemite/ht.c
index 54b65a80abf..1f7c999eb7c 100644
--- a/arch/mips/pmc-sierra/yosemite/ht.c
+++ b/arch/mips/pmc-sierra/yosemite/ht.c
@@ -23,7 +23,6 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
@@ -383,12 +382,12 @@ void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
void pcibios_align_resource(void *data, struct resource *res,
- unsigned long size, unsigned long align)
+ resource_size_t size, resource_size_t align)
{
struct pci_dev *dev = data;
if (res->flags & IORESOURCE_IO) {
- unsigned long start = res->start;
+ resource_size_t start = res->start;
/* We need to avoid collisions with `mirrored' VGA ports
and other strange ISA hardware, so we always want the
diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c
index a1f524fc4c1..b91d0aa3b7e 100644
--- a/arch/mips/pmc-sierra/yosemite/irq.c
+++ b/arch/mips/pmc-sierra/yosemite/irq.c
@@ -26,7 +26,6 @@
*
* Second level Interrupt handlers for the PMC-Sierra Titan/Yosemite board
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c
index 165275c00cb..9fe4973377c 100644
--- a/arch/mips/pmc-sierra/yosemite/prom.c
+++ b/arch/mips/pmc-sierra/yosemite/prom.c
@@ -8,7 +8,6 @@
* Author: Manish Lachwani (lachwani@pmc-sierra.com)
* Copyright (C) 2004 Ralf Baechle
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c
index b19820110aa..ce8e4a7869b 100644
--- a/arch/mips/sgi-ip22/ip22-eisa.c
+++ b/arch/mips/sgi-ip22/ip22-eisa.c
@@ -19,7 +19,6 @@
* - Fix more bugs.
*/
-#include <linux/config.h>
#include <linux/eisa.h>
#include <linux/types.h>
#include <linux/init.h>
@@ -279,9 +278,9 @@ int __init ip22_eisa_init(void)
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
if (i < (SGINT_EISA + 8))
- irq_desc[i].handler = &ip22_eisa1_irq_type;
+ irq_desc[i].chip = &ip22_eisa1_irq_type;
else
- irq_desc[i].handler = &ip22_eisa2_irq_type;
+ irq_desc[i].chip = &ip22_eisa2_irq_type;
}
/* Cannot use request_irq because of kmalloc not being ready at such
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index fc6a7e2b189..2d8762818d9 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -9,7 +9,6 @@
* - Interrupt handling fixes
* Copyright (C) 2001, 2003 Ladislav Michl (ladis@linux-mips.org)
*/
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
@@ -273,32 +272,32 @@ static void indy_buserror_irq(struct pt_regs *regs)
static struct irqaction local0_cascade = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "local0 cascade",
};
static struct irqaction local1_cascade = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "local1 cascade",
};
static struct irqaction buserr = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "Bus Error",
};
static struct irqaction map0_cascade = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "mapable0 cascade",
};
#ifdef USE_LIO3_IRQ
static struct irqaction map1_cascade = {
.handler = no_action,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.name = "mapable1 cascade",
};
#define SGI_INTERRUPTS SGINT_END
@@ -436,7 +435,7 @@ void __init arch_init_irq(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = handler;
+ irq_desc[i].chip = handler;
}
/* vector handler. this register the IRQ as non-sharable */
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c
index d7138906eb1..25097ecc9ba 100644
--- a/arch/mips/sgi-ip22/ip22-setup.c
+++ b/arch/mips/sgi-ip22/ip22-setup.c
@@ -4,7 +4,6 @@
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
* Copyright (C) 1997, 1998 Ralf Baechle (ralf@gnu.org)
*/
-#include <linux/config.h>
#include <linux/ds1286.h>
#include <linux/init.h>
#include <linux/kernel.h>
diff --git a/arch/mips/sgi-ip27/Kconfig b/arch/mips/sgi-ip27/Kconfig
index f14ef38646d..5e960ae9735 100644
--- a/arch/mips/sgi-ip27/Kconfig
+++ b/arch/mips/sgi-ip27/Kconfig
@@ -33,12 +33,13 @@ config MAPPED_KERNEL
depends on SGI_IP27
help
Change the way a Linux kernel is loaded into memory on a MIPS64
- machine. This is required in order to support text replication and
+ machine. This is required in order to support text replication on
NUMA. If you need to understand it, read the source code.
config REPLICATE_KTEXT
bool "Kernel text replication support"
depends on SGI_IP27
+ select MAPPED_KERNEL
help
Say Y here to enable replicating the kernel text across multiple
nodes in a NUMA cluster. This trades memory for speed.
diff --git a/arch/mips/sgi-ip27/Makefile b/arch/mips/sgi-ip27/Makefile
index 686ba14e288..a457263f439 100644
--- a/arch/mips/sgi-ip27/Makefile
+++ b/arch/mips/sgi-ip27/Makefile
@@ -2,11 +2,12 @@
# Makefile for the IP27 specific kernel interface routines under Linux.
#
-obj-y := ip27-berr.o ip27-console.o ip27-irq.o ip27-init.o \
- ip27-klconfig.o ip27-klnuma.o ip27-memory.o ip27-nmi.o ip27-reset.o \
- ip27-timer.o ip27-hubio.o ip27-xtalk.o
+obj-y := ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o ip27-klnuma.o \
+ ip27-memory.o ip27-nmi.o ip27-reset.o ip27-timer.o ip27-hubio.o \
+ ip27-xtalk.o
-obj-$(CONFIG_KGDB) += ip27-dbgio.o
-obj-$(CONFIG_SMP) += ip27-smp.o
+obj-$(CONFIG_EARLY_PRINTK) += ip27-console.o
+obj-$(CONFIG_KGDB) += ip27-dbgio.o
+obj-$(CONFIG_SMP) += ip27-smp.o
EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sgi-ip27/ip27-console.c b/arch/mips/sgi-ip27/ip27-console.c
index 3e1ac299b80..14211e38237 100644
--- a/arch/mips/sgi-ip27/ip27-console.c
+++ b/arch/mips/sgi-ip27/ip27-console.c
@@ -46,33 +46,29 @@ void prom_putchar(char c)
uart->iu_thr = c;
}
-char __init prom_getchar(void)
+static void ioc3_console_write(struct console *con, const char *s, unsigned n)
{
- return 0;
+ while (n-- && *s) {
+ if (*s == '\n')
+ prom_putchar('\r');
+ prom_putchar(*s);
+ s++;
+ }
}
-static void inline ioc3_console_probe(void)
-{
- struct uart_port up;
-
- /*
- * Register to interrupt zero because we share the interrupt with
- * the serial driver which we don't properly support yet.
- */
- memset(&up, 0, sizeof(up));
- up.membase = (unsigned char *) console_uart();
- up.irq = 0;
- up.uartclk = IOC3_CLK;
- up.regshift = 0;
- up.iotype = UPIO_MEM;
- up.flags = IOC3_FLAGS;
- up.line = 0;
+static struct console ioc3_console = {
+ .name = "ioc3",
+ .write = ioc3_console_write,
+ .flags = CON_PRINTBUFFER | CON_BOOT,
+ .index = -1
+};
- if (early_serial_setup(&up))
- printk(KERN_ERR "Early serial init of port 0 failed\n");
+__init void ip27_setup_console(void)
+{
+ register_console(&ioc3_console);
}
-__init void ip27_setup_console(void)
+void __init disable_early_printk(void)
{
- ioc3_console_probe();
+ unregister_console(&ioc3_console);
}
diff --git a/arch/mips/sgi-ip27/ip27-init.c b/arch/mips/sgi-ip27/ip27-init.c
index a6b490e9970..9094baf31d0 100644
--- a/arch/mips/sgi-ip27/ip27-init.c
+++ b/arch/mips/sgi-ip27/ip27-init.c
@@ -6,7 +6,6 @@
* Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com)
* Copyright (C) 2000 - 2001 by Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 0b61a39ce2b..597ec73359b 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -8,7 +8,6 @@
#undef DEBUG
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/errno.h>
@@ -119,7 +118,7 @@ static int ms1bit(unsigned long x)
}
/*
- * This code is unnecessarily complex, because we do SA_INTERRUPT
+ * This code is unnecessarily complex, because we do IRQF_DISABLED
* intr enabling. Basically, once we grab the set of intrs we need
* to service, we must mask _all_ these interrupts; firstly, to make
* sure the same intr does not intr again, causing recursion that
@@ -386,7 +385,7 @@ void __devinit register_bridge_irq(unsigned int irq)
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = 0;
irq_desc[irq].depth = 1;
- irq_desc[irq].handler = &bridge_irq_type;
+ irq_desc[irq].chip = &bridge_irq_type;
}
int __devinit request_bridge_irq(struct bridge_controller *bc)
diff --git a/arch/mips/sgi-ip27/ip27-klnuma.c b/arch/mips/sgi-ip27/ip27-klnuma.c
index 41c3f405e00..d777b7d1a9f 100644
--- a/arch/mips/sgi-ip27/ip27-klnuma.c
+++ b/arch/mips/sgi-ip27/ip27-klnuma.c
@@ -3,7 +3,6 @@
* Copyright 2000 - 2001 Silicon Graphics, Inc.
* Copyright 2000 - 2001 Kanoj Sarcar (kanoj@sgi.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mmzone.h>
#include <linux/kernel.h>
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index 6c00dce9f73..efe6971fc80 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -10,7 +10,6 @@
* On SGI IP27 the ARC memory configuration data is completly bogus but
* alternate easier to use mechanisms are available.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mm.h>
diff --git a/arch/mips/sgi-ip27/ip27-reset.c b/arch/mips/sgi-ip27/ip27-reset.c
index 4322db57d3c..c17076108d4 100644
--- a/arch/mips/sgi-ip27/ip27-reset.c
+++ b/arch/mips/sgi-ip27/ip27-reset.c
@@ -8,7 +8,6 @@
* Copyright (C) 1997, 1998, 1999, 2000, 06 by Ralf Baechle
* Copyright (C) 1999, 2000 Silicon Graphics, Inc.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/timer.h>
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 1fb860c7ac6..3ca614a851e 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -217,7 +217,7 @@ static struct hw_interrupt_type rt_irq_type = {
static struct irqaction rt_irqaction = {
.handler = ip27_rt_timer_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
.name = "timer"
};
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c
index 8ba08047d16..3b7e74b6222 100644
--- a/arch/mips/sgi-ip32/ip32-irq.c
+++ b/arch/mips/sgi-ip32/ip32-irq.c
@@ -125,9 +125,9 @@ extern irqreturn_t crime_memerr_intr (int irq, void *dev_id,
extern irqreturn_t crime_cpuerr_intr (int irq, void *dev_id,
struct pt_regs *regs);
-struct irqaction memerr_irq = { crime_memerr_intr, SA_INTERRUPT,
+struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED,
CPU_MASK_NONE, "CRIME memory error", NULL, NULL };
-struct irqaction cpuerr_irq = { crime_cpuerr_intr, SA_INTERRUPT,
+struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED,
CPU_MASK_NONE, "CRIME CPU error", NULL, NULL };
/*
@@ -316,9 +316,9 @@ static struct hw_interrupt_type ip32_macepci_interrupt = {
MACEISA_KEYB_POLL_INT | \
MACEISA_MOUSE_INT | \
MACEISA_MOUSE_POLL_INT | \
- MACEISA_TIMER0_INT | \
- MACEISA_TIMER1_INT | \
- MACEISA_TIMER2_INT)
+ MACEIIRQF_TIMER0_INT | \
+ MACEIIRQF_TIMER1_INT | \
+ MACEIIRQF_TIMER2_INT)
#define MACEISA_SUPERIO_INT (MACEISA_PARALLEL_INT | \
MACEISA_PAR_CTXA_INT | \
MACEISA_PAR_CTXB_INT | \
@@ -349,7 +349,7 @@ static void enable_maceisa_irq (unsigned int irq)
case MACEISA_AUDIO_SW_IRQ ... MACEISA_AUDIO3_MERR_IRQ:
crime_int = MACE_AUDIO_INT;
break;
- case MACEISA_RTC_IRQ ... MACEISA_TIMER2_IRQ:
+ case MACEISA_RTC_IRQ ... MACEIIRQF_TIMER2_IRQ:
crime_int = MACE_MISC_INT;
break;
case MACEISA_PARALLEL_IRQ ... MACEISA_SERIAL2_RDMAOR_IRQ:
@@ -591,7 +591,7 @@ void __init arch_init_irq(void)
irq_desc[irq].status = IRQ_DISABLED;
irq_desc[irq].action = 0;
irq_desc[irq].depth = 0;
- irq_desc[irq].handler = controller;
+ irq_desc[irq].chip = controller;
}
setup_irq(CRIME_MEMERR_IRQ, &memerr_irq);
setup_irq(CRIME_CPUERR_IRQ, &cpuerr_irq);
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index acbdad06fac..240a2f981d0 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -8,7 +8,6 @@
* Copyright (C) 2000 Harald Koerfgen
* Copyright (C) 2002, 2003, 2005 Ilya A. Volynets
*/
-#include <linux/config.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/interrupt.h>
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index 816aee7fcd2..ec7a2cffacf 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -3,6 +3,7 @@ config SIBYTE_SB1250
select HW_HAS_PCI
select SIBYTE_HAS_LDT
select SIBYTE_SB1xxx_SOC
+ select SYS_SUPPORTS_SMP
config SIBYTE_BCM1120
bool
@@ -30,11 +31,13 @@ config SIBYTE_BCM1x80
bool
select HW_HAS_PCI
select SIBYTE_SB1xxx_SOC
+ select SYS_SUPPORTS_SMP
config SIBYTE_BCM1x55
bool
select HW_HAS_PCI
select SIBYTE_SB1xxx_SOC
+ select SYS_SUPPORTS_SMP
config SIBYTE_SB1xxx_SOC
bool
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index e61760b14d9..29d3bbb5847 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -15,7 +15,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/linkage.h>
@@ -276,10 +275,10 @@ void __init init_bcm1480_irqs(void)
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
if (i < BCM1480_NR_IRQS) {
- irq_desc[i].handler = &bcm1480_irq_type;
+ irq_desc[i].chip = &bcm1480_irq_type;
bcm1480_irq_owner[i] = 0;
} else {
- irq_desc[i].handler = &no_irq_type;
+ irq_desc[i].chip = &no_irq_type;
}
}
}
diff --git a/arch/mips/sibyte/bcm1480/setup.c b/arch/mips/sibyte/bcm1480/setup.c
index d90a0b87874..8236d0c4854 100644
--- a/arch/mips/sibyte/bcm1480/setup.c
+++ b/arch/mips/sibyte/bcm1480/setup.c
@@ -15,7 +15,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/string.h>
diff --git a/arch/mips/sibyte/bcm1480/time.c b/arch/mips/sibyte/bcm1480/time.c
index efaf83efd2e..7e088f6c4a8 100644
--- a/arch/mips/sibyte/bcm1480/time.c
+++ b/arch/mips/sibyte/bcm1480/time.c
@@ -25,7 +25,6 @@
* code to do general bookkeeping (e.g. update jiffies, run
* bottom halves, etc.)
*/
-#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
diff --git a/arch/mips/sibyte/cfe/console.c b/arch/mips/sibyte/cfe/console.c
index 7721100d027..c6ec748175b 100644
--- a/arch/mips/sibyte/cfe/console.c
+++ b/arch/mips/sibyte/cfe/console.c
@@ -1,4 +1,3 @@
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/console.h>
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index ea308029450..6e8952da6e2 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -16,7 +16,6 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/linkage.h>
diff --git a/arch/mips/sibyte/sb1250/bus_watcher.c b/arch/mips/sibyte/sb1250/bus_watcher.c
index 482dee054e6..bb90649fbc4 100644
--- a/arch/mips/sibyte/sb1250/bus_watcher.c
+++ b/arch/mips/sibyte/sb1250/bus_watcher.c
@@ -25,7 +25,6 @@
* /proc/bus_watcher if PROC_FS is on.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/interrupt.h>
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c
index f853c32f60a..1d280aabcf6 100644
--- a/arch/mips/sibyte/sb1250/irq.c
+++ b/arch/mips/sibyte/sb1250/irq.c
@@ -15,7 +15,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/linkage.h>
@@ -246,10 +245,10 @@ void __init init_sb1250_irqs(void)
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
if (i < SB1250_NR_IRQS) {
- irq_desc[i].handler = &sb1250_irq_type;
+ irq_desc[i].chip = &sb1250_irq_type;
sb1250_irq_owner[i] = 0;
} else {
- irq_desc[i].handler = &no_irq_type;
+ irq_desc[i].chip = &no_irq_type;
}
}
}
diff --git a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c
index 742043f8d75..3c33a4517bc 100644
--- a/arch/mips/sibyte/sb1250/prom.c
+++ b/arch/mips/sibyte/sb1250/prom.c
@@ -16,7 +16,6 @@
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mm.h>
diff --git a/arch/mips/sibyte/sb1250/setup.c b/arch/mips/sibyte/sb1250/setup.c
index fde4751c84f..d0ee1d5b822 100644
--- a/arch/mips/sibyte/sb1250/setup.c
+++ b/arch/mips/sibyte/sb1250/setup.c
@@ -15,7 +15,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
diff --git a/arch/mips/sibyte/sb1250/time.c b/arch/mips/sibyte/sb1250/time.c
index 1588f6debd9..4b669dc86ef 100644
--- a/arch/mips/sibyte/sb1250/time.c
+++ b/arch/mips/sibyte/sb1250/time.c
@@ -25,7 +25,6 @@
* code to do general bookkeeping (e.g. update jiffies, run
* bottom halves, etc.)
*/
-#include <linux/config.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/spinlock.h>
diff --git a/arch/mips/sibyte/swarm/setup.c b/arch/mips/sibyte/swarm/setup.c
index f9e694988cd..a9a6dbc0684 100644
--- a/arch/mips/sibyte/swarm/setup.c
+++ b/arch/mips/sibyte/swarm/setup.c
@@ -21,7 +21,6 @@
* Setup code for the SWARM board
*/
-#include <linux/config.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c
index 7365b4853dd..c19e158ec40 100644
--- a/arch/mips/sni/irq.c
+++ b/arch/mips/sni/irq.c
@@ -203,7 +203,7 @@ void __init arch_init_irq(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &pciasic_irq_type;
+ irq_desc[i].chip = &pciasic_irq_type;
}
change_c0_status(ST0_IM, IE_IRQ1|IE_IRQ2|IE_IRQ3|IE_IRQ4);
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index a050bb6ae70..870486d6cd7 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -7,7 +7,6 @@
*
* Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org)
*/
-#include <linux/config.h>
#include <linux/eisa.h>
#include <linux/hdreg.h>
#include <linux/ioport.h>
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
index 8ca68015cf4..ae9d5653a86 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -23,7 +23,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
@@ -227,7 +226,7 @@ static void __init tx4927_irq_cp0_init(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &tx4927_irq_cp0_type;
+ irq_desc[i].chip = &tx4927_irq_cp0_type;
}
return;
@@ -435,7 +434,7 @@ static void __init tx4927_irq_pic_init(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 2;
- irq_desc[i].handler = &tx4927_irq_pic_type;
+ irq_desc[i].chip = &tx4927_irq_pic_type;
}
setup_irq(TX4927_IRQ_NEST_PIC_ON_CP0, &tx4927_irq_pic_action);
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 81a5acfe8c4..64a1b394b25 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -24,7 +24,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel_stat.h>
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index aee07ff2212..ec0a0de3083 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -111,7 +111,6 @@ SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
@@ -338,7 +337,7 @@ int toshiba_rbtx4927_irq_nested(int sw_irq)
}
//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
-#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, SA_SHIRQ, CPU_MASK_NONE, s, NULL, NULL }
+#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL }
static struct irqaction toshiba_rbtx4927_irq_ioc_action =
TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME);
#ifdef CONFIG_TOSHIBA_FPCIB0
@@ -368,7 +367,7 @@ static void __init toshiba_rbtx4927_irq_ioc_init(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 3;
- irq_desc[i].handler = &toshiba_rbtx4927_irq_ioc_type;
+ irq_desc[i].chip = &toshiba_rbtx4927_irq_ioc_type;
}
setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
@@ -526,7 +525,7 @@ static void __init toshiba_rbtx4927_irq_isa_init(void)
irq_desc[i].action = 0;
irq_desc[i].depth =
((i < TOSHIBA_RBTX4927_IRQ_ISA_MID) ? (4) : (5));
- irq_desc[i].handler = &toshiba_rbtx4927_irq_isa_type;
+ irq_desc[i].chip = &toshiba_rbtx4927_irq_isa_type;
}
setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC,
@@ -692,13 +691,13 @@ void toshiba_rbtx4927_irq_dump(char *key)
{
u32 i, j = 0;
for (i = 0; i < NR_IRQS; i++) {
- if (strcmp(irq_desc[i].handler->typename, "none")
+ if (strcmp(irq_desc[i].chip->typename, "none")
== 0)
continue;
if ((i >= 1)
- && (irq_desc[i - 1].handler->typename ==
- irq_desc[i].handler->typename)) {
+ && (irq_desc[i - 1].chip->typename ==
+ irq_desc[i].chip->typename)) {
j++;
} else {
j = 0;
@@ -707,12 +706,12 @@ void toshiba_rbtx4927_irq_dump(char *key)
(TOSHIBA_RBTX4927_IRQ_INFO,
"%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
key, i, i, irq_desc[i].status,
- (u32) irq_desc[i].handler,
+ (u32) irq_desc[i].chip,
(u32) irq_desc[i].action,
(u32) (irq_desc[i].action ? irq_desc[i].
action->handler : 0),
irq_desc[i].depth,
- irq_desc[i].handler->typename, j);
+ irq_desc[i].chip->typename, j);
}
}
#endif
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
index 6dcf077f61a..f0d70c47600 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
@@ -42,7 +42,6 @@
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
index 873805178d8..0b2f8c84921 100644
--- a/arch/mips/tx4938/common/irq.c
+++ b/arch/mips/tx4938/common/irq.c
@@ -102,7 +102,7 @@ tx4938_irq_cp0_init(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 1;
- irq_desc[i].handler = &tx4938_irq_cp0_type;
+ irq_desc[i].chip = &tx4938_irq_cp0_type;
}
return;
@@ -306,7 +306,7 @@ tx4938_irq_pic_init(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 2;
- irq_desc[i].handler = &tx4938_irq_pic_type;
+ irq_desc[i].chip = &tx4938_irq_pic_type;
}
setup_irq(TX4938_IRQ_NEST_PIC_ON_CP0, &tx4938_irq_pic_action);
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
index 9cd9c0fe226..3b8245dc5bd 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
@@ -146,7 +146,7 @@ toshiba_rbtx4938_irq_ioc_init(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = 0;
irq_desc[i].depth = 3;
- irq_desc[i].handler = &toshiba_rbtx4938_irq_ioc_type;
+ irq_desc[i].chip = &toshiba_rbtx4938_irq_ioc_type;
}
setup_irq(RBTX4938_IRQ_IOCINT,
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
index 7df8b32ba26..e44daf30a7c 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
@@ -12,7 +12,6 @@
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
index 96e833cd4c1..66163ba452c 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
@@ -11,7 +11,6 @@
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/ioport.h>
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
index 951a208ee9b..89596e62f90 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
@@ -9,7 +9,6 @@
*
* Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/proc_fs.h>
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 07ae19cf0c2..b9323302cc4 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -722,10 +722,10 @@ static int __init vr41xx_icu_init(void)
icu2_write(MGIUINTHREG, 0xffff);
for (i = SYSINT1_IRQ_BASE; i <= SYSINT1_IRQ_LAST; i++)
- irq_desc[i].handler = &sysint1_irq_type;
+ irq_desc[i].chip = &sysint1_irq_type;
for (i = SYSINT2_IRQ_BASE; i <= SYSINT2_IRQ_LAST; i++)
- irq_desc[i].handler = &sysint2_irq_type;
+ irq_desc[i].chip = &sysint2_irq_type;
cascade_irq(INT0_IRQ, icu_get_irq);
cascade_irq(INT1_IRQ, icu_get_irq);
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 86796bb63c3..66aa50802de 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -73,13 +73,13 @@ static void irq_dispatch(unsigned int irq, struct pt_regs *regs)
if (cascade->get_irq != NULL) {
unsigned int source_irq = irq;
desc = irq_desc + source_irq;
- desc->handler->ack(source_irq);
+ desc->chip->ack(source_irq);
irq = cascade->get_irq(irq, regs);
if (irq < 0)
atomic_inc(&irq_err_count);
else
irq_dispatch(irq, regs);
- desc->handler->end(source_irq);
+ desc->chip->end(source_irq);
} else
do_IRQ(irq, regs);
}
diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c
index 3e31f8193d2..2d287b8893d 100644
--- a/arch/mips/vr41xx/common/vrc4173.c
+++ b/arch/mips/vr41xx/common/vrc4173.c
@@ -483,7 +483,7 @@ static inline int vrc4173_icu_init(int cascade_irq)
vr41xx_set_irq_level(GIU_IRQ_TO_PIN(cascade_irq), LEVEL_LOW);
for (i = VRC4173_IRQ_BASE; i <= VRC4173_IRQ_LAST; i++)
- irq_desc[i].handler = &vrc4173_irq_type;
+ irq_desc[i].chip = &vrc4173_irq_type;
return 0;
}
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/init.c b/arch/mips/vr41xx/nec-cmbvr4133/init.c
index be590edb0b8..ae1af6b21c4 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/init.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/init.c
@@ -15,7 +15,6 @@
* Support for NEC-CMBVR4133 in 2.6
* Manish Lachwani (mlachwani@mvista.com)
*/
-#include <linux/config.h>
#ifdef CONFIG_ROCKHOPPER
#include <asm/io.h>
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
index 31db6b61a39..7b2511ca0a6 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
@@ -104,7 +104,7 @@ void __init rockhopper_init_irq(void)
}
for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++)
- irq_desc[i].handler = &i8259_irq_type;
+ irq_desc[i].chip = &i8259_irq_type;
setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade);
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
index 1f6b24ef869..f45caccedc0 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
@@ -14,7 +14,6 @@
* Support for NEC-CMBVR4133 in 2.6
* Author: Manish Lachwani (mlachwani@mvista.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/serial.h>
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/setup.c b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
index 53272a5c3cb..b20b93b2b95 100644
--- a/arch/mips/vr41xx/nec-cmbvr4133/setup.c
+++ b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
@@ -14,7 +14,6 @@
* Support for CMBVR4133 board in 2.6
* Author: Manish Lachwani (mlachwani@mvista.com)
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/ide.h>
#include <linux/ioport.h>