diff options
Diffstat (limited to 'arch/mips/powertv')
30 files changed, 0 insertions, 4659 deletions
diff --git a/arch/mips/powertv/Kconfig b/arch/mips/powertv/Kconfig deleted file mode 100644 index dd91fbacbcb..00000000000 --- a/arch/mips/powertv/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -config BOOTLOADER_FAMILY - string "POWERTV Bootloader Family string" - default "85" - depends on POWERTV - help - This value should be specified when the bootloader driver is disabled - and must be exactly two characters long. Families supported are: - R1 - RNG-100 R2 - RNG-200 - A1 - Class A B1 - Class B - E1 - Class E F1 - Class F - 44 - 45xx 46 - 46xx - 85 - 85xx 86 - 86xx diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile deleted file mode 100644 index 39ca9f8d63a..00000000000 --- a/arch/mips/powertv/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -# -# Carsten Langgaard, carstenl@mips.com -# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. -# -# Carsten Langgaard, carstenl@mips.com -# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. -# Portions copyright (C) 2009 Cisco Systems, Inc. -# -# This program is free software; you can distribute it and/or modify it -# under the terms of the GNU General Public License (Version 2) as -# published by the Free Software Foundation. -# -# This program is distributed in the hope it will be useful, but WITHOUT -# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or -# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -# for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. -# -# Makefile for the Cisco PowerTV-specific kernel interface routines -# under Linux. -# - -obj-y += init.o ioremap.o memory.o powertv_setup.o reset.o time.o \ - asic/ pci/ - -obj-$(CONFIG_USB) += powertv-usb.o diff --git a/arch/mips/powertv/Platform b/arch/mips/powertv/Platform deleted file mode 100644 index 4eb5af1d8ee..00000000000 --- a/arch/mips/powertv/Platform +++ /dev/null @@ -1,7 +0,0 @@ -# -# Cisco PowerTV Platform -# -platform-$(CONFIG_POWERTV) += powertv/ -cflags-$(CONFIG_POWERTV) += \ - -I$(srctree)/arch/mips/include/asm/mach-powertv -load-$(CONFIG_POWERTV) += 0xffffffff90800000 diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile deleted file mode 100644 index 35dcc53eb25..00000000000 --- a/arch/mips/powertv/asic/Makefile +++ /dev/null @@ -1,21 +0,0 @@ -# -# Copyright (C) 2009 Scientific-Atlanta, Inc. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or -# (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -# - -obj-y += asic-calliope.o asic-cronus.o asic-gaia.o asic-zeus.o \ - asic_devices.o asic_int.o irq_asic.o prealloc-calliope.o \ - prealloc-cronus.o prealloc-cronuslite.o prealloc-gaia.o prealloc-zeus.o diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c deleted file mode 100644 index 2f539b43f56..00000000000 --- a/arch/mips/powertv/asic/asic-calliope.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Locations of devices in the Calliope ASIC. - * - * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * Author: Ken Eppinett - * David Schleef <ds@schleef.org> - * - * Description: Defines the platform resources for the SA settop. - */ - -#include <linux/init.h> -#include <asm/mach-powertv/asic.h> - -#define CALLIOPE_ADDR(x) (CALLIOPE_IO_BASE + (x)) - -const struct register_map calliope_register_map __initconst = { - .eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)}, - .eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)}, - .eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)}, - - .chipver3 = {.phys = CALLIOPE_ADDR(0xA00800)}, - .chipver2 = {.phys = CALLIOPE_ADDR(0xA00804)}, - .chipver1 = {.phys = CALLIOPE_ADDR(0xA00808)}, - .chipver0 = {.phys = CALLIOPE_ADDR(0xA0080c)}, - - /* The registers of IRBlaster */ - .uart1_intstat = {.phys = CALLIOPE_ADDR(0xA01800)}, - .uart1_inten = {.phys = CALLIOPE_ADDR(0xA01804)}, - .uart1_config1 = {.phys = CALLIOPE_ADDR(0xA01808)}, - .uart1_config2 = {.phys = CALLIOPE_ADDR(0xA0180C)}, - .uart1_divisorhi = {.phys = CALLIOPE_ADDR(0xA01810)}, - .uart1_divisorlo = {.phys = CALLIOPE_ADDR(0xA01814)}, - .uart1_data = {.phys = CALLIOPE_ADDR(0xA01818)}, - .uart1_status = {.phys = CALLIOPE_ADDR(0xA0181C)}, - - .int_stat_3 = {.phys = CALLIOPE_ADDR(0xA02800)}, - .int_stat_2 = {.phys = CALLIOPE_ADDR(0xA02804)}, - .int_stat_1 = {.phys = CALLIOPE_ADDR(0xA02808)}, - .int_stat_0 = {.phys = CALLIOPE_ADDR(0xA0280c)}, - .int_config = {.phys = CALLIOPE_ADDR(0xA02810)}, - .int_int_scan = {.phys = CALLIOPE_ADDR(0xA02818)}, - .ien_int_3 = {.phys = CALLIOPE_ADDR(0xA02830)}, - .ien_int_2 = {.phys = CALLIOPE_ADDR(0xA02834)}, - .ien_int_1 = {.phys = CALLIOPE_ADDR(0xA02838)}, - .ien_int_0 = {.phys = CALLIOPE_ADDR(0xA0283c)}, - .int_level_3_3 = {.phys = CALLIOPE_ADDR(0xA02880)}, - .int_level_3_2 = {.phys = CALLIOPE_ADDR(0xA02884)}, - .int_level_3_1 = {.phys = CALLIOPE_ADDR(0xA02888)}, - .int_level_3_0 = {.phys = CALLIOPE_ADDR(0xA0288c)}, - .int_level_2_3 = {.phys = CALLIOPE_ADDR(0xA02890)}, - .int_level_2_2 = {.phys = CALLIOPE_ADDR(0xA02894)}, - .int_level_2_1 = {.phys = CALLIOPE_ADDR(0xA02898)}, - .int_level_2_0 = {.phys = CALLIOPE_ADDR(0xA0289c)}, - .int_level_1_3 = {.phys = CALLIOPE_ADDR(0xA028a0)}, - .int_level_1_2 = {.phys = CALLIOPE_ADDR(0xA028a4)}, - .int_level_1_1 = {.phys = CALLIOPE_ADDR(0xA028a8)}, - .int_level_1_0 = {.phys = CALLIOPE_ADDR(0xA028ac)}, - .int_level_0_3 = {.phys = CALLIOPE_ADDR(0xA028b0)}, - .int_level_0_2 = {.phys = CALLIOPE_ADDR(0xA028b4)}, - .int_level_0_1 = {.phys = CALLIOPE_ADDR(0xA028b8)}, - .int_level_0_0 = {.phys = CALLIOPE_ADDR(0xA028bc)}, - .int_docsis_en = {.phys = CALLIOPE_ADDR(0xA028F4)}, - - .mips_pll_setup = {.phys = CALLIOPE_ADDR(0x980000)}, - .fs432x4b4_usb_ctl = {.phys = CALLIOPE_ADDR(0x980030)}, - .test_bus = {.phys = CALLIOPE_ADDR(0x9800CC)}, - .crt_spare = {.phys = CALLIOPE_ADDR(0x9800d4)}, - .usb2_ohci_int_mask = {.phys = CALLIOPE_ADDR(0x9A000c)}, - .usb2_strap = {.phys = CALLIOPE_ADDR(0x9A0014)}, - .ehci_hcapbase = {.phys = CALLIOPE_ADDR(0x9BFE00)}, - .ohci_hc_revision = {.phys = CALLIOPE_ADDR(0x9BFC00)}, - .bcm1_bs_lmi_steer = {.phys = CALLIOPE_ADDR(0x9E0004)}, - .usb2_control = {.phys = CALLIOPE_ADDR(0x9E0054)}, - .usb2_stbus_obc = {.phys = CALLIOPE_ADDR(0x9BFF00)}, - .usb2_stbus_mess_size = {.phys = CALLIOPE_ADDR(0x9BFF04)}, - .usb2_stbus_chunk_size = {.phys = CALLIOPE_ADDR(0x9BFF08)}, - - .pcie_regs = {.phys = 0x000000}, /* -doesn't exist- */ - .tim_ch = {.phys = CALLIOPE_ADDR(0xA02C10)}, - .tim_cl = {.phys = CALLIOPE_ADDR(0xA02C14)}, - .gpio_dout = {.phys = CALLIOPE_ADDR(0xA02c20)}, - .gpio_din = {.phys = CALLIOPE_ADDR(0xA02c24)}, - .gpio_dir = {.phys = CALLIOPE_ADDR(0xA02c2C)}, - .watchdog = {.phys = CALLIOPE_ADDR(0xA02c30)}, - .front_panel = {.phys = 0x000000}, /* -not used- */ -}; diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c deleted file mode 100644 index 7f8f3429b35..00000000000 --- a/arch/mips/powertv/asic/asic-cronus.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Locations of devices in the Cronus ASIC - * - * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * Author: Ken Eppinett - * David Schleef <ds@schleef.org> - * - * Description: Defines the platform resources for the SA settop. - */ - -#include <linux/init.h> -#include <asm/mach-powertv/asic.h> - -#define CRONUS_ADDR(x) (CRONUS_IO_BASE + (x)) - -const struct register_map cronus_register_map __initconst = { - .eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)}, - .eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)}, - .eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)}, - - .chipver3 = {.phys = CRONUS_ADDR(0x2A0800)}, - .chipver2 = {.phys = CRONUS_ADDR(0x2A0804)}, - .chipver1 = {.phys = CRONUS_ADDR(0x2A0808)}, - .chipver0 = {.phys = CRONUS_ADDR(0x2A080C)}, - - /* The registers of IRBlaster */ - .uart1_intstat = {.phys = CRONUS_ADDR(0x2A1800)}, - .uart1_inten = {.phys = CRONUS_ADDR(0x2A1804)}, - .uart1_config1 = {.phys = CRONUS_ADDR(0x2A1808)}, - .uart1_config2 = {.phys = CRONUS_ADDR(0x2A180C)}, - .uart1_divisorhi = {.phys = CRONUS_ADDR(0x2A1810)}, - .uart1_divisorlo = {.phys = CRONUS_ADDR(0x2A1814)}, - .uart1_data = {.phys = CRONUS_ADDR(0x2A1818)}, - .uart1_status = {.phys = CRONUS_ADDR(0x2A181C)}, - - .int_stat_3 = {.phys = CRONUS_ADDR(0x2A2800)}, - .int_stat_2 = {.phys = CRONUS_ADDR(0x2A2804)}, - .int_stat_1 = {.phys = CRONUS_ADDR(0x2A2808)}, - .int_stat_0 = {.phys = CRONUS_ADDR(0x2A280C)}, - .int_config = {.phys = CRONUS_ADDR(0x2A2810)}, - .int_int_scan = {.phys = CRONUS_ADDR(0x2A2818)}, - .ien_int_3 = {.phys = CRONUS_ADDR(0x2A2830)}, - .ien_int_2 = {.phys = CRONUS_ADDR(0x2A2834)}, - .ien_int_1 = {.phys = CRONUS_ADDR(0x2A2838)}, - .ien_int_0 = {.phys = CRONUS_ADDR(0x2A283C)}, - .int_level_3_3 = {.phys = CRONUS_ADDR(0x2A2880)}, - .int_level_3_2 = {.phys = CRONUS_ADDR(0x2A2884)}, - .int_level_3_1 = {.phys = CRONUS_ADDR(0x2A2888)}, - .int_level_3_0 = {.phys = CRONUS_ADDR(0x2A288C)}, - .int_level_2_3 = {.phys = CRONUS_ADDR(0x2A2890)}, - .int_level_2_2 = {.phys = CRONUS_ADDR(0x2A2894)}, - .int_level_2_1 = {.phys = CRONUS_ADDR(0x2A2898)}, - .int_level_2_0 = {.phys = CRONUS_ADDR(0x2A289C)}, - .int_level_1_3 = {.phys = CRONUS_ADDR(0x2A28A0)}, - .int_level_1_2 = {.phys = CRONUS_ADDR(0x2A28A4)}, - .int_level_1_1 = {.phys = CRONUS_ADDR(0x2A28A8)}, - .int_level_1_0 = {.phys = CRONUS_ADDR(0x2A28AC)}, - .int_level_0_3 = {.phys = CRONUS_ADDR(0x2A28B0)}, - .int_level_0_2 = {.phys = CRONUS_ADDR(0x2A28B4)}, - .int_level_0_1 = {.phys = CRONUS_ADDR(0x2A28B8)}, - .int_level_0_0 = {.phys = CRONUS_ADDR(0x2A28BC)}, - .int_docsis_en = {.phys = CRONUS_ADDR(0x2A28F4)}, - - .mips_pll_setup = {.phys = CRONUS_ADDR(0x1C0000)}, - .fs432x4b4_usb_ctl = {.phys = CRONUS_ADDR(0x1C0028)}, - .test_bus = {.phys = CRONUS_ADDR(0x1C00CC)}, - .crt_spare = {.phys = CRONUS_ADDR(0x1c00d4)}, - .usb2_ohci_int_mask = {.phys = CRONUS_ADDR(0x20000C)}, - .usb2_strap = {.phys = CRONUS_ADDR(0x200014)}, - .ehci_hcapbase = {.phys = CRONUS_ADDR(0x21FE00)}, - .ohci_hc_revision = {.phys = CRONUS_ADDR(0x21fc00)}, - .bcm1_bs_lmi_steer = {.phys = CRONUS_ADDR(0x2E0008)}, - .usb2_control = {.phys = CRONUS_ADDR(0x2E004C)}, - .usb2_stbus_obc = {.phys = CRONUS_ADDR(0x21FF00)}, - .usb2_stbus_mess_size = {.phys = CRONUS_ADDR(0x21FF04)}, - .usb2_stbus_chunk_size = {.phys = CRONUS_ADDR(0x21FF08)}, - - .pcie_regs = {.phys = CRONUS_ADDR(0x220000)}, - .tim_ch = {.phys = CRONUS_ADDR(0x2A2C10)}, - .tim_cl = {.phys = CRONUS_ADDR(0x2A2C14)}, - .gpio_dout = {.phys = CRONUS_ADDR(0x2A2C20)}, - .gpio_din = {.phys = CRONUS_ADDR(0x2A2C24)}, - .gpio_dir = {.phys = CRONUS_ADDR(0x2A2C2C)}, - .watchdog = {.phys = CRONUS_ADDR(0x2A2C30)}, - .front_panel = {.phys = CRONUS_ADDR(0x2A3800)}, -}; diff --git a/arch/mips/powertv/asic/asic-gaia.c b/arch/mips/powertv/asic/asic-gaia.c deleted file mode 100644 index 1265b49012e..00000000000 --- a/arch/mips/powertv/asic/asic-gaia.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Locations of devices in the Gaia ASIC - * - * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * Author: David VomLehn - */ - -#include <linux/init.h> -#include <asm/mach-powertv/asic.h> - -const struct register_map gaia_register_map __initconst = { - .eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000}, - .eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038}, - .eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C}, - - .chipver3 = {.phys = GAIA_IO_BASE + 0x2A0800}, - .chipver2 = {.phys = GAIA_IO_BASE + 0x2A0804}, - .chipver1 = {.phys = GAIA_IO_BASE + 0x2A0808}, - .chipver0 = {.phys = GAIA_IO_BASE + 0x2A080C}, - - /* The registers of IRBlaster */ - .uart1_intstat = {.phys = GAIA_IO_BASE + 0x2A1800}, - .uart1_inten = {.phys = GAIA_IO_BASE + 0x2A1804}, - .uart1_config1 = {.phys = GAIA_IO_BASE + 0x2A1808}, - .uart1_config2 = {.phys = GAIA_IO_BASE + 0x2A180C}, - .uart1_divisorhi = {.phys = GAIA_IO_BASE + 0x2A1810}, - .uart1_divisorlo = {.phys = GAIA_IO_BASE + 0x2A1814}, - .uart1_data = {.phys = GAIA_IO_BASE + 0x2A1818}, - .uart1_status = {.phys = GAIA_IO_BASE + 0x2A181C}, - - .int_stat_3 = {.phys = GAIA_IO_BASE + 0x2A2800}, - .int_stat_2 = {.phys = GAIA_IO_BASE + 0x2A2804}, - .int_stat_1 = {.phys = GAIA_IO_BASE + 0x2A2808}, - .int_stat_0 = {.phys = GAIA_IO_BASE + 0x2A280C}, - .int_config = {.phys = GAIA_IO_BASE + 0x2A2810}, - .int_int_scan = {.phys = GAIA_IO_BASE + 0x2A2818}, - .ien_int_3 = {.phys = GAIA_IO_BASE + 0x2A2830}, - .ien_int_2 = {.phys = GAIA_IO_BASE + 0x2A2834}, - .ien_int_1 = {.phys = GAIA_IO_BASE + 0x2A2838}, - .ien_int_0 = {.phys = GAIA_IO_BASE + 0x2A283C}, - .int_level_3_3 = {.phys = GAIA_IO_BASE + 0x2A2880}, - .int_level_3_2 = {.phys = GAIA_IO_BASE + 0x2A2884}, - .int_level_3_1 = {.phys = GAIA_IO_BASE + 0x2A2888}, - .int_level_3_0 = {.phys = GAIA_IO_BASE + 0x2A288C}, - .int_level_2_3 = {.phys = GAIA_IO_BASE + 0x2A2890}, - .int_level_2_2 = {.phys = GAIA_IO_BASE + 0x2A2894}, - .int_level_2_1 = {.phys = GAIA_IO_BASE + 0x2A2898}, - .int_level_2_0 = {.phys = GAIA_IO_BASE + 0x2A289C}, - .int_level_1_3 = {.phys = GAIA_IO_BASE + 0x2A28A0}, - .int_level_1_2 = {.phys = GAIA_IO_BASE + 0x2A28A4}, - .int_level_1_1 = {.phys = GAIA_IO_BASE + 0x2A28A8}, - .int_level_1_0 = {.phys = GAIA_IO_BASE + 0x2A28AC}, - .int_level_0_3 = {.phys = GAIA_IO_BASE + 0x2A28B0}, - .int_level_0_2 = {.phys = GAIA_IO_BASE + 0x2A28B4}, - .int_level_0_1 = {.phys = GAIA_IO_BASE + 0x2A28B8}, - .int_level_0_0 = {.phys = GAIA_IO_BASE + 0x2A28BC}, - .int_docsis_en = {.phys = GAIA_IO_BASE + 0x2A28F4}, - - .mips_pll_setup = {.phys = GAIA_IO_BASE + 0x1C0000}, - .fs432x4b4_usb_ctl = {.phys = GAIA_IO_BASE + 0x1C0024}, - .test_bus = {.phys = GAIA_IO_BASE + 0x1C00CC}, - .crt_spare = {.phys = GAIA_IO_BASE + 0x1c0108}, - .usb2_ohci_int_mask = {.phys = GAIA_IO_BASE + 0x20000C}, - .usb2_strap = {.phys = GAIA_IO_BASE + 0x200014}, - .ehci_hcapbase = {.phys = GAIA_IO_BASE + 0x21FE00}, - .ohci_hc_revision = {.phys = GAIA_IO_BASE + 0x21fc00}, - .bcm1_bs_lmi_steer = {.phys = GAIA_IO_BASE + 0x2E0004}, - .usb2_control = {.phys = GAIA_IO_BASE + 0x2E004C}, - .usb2_stbus_obc = {.phys = GAIA_IO_BASE + 0x21FF00}, - .usb2_stbus_mess_size = {.phys = GAIA_IO_BASE + 0x21FF04}, - .usb2_stbus_chunk_size = {.phys = GAIA_IO_BASE + 0x21FF08}, - - .pcie_regs = {.phys = GAIA_IO_BASE + 0x220000}, - .tim_ch = {.phys = GAIA_IO_BASE + 0x2A2C10}, - .tim_cl = {.phys = GAIA_IO_BASE + 0x2A2C14}, - .gpio_dout = {.phys = GAIA_IO_BASE + 0x2A2C20}, - .gpio_din = {.phys = GAIA_IO_BASE + 0x2A2C24}, - .gpio_dir = {.phys = GAIA_IO_BASE + 0x2A2C2C}, - .watchdog = {.phys = GAIA_IO_BASE + 0x2A2C30}, - .front_panel = {.phys = GAIA_IO_BASE + 0x2A3800}, -}; diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c deleted file mode 100644 index 14e7de137e0..00000000000 --- a/arch/mips/powertv/asic/asic-zeus.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Locations of devices in the Zeus ASIC - * - * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * Author: Ken Eppinett - * David Schleef <ds@schleef.org> - * - * Description: Defines the platform resources for the SA settop. - */ - -#include <linux/init.h> -#include <asm/mach-powertv/asic.h> - -#define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x)) - -const struct register_map zeus_register_map __initconst = { - .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)}, - .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)}, - .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)}, - - .chipver3 = {.phys = ZEUS_ADDR(0x280800)}, - .chipver2 = {.phys = ZEUS_ADDR(0x280804)}, - .chipver1 = {.phys = ZEUS_ADDR(0x280808)}, - .chipver0 = {.phys = ZEUS_ADDR(0x28080c)}, - - /* The registers of IRBlaster */ - .uart1_intstat = {.phys = ZEUS_ADDR(0x281800)}, - .uart1_inten = {.phys = ZEUS_ADDR(0x281804)}, - .uart1_config1 = {.phys = ZEUS_ADDR(0x281808)}, - .uart1_config2 = {.phys = ZEUS_ADDR(0x28180C)}, - .uart1_divisorhi = {.phys = ZEUS_ADDR(0x281810)}, - .uart1_divisorlo = {.phys = ZEUS_ADDR(0x281814)}, - .uart1_data = {.phys = ZEUS_ADDR(0x281818)}, - .uart1_status = {.phys = ZEUS_ADDR(0x28181C)}, - - .int_stat_3 = {.phys = ZEUS_ADDR(0x282800)}, - .int_stat_2 = {.phys = ZEUS_ADDR(0x282804)}, - .int_stat_1 = {.phys = ZEUS_ADDR(0x282808)}, - .int_stat_0 = {.phys = ZEUS_ADDR(0x28280c)}, - .int_config = {.phys = ZEUS_ADDR(0x282810)}, - .int_int_scan = {.phys = ZEUS_ADDR(0x282818)}, - .ien_int_3 = {.phys = ZEUS_ADDR(0x282830)}, - .ien_int_2 = {.phys = ZEUS_ADDR(0x282834)}, - .ien_int_1 = {.phys = ZEUS_ADDR(0x282838)}, - .ien_int_0 = {.phys = ZEUS_ADDR(0x28283c)}, - .int_level_3_3 = {.phys = ZEUS_ADDR(0x282880)}, - .int_level_3_2 = {.phys = ZEUS_ADDR(0x282884)}, - .int_level_3_1 = {.phys = ZEUS_ADDR(0x282888)}, - .int_level_3_0 = {.phys = ZEUS_ADDR(0x28288c)}, - .int_level_2_3 = {.phys = ZEUS_ADDR(0x282890)}, - .int_level_2_2 = {.phys = ZEUS_ADDR(0x282894)}, - .int_level_2_1 = {.phys = ZEUS_ADDR(0x282898)}, - .int_level_2_0 = {.phys = ZEUS_ADDR(0x28289c)}, - .int_level_1_3 = {.phys = ZEUS_ADDR(0x2828a0)}, - .int_level_1_2 = {.phys = ZEUS_ADDR(0x2828a4)}, - .int_level_1_1 = {.phys = ZEUS_ADDR(0x2828a8)}, - .int_level_1_0 = {.phys = ZEUS_ADDR(0x2828ac)}, - .int_level_0_3 = {.phys = ZEUS_ADDR(0x2828b0)}, - .int_level_0_2 = {.phys = ZEUS_ADDR(0x2828b4)}, - .int_level_0_1 = {.phys = ZEUS_ADDR(0x2828b8)}, - .int_level_0_0 = {.phys = ZEUS_ADDR(0x2828bc)}, - .int_docsis_en = {.phys = ZEUS_ADDR(0x2828F4)}, - - .mips_pll_setup = {.phys = ZEUS_ADDR(0x1a0000)}, - .fs432x4b4_usb_ctl = {.phys = ZEUS_ADDR(0x1a0018)}, - .test_bus = {.phys = ZEUS_ADDR(0x1a0238)}, - .crt_spare = {.phys = ZEUS_ADDR(0x1a0090)}, - .usb2_ohci_int_mask = {.phys = ZEUS_ADDR(0x1e000c)}, - .usb2_strap = {.phys = ZEUS_ADDR(0x1e0014)}, - .ehci_hcapbase = {.phys = ZEUS_ADDR(0x1FFE00)}, - .ohci_hc_revision = {.phys = ZEUS_ADDR(0x1FFC00)}, - .bcm1_bs_lmi_steer = {.phys = ZEUS_ADDR(0x2C0008)}, - .usb2_control = {.phys = ZEUS_ADDR(0x2c01a0)}, - .usb2_stbus_obc = {.phys = ZEUS_ADDR(0x1FFF00)}, - .usb2_stbus_mess_size = {.phys = ZEUS_ADDR(0x1FFF04)}, - .usb2_stbus_chunk_size = {.phys = ZEUS_ADDR(0x1FFF08)}, - - .pcie_regs = {.phys = ZEUS_ADDR(0x200000)}, - .tim_ch = {.phys = ZEUS_ADDR(0x282C10)}, - .tim_cl = {.phys = ZEUS_ADDR(0x282C14)}, - .gpio_dout = {.phys = ZEUS_ADDR(0x282c20)}, - .gpio_din = {.phys = ZEUS_ADDR(0x282c24)}, - .gpio_dir = {.phys = ZEUS_ADDR(0x282c2C)}, - .watchdog = {.phys = ZEUS_ADDR(0x282c30)}, - .front_panel = {.phys = ZEUS_ADDR(0x283800)}, -}; diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c deleted file mode 100644 index 8380605d597..00000000000 --- a/arch/mips/powertv/asic/asic_devices.c +++ /dev/null @@ -1,549 +0,0 @@ -/* - * - * Description: Defines the platform resources for Gaia-based settops. - * - * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * NOTE: The bootloader allocates persistent memory at an address which is - * 16 MiB below the end of the highest address in KSEG0. All fixed - * address memory reservations must avoid this region. - */ - -#include <linux/device.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/resource.h> -#include <linux/serial_reg.h> -#include <linux/io.h> -#include <linux/bootmem.h> -#include <linux/mm.h> -#include <linux/platform_device.h> -#include <linux/module.h> -#include <asm/page.h> -#include <linux/swap.h> -#include <linux/highmem.h> -#include <linux/dma-mapping.h> - -#include <asm/mach-powertv/asic.h> -#include <asm/mach-powertv/asic_regs.h> -#include <asm/mach-powertv/interrupts.h> - -#ifdef CONFIG_BOOTLOADER_DRIVER -#include <asm/mach-powertv/kbldr.h> -#endif -#include <asm/bootinfo.h> - -#define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0)) - -/* - * Forward Prototypes - */ -static void pmem_setup_resource(void); - -/* - * Global Variables - */ -enum asic_type asic; - -unsigned int platform_features; -unsigned int platform_family; -struct register_map _asic_register_map; -EXPORT_SYMBOL(_asic_register_map); /* Exported for testing */ -unsigned long asic_phy_base; -unsigned long asic_base; -EXPORT_SYMBOL(asic_base); /* Exported for testing */ -struct resource *gp_resources; - -/* - * Don't recommend to use it directly, it is usually used by kernel internally. - * Portable code should be using interfaces such as ioremp, dma_map_single, etc. - */ -unsigned long phys_to_dma_offset; -EXPORT_SYMBOL(phys_to_dma_offset); - -/* - * - * IO Resource Definition - * - */ - -struct resource asic_resource = { - .name = "ASIC Resource", - .start = 0, - .end = ASIC_IO_SIZE, - .flags = IORESOURCE_MEM, -}; - -/* - * Allow override of bootloader-specified model - * Returns zero on success, a negative errno value on failure. This parameter - * allows overriding of the bootloader-specified model. - */ -static char __initdata cmdline[COMMAND_LINE_SIZE]; - -#define FORCEFAMILY_PARAM "forcefamily" - -/* - * check_forcefamily - check for, and parse, forcefamily command line parameter - * @forced_family: Pointer to two-character array in which to store the - * value of the forcedfamily parameter, if any. - */ -static __init int check_forcefamily(unsigned char forced_family[2]) -{ - const char *p; - - forced_family[0] = '\0'; - forced_family[1] = '\0'; - - /* Check the command line for a forcefamily directive */ - strncpy(cmdline, arcs_cmdline, COMMAND_LINE_SIZE - 1); - p = strstr(cmdline, FORCEFAMILY_PARAM); - if (p && (p != cmdline) && (*(p - 1) != ' ')) - p = strstr(p, " " FORCEFAMILY_PARAM "="); - - if (p) { - p += strlen(FORCEFAMILY_PARAM "="); - - if (*p == '\0' || *(p + 1) == '\0' || - (*(p + 2) != '\0' && *(p + 2) != ' ')) - pr_err(FORCEFAMILY_PARAM " must be exactly two " - "characters long, ignoring value\n"); - - else { - forced_family[0] = *p; - forced_family[1] = *(p + 1); - } - } - - return 0; -} - -/* - * platform_set_family - determine major platform family type. - * - * Returns family type; -1 if none - * Returns the family type; -1 if none - * - */ -static __init noinline void platform_set_family(void) -{ - unsigned char forced_family[2]; - unsigned short bootldr_family; - - if (check_forcefamily(forced_family) == 0) - bootldr_family = BOOTLDRFAMILY(forced_family[0], - forced_family[1]); - else - bootldr_family = (unsigned short) BOOTLDRFAMILY( - CONFIG_BOOTLOADER_FAMILY[0], - CONFIG_BOOTLOADER_FAMILY[1]); - - pr_info("Bootloader Family = 0x%04X\n", bootldr_family); - - switch (bootldr_family) { - case BOOTLDRFAMILY('R', '1'): - platform_family = FAMILY_1500; - break; - case BOOTLDRFAMILY('4', '4'): - platform_family = FAMILY_4500; - break; - case BOOTLDRFAMILY('4', '6'): - platform_family = FAMILY_4600; - break; - case BOOTLDRFAMILY('A', '1'): - platform_family = FAMILY_4600VZA; - break; - case BOOTLDRFAMILY('8', '5'): - platform_family = FAMILY_8500; - break; - case BOOTLDRFAMILY('R', '2'): - platform_family = FAMILY_8500RNG; - break; - case BOOTLDRFAMILY('8', '6'): - platform_family = FAMILY_8600; - break; - case BOOTLDRFAMILY('B', '1'): - platform_family = FAMILY_8600VZB; - break; - case BOOTLDRFAMILY('E', '1'): - platform_family = FAMILY_1500VZE; - break; - case BOOTLDRFAMILY('F', '1'): - platform_family = FAMILY_1500VZF; - break; - case BOOTLDRFAMILY('8', '7'): - platform_family = FAMILY_8700; - break; - default: - platform_family = -1; - } -} - -unsigned int platform_get_family(void) -{ - return platform_family; -} -EXPORT_SYMBOL(platform_get_family); - -/* - * platform_get_asic - determine the ASIC type. - * - * Returns the ASIC type, or ASIC_UNKNOWN if unknown - * - */ -enum asic_type platform_get_asic(void) -{ - return asic; -} -EXPORT_SYMBOL(platform_get_asic); - -/* - * set_register_map - set ASIC register configuration - * @phys_base: Physical address of the base of the ASIC registers - * @map: Description of key ASIC registers - */ -static void __init set_register_map(unsigned long phys_base, - const struct register_map *map) -{ - asic_phy_base = phys_base; - _asic_register_map = *map; - register_map_virtualize(&_asic_register_map); - asic_base = (unsigned long)ioremap_nocache(phys_base, ASIC_IO_SIZE); -} - -/** - * configure_platform - configuration based on platform type. - */ -void __init configure_platform(void) -{ - platform_set_family(); - - switch (platform_family) { - case FAMILY_1500: - case FAMILY_1500VZE: - case FAMILY_1500VZF: - platform_features = FFS_CAPABLE; - asic = ASIC_CALLIOPE; - set_register_map(CALLIOPE_IO_BASE, &calliope_register_map); - - if (platform_family == FAMILY_1500VZE) { - gp_resources = non_dvr_vze_calliope_resources; - pr_info("Platform: 1500/Vz Class E - " - "CALLIOPE, NON_DVR_CAPABLE\n"); - } else if (platform_family == FAMILY_1500VZF) { - gp_resources = non_dvr_vzf_calliope_resources; - pr_info("Platform: 1500/Vz Class F - " - "CALLIOPE, NON_DVR_CAPABLE\n"); - } else { - gp_resources = non_dvr_calliope_resources; - pr_info("Platform: 1500/RNG100 - CALLIOPE, " - "NON_DVR_CAPABLE\n"); - } - break; - - case FAMILY_4500: - platform_features = FFS_CAPABLE | PCIE_CAPABLE | - DISPLAY_CAPABLE; - asic = ASIC_ZEUS; - set_register_map(ZEUS_IO_BASE, &zeus_register_map); - gp_resources = non_dvr_zeus_resources; - - pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n"); - break; - - case FAMILY_4600: |