diff options
Diffstat (limited to 'arch/mips/pci/pci-ip32.c')
| -rw-r--r-- | arch/mips/pci/pci-ip32.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c index 618ea7dbc47..b1e061f7fdc 100644 --- a/arch/mips/pci/pci-ip32.c +++ b/arch/mips/pci/pci-ip32.c @@ -18,9 +18,9 @@ /* * Handle errors from the bridge. This includes master and target aborts, - * various command and address errors, and the interrupt test. This gets - * registered on the bridge error irq. It's conceivable that some of these - * conditions warrant a panic. Anybody care to say which ones? + * various command and address errors, and the interrupt test. This gets + * registered on the bridge error irq. It's conceivable that some of these + * conditions warrant a panic. Anybody care to say which ones? */ static irqreturn_t macepci_error(int irq, void *dev) { @@ -119,6 +119,7 @@ static struct pci_controller mace_pci_controller = { .iommu = 0, .mem_offset = MACE_PCI_MEM_OFFSET, .io_offset = 0, + .io_map_base = CKSEG1ADDR(MACEPCI_LOW_IO), }; static int __init mace_init(void) @@ -135,7 +136,8 @@ static int __init mace_init(void) BUG_ON(request_irq(MACE_PCI_BRIDGE_IRQ, macepci_error, 0, "MACE PCI error", NULL)); - iomem_resource = mace_pci_mem_resource; + /* extend memory resources */ + iomem_resource.end = mace_pci_mem_resource.end; ioport_resource = mace_pci_io_resource; register_pci_controller(&mace_pci_controller); |