diff options
Diffstat (limited to 'arch/mips/include/asm')
36 files changed, 137 insertions, 132 deletions
diff --git a/arch/mips/include/asm/compat-signal.h b/arch/mips/include/asm/compat-signal.h index 368a99e5c3e..6599a901b63 100644 --- a/arch/mips/include/asm/compat-signal.h +++ b/arch/mips/include/asm/compat-signal.h @@ -10,68 +10,6 @@ #include <asm/uaccess.h> -#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) - -typedef struct compat_siginfo { - int si_signo; - int si_code; - int si_errno; - - union { - int _pad[SI_PAD_SIZE32]; - - /* kill() */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - } _kill; - - /* SIGCHLD */ - struct { - compat_pid_t _pid; /* which child */ - compat_uid_t _uid; /* sender's uid */ - int _status; /* exit code */ - compat_clock_t _utime; - compat_clock_t _stime; - } _sigchld; - - /* IRIX SIGCHLD */ - struct { - compat_pid_t _pid; /* which child */ - compat_clock_t _utime; - int _status; /* exit code */ - compat_clock_t _stime; - } _irix_sigchld; - - /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ - struct { - s32 _addr; /* faulting insn/memory ref. */ - } _sigfault; - - /* SIGPOLL, SIGXFSZ (To do ...) */ - struct { - int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ - int _fd; - } _sigpoll; - - /* POSIX.1b timers */ - struct { - timer_t _tid; /* timer id */ - int _overrun; /* overrun count */ - compat_sigval_t _sigval;/* same as below */ - int _sys_private; /* not to be passed to user */ - } _timer; - - /* POSIX.1b signals */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - compat_sigval_t _sigval; - } _rt; - - } _sifields; -} compat_siginfo_t; - static inline int __copy_conv_sigset_to_user(compat_sigset_t __user *d, const sigset_t *s) { diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h index b77df0366ee..58277e0e9cd 100644 --- a/arch/mips/include/asm/compat.h +++ b/arch/mips/include/asm/compat.h @@ -43,6 +43,7 @@ typedef s64 compat_s64; typedef u32 compat_uint_t; typedef u32 compat_ulong_t; typedef u64 compat_u64; +typedef u32 compat_uptr_t; struct compat_timespec { compat_time_t tv_sec; @@ -124,6 +125,73 @@ typedef u32 compat_old_sigset_t; /* at least 32 bits */ typedef u32 compat_sigset_word; +typedef union compat_sigval { + compat_int_t sival_int; + compat_uptr_t sival_ptr; +} compat_sigval_t; + +#define SI_PAD_SIZE32 (128/sizeof(int) - 3) + +typedef struct compat_siginfo { + int si_signo; + int si_code; + int si_errno; + + union { + int _pad[SI_PAD_SIZE32]; + + /* kill() */ + struct { + compat_pid_t _pid; /* sender's pid */ + __compat_uid_t _uid; /* sender's uid */ + } _kill; + + /* SIGCHLD */ + struct { + compat_pid_t _pid; /* which child */ + __compat_uid_t _uid; /* sender's uid */ + int _status; /* exit code */ + compat_clock_t _utime; + compat_clock_t _stime; + } _sigchld; + + /* IRIX SIGCHLD */ + struct { + compat_pid_t _pid; /* which child */ + compat_clock_t _utime; + int _status; /* exit code */ + compat_clock_t _stime; + } _irix_sigchld; + + /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ + struct { + s32 _addr; /* faulting insn/memory ref. */ + } _sigfault; + + /* SIGPOLL, SIGXFSZ (To do ...) */ + struct { + int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ + int _fd; + } _sigpoll; + + /* POSIX.1b timers */ + struct { + timer_t _tid; /* timer id */ + int _overrun; /* overrun count */ + compat_sigval_t _sigval;/* same as below */ + int _sys_private; /* not to be passed to user */ + } _timer; + + /* POSIX.1b signals */ + struct { + compat_pid_t _pid; /* sender's pid */ + __compat_uid_t _uid; /* sender's uid */ + compat_sigval_t _sigval; + } _rt; + + } _sifields; +} compat_siginfo_t; + #define COMPAT_OFF_T_MAX 0x7fffffff #define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL @@ -133,7 +201,6 @@ typedef u32 compat_sigset_word; * as pointers because the syscall entry code will have * appropriately converted them already. */ -typedef u32 compat_uptr_t; static inline void __user *compat_ptr(compat_uptr_t uptr) { diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h index 9203d90e610..03a54df5fb8 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h @@ -1,7 +1,7 @@ #ifndef BCM63XX_IO_H_ #define BCM63XX_IO_H_ -#include "bcm63xx_cpu.h" +#include <asm/mach-bcm63xx/bcm63xx_cpu.h> /* * Physical memory map, RAM is mapped at 0x0. diff --git a/arch/mips/include/asm/mach-pnx833x/gpio.h b/arch/mips/include/asm/mach-pnx833x/gpio.h index ed3a88da70f..f192acf4a8a 100644 --- a/arch/mips/include/asm/mach-pnx833x/gpio.h +++ b/arch/mips/include/asm/mach-pnx833x/gpio.h @@ -30,7 +30,7 @@ - including locking between different uses */ -#include "pnx833x.h" +#include <asm/mach-pnx833x/pnx833x.h> #define SET_REG_BIT(reg, bit) do { (reg |= (1 << (bit))); } while (0) #define CLEAR_REG_BIT(reg, bit) do { (reg &= ~(1 << (bit))); } while (0) diff --git a/arch/mips/include/asm/octeon/cvmx-asm.h b/arch/mips/include/asm/octeon/cvmx-asm.h index 5de5de95311..31eacc24b77 100644 --- a/arch/mips/include/asm/octeon/cvmx-asm.h +++ b/arch/mips/include/asm/octeon/cvmx-asm.h @@ -32,7 +32,7 @@ #ifndef __CVMX_ASM_H__ #define __CVMX_ASM_H__ -#include "octeon-model.h" +#include <asm/octeon/octeon-model.h> /* other useful stuff */ #define CVMX_SYNC asm volatile ("sync" : : : "memory") diff --git a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h index 614653b686a..fed91125317 100644 --- a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h +++ b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h @@ -76,7 +76,7 @@ #include <linux/prefetch.h> -#include "cvmx-fpa.h" +#include <asm/octeon/cvmx-fpa.h> /** * By default we disable the max depth support. Most programs * don't use it and it slows down the command queue processing diff --git a/arch/mips/include/asm/octeon/cvmx-fpa.h b/arch/mips/include/asm/octeon/cvmx-fpa.h index 1f04f965873..541a1ae02b6 100644 --- a/arch/mips/include/asm/octeon/cvmx-fpa.h +++ b/arch/mips/include/asm/octeon/cvmx-fpa.h @@ -36,8 +36,8 @@ #ifndef __CVMX_FPA_H__ #define __CVMX_FPA_H__ -#include "cvmx-address.h" -#include "cvmx-fpa-defs.h" +#include <asm/octeon/cvmx-address.h> +#include <asm/octeon/cvmx-fpa-defs.h> #define CVMX_FPA_NUM_POOLS 8 #define CVMX_FPA_MIN_BLOCK_SIZE 128 diff --git a/arch/mips/include/asm/octeon/cvmx-helper-board.h b/arch/mips/include/asm/octeon/cvmx-helper-board.h index 88527fa835c..442f508eaac 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper-board.h +++ b/arch/mips/include/asm/octeon/cvmx-helper-board.h @@ -34,7 +34,7 @@ #ifndef __CVMX_HELPER_BOARD_H__ #define __CVMX_HELPER_BOARD_H__ -#include "cvmx-helper.h" +#include <asm/octeon/cvmx-helper.h> typedef enum { set_phy_link_flags_autoneg = 0x1, diff --git a/arch/mips/include/asm/octeon/cvmx-helper.h b/arch/mips/include/asm/octeon/cvmx-helper.h index 0ac6b9f412b..691c8142cd4 100644 --- a/arch/mips/include/asm/octeon/cvmx-helper.h +++ b/arch/mips/include/asm/octeon/cvmx-helper.h @@ -34,9 +34,9 @@ #ifndef __CVMX_HELPER_H__ #define __CVMX_HELPER_H__ -#include "cvmx-config.h" -#include "cvmx-fpa.h" -#include "cvmx-wqe.h" +#include <asm/octeon/cvmx-config.h> +#include <asm/octeon/cvmx-fpa.h> +#include <asm/octeon/cvmx-wqe.h> typedef enum { CVMX_HELPER_INTERFACE_MODE_DISABLED, @@ -62,13 +62,13 @@ typedef union { } cvmx_helper_link_info_t; #include <asm/octeon/cvmx-helper-errata.h> -#include "cvmx-helper-loop.h" -#include "cvmx-helper-npi.h" -#include "cvmx-helper-rgmii.h" -#include "cvmx-helper-sgmii.h" -#include "cvmx-helper-spi.h" -#include "cvmx-helper-util.h" -#include "cvmx-helper-xaui.h" +#include <asm/octeon/cvmx-helper-loop.h> +#include <asm/octeon/cvmx-helper-npi.h> +#include <asm/octeon/cvmx-helper-rgmii.h> +#include <asm/octeon/cvmx-helper-sgmii.h> +#include <asm/octeon/cvmx-helper-spi.h> +#include <asm/octeon/cvmx-helper-util.h> +#include <asm/octeon/cvmx-helper-xaui.h> /** * cvmx_override_pko_queue_priority(int ipd_port, uint64_t diff --git a/arch/mips/include/asm/octeon/cvmx-mdio.h b/arch/mips/include/asm/octeon/cvmx-mdio.h index d88ab8d8e37..6f0cd182cec 100644 --- a/arch/mips/include/asm/octeon/cvmx-mdio.h +++ b/arch/mips/include/asm/octeon/cvmx-mdio.h @@ -35,7 +35,7 @@ #ifndef __CVMX_MIO_H__ #define __CVMX_MIO_H__ -#include "cvmx-smix-defs.h" +#include <asm/octeon/cvmx-smix-defs.h> /** * PHY register 0 from the 802.3 spec diff --git a/arch/mips/include/asm/octeon/cvmx-pip.h b/arch/mips/include/asm/octeon/cvmx-pip.h index 78dbce8f2c5..9e739a64085 100644 --- a/arch/mips/include/asm/octeon/cvmx-pip.h +++ b/arch/mips/include/asm/octeon/cvmx-pip.h @@ -33,9 +33,9 @@ #ifndef __CVMX_PIP_H__ #define __CVMX_PIP_H__ -#include "cvmx-wqe.h" -#include "cvmx-fpa.h" -#include "cvmx-pip-defs.h" +#include <asm/octeon/cvmx-wqe.h> +#include <asm/octeon/cvmx-fpa.h> +#include <asm/octeon/cvmx-pip-defs.h> #define CVMX_PIP_NUM_INPUT_PORTS 40 #define CVMX_PIP_NUM_WATCHERS 4 diff --git a/arch/mips/include/asm/octeon/cvmx-pko.h b/arch/mips/include/asm/octeon/cvmx-pko.h index de3412aada5..c6daeedf1f8 100644 --- a/arch/mips/include/asm/octeon/cvmx-pko.h +++ b/arch/mips/include/asm/octeon/cvmx-pko.h @@ -58,10 +58,10 @@ #ifndef __CVMX_PKO_H__ #define __CVMX_PKO_H__ -#include "cvmx-fpa.h" -#include "cvmx-pow.h" -#include "cvmx-cmd-queue.h" -#include "cvmx-pko-defs.h" +#include <asm/octeon/cvmx-fpa.h> +#include <asm/octeon/cvmx-pow.h> +#include <asm/octeon/cvmx-cmd-queue.h> +#include <asm/octeon/cvmx-pko-defs.h> /* Adjust the command buffer size by 1 word so that in the case of using only * two word PKO commands no command words stradle buffers. The useful values diff --git a/arch/mips/include/asm/octeon/cvmx-pow.h b/arch/mips/include/asm/octeon/cvmx-pow.h index 999aefe3274..92742b241a5 100644 --- a/arch/mips/include/asm/octeon/cvmx-pow.h +++ b/arch/mips/include/asm/octeon/cvmx-pow.h @@ -53,8 +53,8 @@ #include <asm/octeon/cvmx-pow-defs.h> -#include "cvmx-scratch.h" -#include "cvmx-wqe.h" +#include <asm/octeon/cvmx-scratch.h> +#include <asm/octeon/cvmx-wqe.h> /* Default to having all POW constancy checks turned on */ #ifndef CVMX_ENABLE_POW_CHECKS diff --git a/arch/mips/include/asm/octeon/cvmx-spi.h b/arch/mips/include/asm/octeon/cvmx-spi.h index e814648953a..3bf53b537bc 100644 --- a/arch/mips/include/asm/octeon/cvmx-spi.h +++ b/arch/mips/include/asm/octeon/cvmx-spi.h @@ -32,7 +32,7 @@ #ifndef __CVMX_SPI_H__ #define __CVMX_SPI_H__ -#include "cvmx-gmxx-defs.h" +#include <asm/octeon/cvmx-gmxx-defs.h> /* CSR typedefs have been moved to cvmx-csr-*.h */ diff --git a/arch/mips/include/asm/octeon/cvmx-spinlock.h b/arch/mips/include/asm/octeon/cvmx-spinlock.h index 2fbf0871df1..a672abb1bc4 100644 --- a/arch/mips/include/asm/octeon/cvmx-spinlock.h +++ b/arch/mips/include/asm/octeon/cvmx-spinlock.h @@ -35,7 +35,7 @@ #ifndef __CVMX_SPINLOCK_H__ #define __CVMX_SPINLOCK_H__ -#include "cvmx-asm.h" +#include <asm/octeon/cvmx-asm.h> /* Spinlocks for Octeon */ diff --git a/arch/mips/include/asm/octeon/cvmx-wqe.h b/arch/mips/include/asm/octeon/cvmx-wqe.h index 653610953d2..df762389e27 100644 --- a/arch/mips/include/asm/octeon/cvmx-wqe.h +++ b/arch/mips/include/asm/octeon/cvmx-wqe.h @@ -40,7 +40,7 @@ #ifndef __CVMX_WQE_H__ #define __CVMX_WQE_H__ -#include "cvmx-packet.h" +#include <asm/octeon/cvmx-packet.h> #define OCT_TAG_TYPE_STRING(x) \ diff --git a/arch/mips/include/asm/octeon/cvmx.h b/arch/mips/include/asm/octeon/cvmx.h index 740be97a325..db58beab6cb 100644 --- a/arch/mips/include/asm/octeon/cvmx.h +++ b/arch/mips/include/asm/octeon/cvmx.h @@ -52,24 +52,24 @@ enum cvmx_mips_space { #define CVMX_ADD_IO_SEG(add) CVMX_ADD_SEG(CVMX_IO_SEG, (add)) #endif -#include "cvmx-asm.h" -#include "cvmx-packet.h" -#include "cvmx-sysinfo.h" - -#include "cvmx-ciu-defs.h" -#include "cvmx-gpio-defs.h" -#include "cvmx-iob-defs.h" -#include "cvmx-ipd-defs.h" -#include "cvmx-l2c-defs.h" -#include "cvmx-l2d-defs.h" -#include "cvmx-l2t-defs.h" -#include "cvmx-led-defs.h" -#include "cvmx-mio-defs.h" -#include "cvmx-pow-defs.h" - -#include "cvmx-bootinfo.h" -#include "cvmx-bootmem.h" -#include "cvmx-l2c.h" +#include <asm/octeon/cvmx-asm.h> +#include <asm/octeon/cvmx-packet.h> +#include <asm/octeon/cvmx-sysinfo.h> + +#include <asm/octeon/cvmx-ciu-defs.h> +#include <asm/octeon/cvmx-gpio-defs.h> +#include <asm/octeon/cvmx-iob-defs.h> +#include <asm/octeon/cvmx-ipd-defs.h> +#include <asm/octeon/cvmx-l2c-defs.h> +#include <asm/octeon/cvmx-l2d-defs.h> +#include <asm/octeon/cvmx-l2t-defs.h> +#include <asm/octeon/cvmx-led-defs.h> +#include <asm/octeon/cvmx-mio-defs.h> +#include <asm/octeon/cvmx-pow-defs.h> + +#include <asm/octeon/cvmx-bootinfo.h> +#include <asm/octeon/cvmx-bootmem.h> +#include <asm/octeon/cvmx-l2c.h> #ifndef CVMX_ENABLE_DEBUG_PRINTS #define CVMX_ENABLE_DEBUG_PRINTS 1 diff --git a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h index 4e338a4d942..23b895cb260 100644 --- a/arch/mips/include/asm/octeon/octeon-model.h +++ b/arch/mips/include/asm/octeon/octeon-model.h @@ -313,6 +313,6 @@ static inline int __octeon_is_model_runtime__(uint32_t model) const char *octeon_model_get_string(uint32_t chip_id); const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer); -#include "octeon-feature.h" +#include <asm/octeon/octeon-feature.h> #endif /* __OCTEON_MODEL_H__ */ diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index 1e2486e2357..c4a1b31966b 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h @@ -8,7 +8,7 @@ #ifndef __ASM_OCTEON_OCTEON_H #define __ASM_OCTEON_OCTEON_H -#include "cvmx.h" +#include <asm/octeon/cvmx.h> extern uint64_t octeon_bootmem_alloc_range_phys(uint64_t size, uint64_t alignment, diff --git a/arch/mips/include/asm/sibyte/bcm1480_int.h b/arch/mips/include/asm/sibyte/bcm1480_int.h index 6109557c14e..fffb224d229 100644 --- a/arch/mips/include/asm/sibyte/bcm1480_int.h +++ b/arch/mips/include/asm/sibyte/bcm1480_int.h @@ -34,7 +34,7 @@ #ifndef _BCM1480_INT_H #define _BCM1480_INT_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* * Interrupt Mapper Constants diff --git a/arch/mips/include/asm/sibyte/bcm1480_l2c.h b/arch/mips/include/asm/sibyte/bcm1480_l2c.h index fd75817f7ac..725d38cb9d1 100644 --- a/arch/mips/include/asm/sibyte/bcm1480_l2c.h +++ b/arch/mips/include/asm/sibyte/bcm1480_l2c.h @@ -33,7 +33,7 @@ #ifndef _BCM1480_L2C_H #define _BCM1480_L2C_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* * Format of level 2 cache management address (Table 55) diff --git a/arch/mips/include/asm/sibyte/bcm1480_mc.h b/arch/mips/include/asm/sibyte/bcm1480_mc.h index f26a41a82b5..4307a758e3b 100644 --- a/arch/mips/include/asm/sibyte/bcm1480_mc.h +++ b/arch/mips/include/asm/sibyte/bcm1480_mc.h @@ -33,7 +33,7 @@ #ifndef _BCM1480_MC_H #define _BCM1480_MC_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* * Memory Channel Configuration Register (Table 81) diff --git a/arch/mips/include/asm/sibyte/bcm1480_regs.h b/arch/mips/include/asm/sibyte/bcm1480_regs.h index b4077bb7261..84d168ddfeb 100644 --- a/arch/mips/include/asm/sibyte/bcm1480_regs.h +++ b/arch/mips/include/asm/sibyte/bcm1480_regs.h @@ -32,14 +32,14 @@ #ifndef _BCM1480_REGS_H #define _BCM1480_REGS_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* * Pull in the BCM1250's registers since a great deal of the 1480's * functions are the same as the BCM1250. ********************************************************************* */ -#include "sb1250_regs.h" +#include <asm/sibyte/sb1250_regs.h> /* ********************************************************************* diff --git a/arch/mips/include/asm/sibyte/bcm1480_scd.h b/arch/mips/include/asm/sibyte/bcm1480_scd.h index 25ef24cbb92..2af3706b964 100644 --- a/arch/mips/include/asm/sibyte/bcm1480_scd.h +++ b/arch/mips/include/asm/sibyte/bcm1480_scd.h @@ -32,13 +32,13 @@ #ifndef _BCM1480_SCD_H #define _BCM1480_SCD_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* * Pull in the BCM1250's SCD since lots of stuff is the same. ********************************************************************* */ -#include "sb1250_scd.h" +#include <asm/sibyte/sb1250_scd.h> /* ********************************************************************* * Some general notes: diff --git a/arch/mips/include/asm/sibyte/sb1250_dma.h b/arch/mips/include/asm/sibyte/sb1250_dma.h index bad56171d74..6c44dfb5287 100644 --- a/arch/mips/include/asm/sibyte/sb1250_dma.h +++ b/arch/mips/include/asm/sibyte/sb1250_dma.h @@ -36,7 +36,7 @@ #define _SB1250_DMA_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* * DMA Registers diff --git a/arch/mips/include/asm/sibyte/sb1250_genbus.h b/arch/mips/include/asm/sibyte/sb1250_genbus.h index 94e9c7c8e78..a96ded17bdc 100644 --- a/arch/mips/include/asm/sibyte/sb1250_genbus.h +++ b/arch/mips/include/asm/sibyte/sb1250_genbus.h @@ -34,7 +34,7 @@ #ifndef _SB1250_GENBUS_H #define _SB1250_GENBUS_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* * Generic Bus Region Configuration Registers (Table 11-4) diff --git a/arch/mips/include/asm/sibyte/sb1250_int.h b/arch/mips/include/asm/sibyte/sb1250_int.h index f2850b4bcfd..dbea73ddd2f 100644 --- a/arch/mips/include/asm/sibyte/sb1250_int.h +++ b/arch/mips/include/asm/sibyte/sb1250_int.h @@ -33,7 +33,7 @@ #ifndef _SB1250_INT_H #define _SB1250_INT_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* * Interrupt Mapper Constants diff --git a/arch/mips/include/asm/sibyte/sb1250_l2c.h b/arch/mips/include/asm/sibyte/sb1250_l2c.h index 6554dcf05cf..b61a7491607 100644 --- a/arch/mips/include/asm/sibyte/sb1250_l2c.h +++ b/arch/mips/include/asm/sibyte/sb1250_l2c.h @@ -33,7 +33,7 @@ #ifndef _SB1250_L2C_H #define _SB1250_L2C_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* * Level 2 Cache Tag register (Table 5-3) diff --git a/arch/mips/include/asm/sibyte/sb1250_ldt.h b/arch/mips/include/asm/sibyte/sb1250_ldt.h index 1e76cf13799..bf7f320d1a8 100644 --- a/arch/mips/include/asm/sibyte/sb1250_ldt.h +++ b/arch/mips/include/asm/sibyte/sb1250_ldt.h @@ -33,7 +33,7 @@ #ifndef _SB1250_LDT_H #define _SB1250_LDT_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> #define K_LDT_VENDOR_SIBYTE 0x166D #define K_LDT_DEVICE_SB1250 0x0002 diff --git a/arch/mips/include/asm/sibyte/sb1250_mac.h b/arch/mips/include/asm/sibyte/sb1250_mac.h index 77f78728423..cfc4d787088 100644 --- a/arch/mips/include/asm/sibyte/sb1250_mac.h +++ b/arch/mips/include/asm/sibyte/sb1250_mac.h @@ -33,7 +33,7 @@ #ifndef _SB1250_MAC_H #define _SB1250_MAC_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* * Ethernet MAC Registers diff --git a/arch/mips/include/asm/sibyte/sb1250_mc.h b/arch/mips/include/asm/sibyte/sb1250_mc.h index 1eb1b5a8873..15048dcaf22 100644 --- a/arch/mips/include/asm/sibyte/sb1250_mc.h +++ b/arch/mips/include/asm/sibyte/sb1250_mc.h @@ -33,7 +33,7 @@ #ifndef _SB1250_MC_H #define _SB1250_MC_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* * Memory Channel Config Register (table 6-14) diff --git a/arch/mips/include/asm/sibyte/sb1250_regs.h b/arch/mips/include/asm/sibyte/sb1250_regs.h index 8f53ec817a5..29b9f0b26b3 100644 --- a/arch/mips/include/asm/sibyte/sb1250_regs.h +++ b/arch/mips/include/asm/sibyte/sb1250_regs.h @@ -33,7 +33,7 @@ #ifndef _SB1250_REGS_H #define _SB1250_REGS_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* diff --git a/arch/mips/include/asm/sibyte/sb1250_scd.h b/arch/mips/include/asm/sibyte/sb1250_scd.h index e49c3e89b5e..615e165dbd2 100644 --- a/arch/mips/include/asm/sibyte/sb1250_scd.h +++ b/arch/mips/include/asm/sibyte/sb1250_scd.h @@ -32,7 +32,7 @@ #ifndef _SB1250_SCD_H #define _SB1250_SCD_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************* * System control/debug registers diff --git a/arch/mips/include/asm/sibyte/sb1250_smbus.h b/arch/mips/include/asm/sibyte/sb1250_smbus.h index 04769923cf1..128d6b75b81 100644 --- a/arch/mips/include/asm/sibyte/sb1250_smbus.h +++ b/arch/mips/include/asm/sibyte/sb1250_smbus.h @@ -34,7 +34,7 @@ #ifndef _SB1250_SMBUS_H #define _SB1250_SMBUS_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* * SMBus Clock Frequency Register (Table 14-2) diff --git a/arch/mips/include/asm/sibyte/sb1250_syncser.h b/arch/mips/include/asm/sibyte/sb1250_syncser.h index d4b8558e0bf..274e9179d32 100644 --- a/arch/mips/include/asm/sibyte/sb1250_syncser.h +++ b/arch/mips/include/asm/sibyte/sb1250_syncser.h @@ -33,7 +33,7 @@ #ifndef _SB1250_SYNCSER_H #define _SB1250_SYNCSER_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* * Serial Mode Configuration Register diff --git a/arch/mips/include/asm/sibyte/sb1250_uart.h b/arch/mips/include/asm/sibyte/sb1250_uart.h index d835bf28014..bb99ecac581 100644 --- a/arch/mips/include/asm/sibyte/sb1250_uart.h +++ b/arch/mips/include/asm/sibyte/sb1250_uart.h @@ -33,7 +33,7 @@ #ifndef _SB1250_UART_H #define _SB1250_UART_H -#include "sb1250_defs.h" +#include <asm/sibyte/sb1250_defs.h> /* ********************************************************************** * DUART Registers |