diff options
Diffstat (limited to 'arch/mips/cobalt')
| -rw-r--r-- | arch/mips/cobalt/Kconfig | 7 | ||||
| -rw-r--r-- | arch/mips/cobalt/Makefile | 4 | ||||
| -rw-r--r-- | arch/mips/cobalt/console.c | 39 | ||||
| -rw-r--r-- | arch/mips/cobalt/irq.c | 2 | ||||
| -rw-r--r-- | arch/mips/cobalt/mtd.c | 61 | ||||
| -rw-r--r-- | arch/mips/cobalt/pci.c | 47 | ||||
| -rw-r--r-- | arch/mips/cobalt/reset.c | 11 | ||||
| -rw-r--r-- | arch/mips/cobalt/setup.c | 97 |
8 files changed, 151 insertions, 117 deletions
diff --git a/arch/mips/cobalt/Kconfig b/arch/mips/cobalt/Kconfig deleted file mode 100644 index 7c42b088d16..00000000000 --- a/arch/mips/cobalt/Kconfig +++ /dev/null @@ -1,7 +0,0 @@ -config EARLY_PRINTK - bool "Early console support" - depends on MIPS_COBALT - help - Provide early console support by direct access to the - on board UART. The UART must have been previously - initialised by the boot loader. diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile index c35ee25e557..9565b2104dc 100644 --- a/arch/mips/cobalt/Makefile +++ b/arch/mips/cobalt/Makefile @@ -4,6 +4,6 @@ obj-y := irq.o reset.o setup.o buttons.o +obj-$(CONFIG_PCI) += pci.o obj-$(CONFIG_EARLY_PRINTK) += console.o - -EXTRA_AFLAGS := $(CFLAGS) +obj-$(CONFIG_MTD_PHYSMAP) += mtd.o diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c index 46c23b66bc1..0485d51f721 100644 --- a/arch/mips/cobalt/console.c +++ b/arch/mips/cobalt/console.c @@ -1,47 +1,16 @@ /* * (C) P. Horton 2006 */ - -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/console.h> #include <linux/serial_reg.h> + #include <asm/addrspace.h> -#include <asm/mach-cobalt/cobalt.h> -static void putchar(int c) -{ - if(c == '\n') - putchar('\r'); +#include <cobalt.h> +void prom_putchar(char c) +{ while(!(COBALT_UART[UART_LSR] & UART_LSR_THRE)) ; COBALT_UART[UART_TX] = c; } - -static void cons_write(struct console *c, const char *s, unsigned n) -{ - while(n-- && *s) - putchar(*s++); -} - -static struct console cons_info = -{ - .name = "uart", - .write = cons_write, - .flags = CON_PRINTBUFFER | CON_BOOT, - .index = -1, -}; - -void __init cobalt_early_console(void) -{ - register_console(&cons_info); - - printk("Cobalt: early console registered\n"); -} - -void __init disable_early_printk(void) -{ - unregister_console(&cons_info); -} diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c index fe93b846923..950ad1e8be4 100644 --- a/arch/mips/cobalt/irq.c +++ b/arch/mips/cobalt/irq.c @@ -17,7 +17,7 @@ #include <asm/irq_cpu.h> #include <asm/gt64120.h> -#include <asm/mach-cobalt/cobalt.h> +#include <cobalt.h> /* * We have two types of interrupts that we handle, ones that come in through diff --git a/arch/mips/cobalt/mtd.c b/arch/mips/cobalt/mtd.c new file mode 100644 index 00000000000..2b088ef3839 --- /dev/null +++ b/arch/mips/cobalt/mtd.c @@ -0,0 +1,61 @@ +/* + * Registration of Cobalt MTD device. + * + * Copyright (C) 2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> + +static struct mtd_partition cobalt_mtd_partitions[] = { + { + .name = "firmware", + .offset = 0x0, + .size = 0x80000, + }, +}; + +static struct physmap_flash_data cobalt_flash_data = { + .width = 1, + .nr_parts = 1, + .parts = cobalt_mtd_partitions, +}; + +static struct resource cobalt_mtd_resource = { + .start = 0x1fc00000, + .end = 0x1fc7ffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device cobalt_mtd = { + .name = "physmap-flash", + .dev = { + .platform_data = &cobalt_flash_data, + }, + .num_resources = 1, + .resource = &cobalt_mtd_resource, +}; + +static int __init cobalt_mtd_init(void) +{ + platform_device_register(&cobalt_mtd); + + return 0; +} + +module_init(cobalt_mtd_init); diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c new file mode 100644 index 00000000000..d91027f43de --- /dev/null +++ b/arch/mips/cobalt/pci.c @@ -0,0 +1,47 @@ +/* + * Register PCI controller. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org) + * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv) + * + */ +#include <linux/init.h> +#include <linux/pci.h> + +#include <asm/gt64120.h> + +extern struct pci_ops gt64xxx_pci0_ops; + +static struct resource cobalt_mem_resource = { + .start = GT_DEF_PCI0_MEM0_BASE, + .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1, + .name = "PCI memory", + .flags = IORESOURCE_MEM, +}; + +static struct resource cobalt_io_resource = { + .start = 0x1000, + .end = GT_DEF_PCI0_IO_SIZE - 1, + .name = "PCI I/O", + .flags = IORESOURCE_IO, +}; + +static struct pci_controller cobalt_pci_controller = { + .pci_ops = >64xxx_pci0_ops, + .mem_resource = &cobalt_mem_resource, + .io_resource = &cobalt_io_resource, + .io_offset = 0 - GT_DEF_PCI0_IO_BASE, +}; + +static int __init cobalt_pci_init(void) +{ + register_pci_controller(&cobalt_pci_controller); + + return 0; +} + +arch_initcall(cobalt_pci_init); diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c index 753dfccae6f..43cca21fdbc 100644 --- a/arch/mips/cobalt/reset.c +++ b/arch/mips/cobalt/reset.c @@ -8,15 +8,12 @@ * Copyright (C) 1995, 1996, 1997 by Ralf Baechle * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv) */ -#include <linux/sched.h> -#include <linux/mm.h> -#include <asm/cacheflush.h> +#include <linux/jiffies.h> + #include <asm/io.h> -#include <asm/processor.h> #include <asm/reboot.h> -#include <asm/system.h> -#include <asm/mipsregs.h> -#include <asm/mach-cobalt/cobalt.h> + +#include <cobalt.h> void cobalt_machine_halt(void) { diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index a4b69b543bd..d0dd81790f7 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c @@ -19,12 +19,10 @@ #include <asm/bootinfo.h> #include <asm/time.h> #include <asm/io.h> -#include <asm/irq.h> -#include <asm/processor.h> #include <asm/reboot.h> #include <asm/gt64120.h> -#include <asm/mach-cobalt/cobalt.h> +#include <cobalt.h> extern void cobalt_machine_restart(char *command); extern void cobalt_machine_halt(void); @@ -63,61 +61,38 @@ void __init plat_timer_setup(struct irqaction *irq) GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS)); } -extern struct pci_ops gt64111_pci_ops; - -static struct resource cobalt_mem_resource = { - .start = GT_DEF_PCI0_MEM0_BASE, - .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1, - .name = "PCI memory", - .flags = IORESOURCE_MEM -}; - -static struct resource cobalt_io_resource = { - .start = 0x1000, - .end = 0xffff, - .name = "PCI I/O", - .flags = IORESOURCE_IO -}; - -static struct resource cobalt_io_resources[] = { - { +/* + * Cobalt doesn't have PS/2 keyboard/mouse interfaces, + * keyboard conntroller is never used. + * Also PCI-ISA bridge DMA contoroller is never used. + */ +static struct resource cobalt_reserved_resources[] = { + { /* dma1 */ .start = 0x00, .end = 0x1f, - .name = "dma1", - .flags = IORESOURCE_BUSY - }, { - .start = 0x40, - .end = 0x5f, - .name = "timer", - .flags = IORESOURCE_BUSY - }, { + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, + }, + { /* keyboard */ .start = 0x60, .end = 0x6f, - .name = "keyboard", - .flags = IORESOURCE_BUSY - }, { + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, + }, + { /* dma page reg */ .start = 0x80, .end = 0x8f, - .name = "dma page reg", - .flags = IORESOURCE_BUSY - }, { + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, + }, + { /* dma2 */ .start = 0xc0, .end = 0xdf, - .name = "dma2", - .flags = IORESOURCE_BUSY + .name = "reserved", + .flags = IORESOURCE_BUSY | IORESOURCE_IO, }, }; -#define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource)) - -static struct pci_controller cobalt_pci_controller = { - .pci_ops = >64111_pci_ops, - .mem_resource = &cobalt_mem_resource, - .mem_offset = 0, - .io_resource = &cobalt_io_resource, - .io_offset = 0 - GT_DEF_PCI0_IO_BASE, -}; - void __init plat_mem_setup(void) { static struct uart_port uart; @@ -130,12 +105,12 @@ void __init plat_mem_setup(void) set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE)); - /* I/O port resource must include UART and LCD/buttons */ + /* I/O port resource must include LCD/buttons */ ioport_resource.end = 0x0fffffff; - /* request I/O space for devices used on all i[345]86 PCs */ - for (i = 0; i < COBALT_IO_RESOURCES; i++) - request_resource(&ioport_resource, cobalt_io_resources + i); + /* These resources have been reserved by VIA SuperI/O chip. */ + for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++) + request_resource(&ioport_resource, cobalt_reserved_resources + i); /* Read the cobalt id register out of the PCI config space */ PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3)); @@ -145,28 +120,20 @@ void __init plat_mem_setup(void) printk("Cobalt board ID: %d\n", cobalt_board_id); -#ifdef CONFIG_PCI - register_pci_controller(&cobalt_pci_controller); -#endif - -#ifdef CONFIG_SERIAL_8250 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) { - -#ifdef CONFIG_EARLY_PRINTK - cobalt_early_console(); -#endif - +#ifdef CONFIG_SERIAL_8250 uart.line = 0; uart.type = PORT_UNKNOWN; uart.uartclk = 18432000; uart.irq = COBALT_SERIAL_IRQ; - uart.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; - uart.iobase = 0xc800000; - uart.iotype = UPIO_PORT; + uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | + UPF_SKIP_TEST; + uart.iotype = UPIO_MEM; + uart.mapbase = 0x1c800000; early_serial_setup(&uart); - } #endif + } } /* |