diff options
Diffstat (limited to 'arch/m68knommu/platform')
| -rw-r--r-- | arch/m68knommu/platform/54xx/Makefile (renamed from arch/m68knommu/platform/548x/Makefile) | 0 | ||||
| -rw-r--r-- | arch/m68knommu/platform/54xx/config.c (renamed from arch/m68knommu/platform/548x/config.c) | 32 | ||||
| -rw-r--r-- | arch/m68knommu/platform/68328/ints.c | 4 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/Makefile | 4 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/cache.c | 48 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/entry.S | 56 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/head.S | 26 |
7 files changed, 99 insertions, 71 deletions
diff --git a/arch/m68knommu/platform/548x/Makefile b/arch/m68knommu/platform/54xx/Makefile index e6035e7a2d3..e6035e7a2d3 100644 --- a/arch/m68knommu/platform/548x/Makefile +++ b/arch/m68knommu/platform/54xx/Makefile diff --git a/arch/m68knommu/platform/548x/config.c b/arch/m68knommu/platform/54xx/config.c index 9888846bd1c..78130984db9 100644 --- a/arch/m68knommu/platform/548x/config.c +++ b/arch/m68knommu/platform/54xx/config.c @@ -1,7 +1,7 @@ /***************************************************************************/ /* - * linux/arch/m68knommu/platform/548x/config.c + * linux/arch/m68knommu/platform/54xx/config.c * * Copyright (C) 2010, Philippe De Muyter <phdm@macqel.be> */ @@ -15,13 +15,13 @@ #include <linux/io.h> #include <asm/machdep.h> #include <asm/coldfire.h> -#include <asm/m548xsim.h> +#include <asm/m54xxsim.h> #include <asm/mcfuart.h> -#include <asm/m548xgpt.h> +#include <asm/m54xxgpt.h> /***************************************************************************/ -static struct mcf_platform_uart m548x_uart_platform[] = { +static struct mcf_platform_uart m54xx_uart_platform[] = { { .mapbase = MCF_MBAR + MCFUART_BASE1, .irq = 64 + 35, @@ -40,20 +40,20 @@ static struct mcf_platform_uart m548x_uart_platform[] = { }, }; -static struct platform_device m548x_uart = { +static struct platform_device m54xx_uart = { .name = "mcfuart", .id = 0, - .dev.platform_data = m548x_uart_platform, + .dev.platform_data = m54xx_uart_platform, }; -static struct platform_device *m548x_devices[] __initdata = { - &m548x_uart, +static struct platform_device *m54xx_devices[] __initdata = { + &m54xx_uart, }; /***************************************************************************/ -static void __init m548x_uart_init_line(int line, int irq) +static void __init m54xx_uart_init_line(int line, int irq) { int rts_cts; @@ -72,18 +72,18 @@ static void __init m548x_uart_init_line(int line, int irq) MCF_MBAR + MCF_PAR_PSC(line)); } -static void __init m548x_uarts_init(void) +static void __init m54xx_uarts_init(void) { - const int nrlines = ARRAY_SIZE(m548x_uart_platform); + const int nrlines = ARRAY_SIZE(m54xx_uart_platform); int line; for (line = 0; (line < nrlines); line++) - m548x_uart_init_line(line, m548x_uart_platform[line].irq); + m54xx_uart_init_line(line, m54xx_uart_platform[line].irq); } /***************************************************************************/ -static void mcf548x_reset(void) +static void mcf54xx_reset(void) { /* disable interrupts and enable the watchdog */ asm("movew #0x2700, %sr\n"); @@ -97,8 +97,8 @@ static void mcf548x_reset(void) void __init config_BSP(char *commandp, int size) { - mach_reset = mcf548x_reset; - m548x_uarts_init(); + mach_reset = mcf54xx_reset; + m54xx_uarts_init(); } /***************************************************************************/ @@ -106,7 +106,7 @@ void __init config_BSP(char *commandp, int size) static int __init init_BSP(void) { - platform_add_devices(m548x_devices, ARRAY_SIZE(m548x_devices)); + platform_add_devices(m54xx_devices, ARRAY_SIZE(m54xx_devices)); return 0; } diff --git a/arch/m68knommu/platform/68328/ints.c b/arch/m68knommu/platform/68328/ints.c index 865852806a1..2a3af193ccd 100644 --- a/arch/m68knommu/platform/68328/ints.c +++ b/arch/m68knommu/platform/68328/ints.c @@ -179,8 +179,8 @@ void __init init_IRQ(void) IMR = ~0; for (i = 0; (i < NR_IRQS); i++) { - set_irq_chip(irq, &intc_irq_chip); - set_irq_handler(irq, handle_level_irq); + set_irq_chip(i, &intc_irq_chip); + set_irq_handler(i, handle_level_irq); } } diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile index 45f501fa452..a8967baabd7 100644 --- a/arch/m68knommu/platform/coldfire/Makefile +++ b/arch/m68knommu/platform/coldfire/Makefile @@ -14,7 +14,7 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 -obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o +obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o obj-$(CONFIG_M5206) += timers.o intc.o obj-$(CONFIG_M5206e) += timers.o intc.o obj-$(CONFIG_M520x) += pit.o intc-simr.o @@ -26,7 +26,7 @@ obj-$(CONFIG_M528x) += pit.o intc-2.o obj-$(CONFIG_M5307) += timers.o intc.o obj-$(CONFIG_M532x) += timers.o intc-simr.o obj-$(CONFIG_M5407) += timers.o intc.o -obj-$(CONFIG_M548x) += sltimers.o intc-2.o +obj-$(CONFIG_M54xx) += sltimers.o intc-2.o obj-y += pinmux.o gpio.o extra-y := head.o diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c new file mode 100644 index 00000000000..235d3c4f4f0 --- /dev/null +++ b/arch/m68knommu/platform/coldfire/cache.c @@ -0,0 +1,48 @@ +/***************************************************************************/ + +/* + * cache.c -- general ColdFire Cache maintainence code + * + * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com) + */ + +/***************************************************************************/ + +#include <linux/kernel.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> + +/***************************************************************************/ +#ifdef CACHE_PUSH +/***************************************************************************/ + +/* + * Use cpushl to push all dirty cache lines back to memory. + * Older versions of GAS don't seem to know how to generate the + * ColdFire cpushl instruction... Oh well, bit stuff it for now. + */ + +void mcf_cache_push(void) +{ + __asm__ __volatile__ ( + "clrl %%d0\n\t" + "1:\n\t" + "movel %%d0,%%a0\n\t" + "2:\n\t" + ".word 0xf468\n\t" + "addl %0,%%a0\n\t" + "cmpl %1,%%a0\n\t" + "blt 2b\n\t" + "addql #1,%%d0\n\t" + "cmpil %2,%%d0\n\t" + "bne 1b\n\t" + : /* No output */ + : "i" (CACHE_LINE_SIZE), + "i" (DCACHE_SIZE / CACHE_WAYS), + "i" (CACHE_WAYS) + : "d0", "a0" ); +} + +/***************************************************************************/ +#endif /* CACHE_PUSH */ +/***************************************************************************/ diff --git a/arch/m68knommu/platform/coldfire/entry.S b/arch/m68knommu/platform/coldfire/entry.S index e1debc8285e..4ddfc3da70d 100644 --- a/arch/m68knommu/platform/coldfire/entry.S +++ b/arch/m68knommu/platform/coldfire/entry.S @@ -36,13 +36,16 @@ #include <asm/asm-offsets.h> #include <asm/entry.h> +#ifdef CONFIG_COLDFIRE_SW_A7 +/* + * Define software copies of the supervisor and user stack pointers. + */ .bss - sw_ksp: .long 0 - sw_usp: .long 0 +#endif /* CONFIG_COLDFIRE_SW_A7 */ .text @@ -51,7 +54,6 @@ sw_usp: .globl ret_from_exception .globl ret_from_signal .globl sys_call_table -.globl ret_from_interrupt .globl inthandler .globl fasthandler @@ -140,20 +142,7 @@ Luser_return: jne Lwork_to_do /* still work to do */ Lreturn: - move #0x2700,%sr /* disable intrs */ - movel sw_usp,%a0 /* get usp */ - movel %sp@(PT_OFF_PC),%a0@- /* copy exception program counter */ - movel %sp@(PT_OFF_FORMATVEC),%a0@- /* copy exception format/vector/sr */ - moveml %sp@,%d1-%d5/%a0-%a2 - lea %sp@(32),%sp /* space for 8 regs */ - movel %sp@+,%d0 - addql #4,%sp /* orig d0 */ - addl %sp@+,%sp /* stk adj */ - addql #8,%sp /* remove exception */ - movel %sp,sw_ksp /* save ksp */ - subql #8,sw_usp /* set exception */ - movel sw_usp,%sp /* restore usp */ - rte + RESTORE_USER Lwork_to_do: movel %a0@(TI_FLAGS),%d1 /* get thread_info->flags */ @@ -191,31 +180,7 @@ ENTRY(inthandler) jbsr do_IRQ /* call high level irq handler */ lea %sp@(8),%sp /* pop args off stack */ - bra ret_from_interrupt /* this was fallthrough */ - -/* - * This is the fast interrupt handler (for certain hardware interrupt - * sources). Unlike the normal interrupt handler it just uses the - * current stack (doesn't care if it is user or kernel). It also - * doesn't bother doing the bottom half handlers. - */ -ENTRY(fasthandler) - SAVE_LOCAL - - movew %sp@(PT_OFF_FORMATVEC),%d0 - andl #0x03fc,%d0 /* mask out vector only */ - - movel %sp,%sp@- /* push regs arg */ - lsrl #2,%d0 /* calculate real vector # */ - movel %d0,%sp@- /* push vector number */ - jbsr do_IRQ /* call high level irq handler */ - lea %sp@(8),%sp /* pop args off stack */ - - RESTORE_LOCAL - -ENTRY(ret_from_interrupt) - /* the fasthandler is confusing me, haven't seen any user */ - jmp ret_from_exception + bra ret_from_exception /* * Beware - when entering resume, prev (the current task) is @@ -226,9 +191,8 @@ ENTRY(ret_from_interrupt) */ ENTRY(resume) movel %a0, %d1 /* get prev thread in d1 */ - - movel sw_usp,%d0 /* save usp */ - movel %d0,%a0@(TASK_THREAD+THREAD_USP) + RDUSP + movel %a2,%a0@(TASK_THREAD+THREAD_USP) SAVE_SWITCH_STACK movel %sp,%a0@(TASK_THREAD+THREAD_KSP) /* save kernel stack pointer */ @@ -236,5 +200,5 @@ ENTRY(resume) RESTORE_SWITCH_STACK movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */ - movel %a0, sw_usp + WRUSP rts diff --git a/arch/m68knommu/platform/coldfire/head.S b/arch/m68knommu/platform/coldfire/head.S index 0b2d7c7adf7..d5977909ae5 100644 --- a/arch/m68knommu/platform/coldfire/head.S +++ b/arch/m68knommu/platform/coldfire/head.S @@ -3,7 +3,7 @@ /* * head.S -- common startup code for ColdFire CPUs. * - * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>. + * (C) Copyright 1999-2010, Greg Ungerer <gerg@snapgear.com>. */ /*****************************************************************************/ @@ -13,7 +13,6 @@ #include <linux/init.h> #include <asm/asm-offsets.h> #include <asm/coldfire.h> -#include <asm/mcfcache.h> #include <asm/mcfsim.h> #include <asm/thread_info.h> @@ -173,10 +172,27 @@ _start: /* * Now that we know what the memory is, lets enable cache - * and get things moving. This is Coldfire CPU specific. + * and get things moving. This is Coldfire CPU specific. Not + * all version cores have identical cache register setup. But + * it is very similar. Define the exact settings in the headers + * then the code here is the same for all. */ - CACHE_ENABLE /* enable CPU cache */ - + movel #CACHE_INIT,%d0 /* invalidate whole cache */ + movec %d0,%CACR + nop + movel #ACR0_MODE,%d0 /* set RAM region for caching */ + movec %d0,%ACR0 + movel #ACR1_MODE,%d0 /* anything else to cache? */ + movec %d0,%ACR1 +#ifdef ACR2_MODE + movel #ACR2_MODE,%d0 + movec %d0,%ACR2 + movel #ACR3_MODE,%d0 + movec %d0,%ACR3 +#endif + movel #CACHE_MODE,%d0 /* enable cache */ + movec %d0,%CACR + nop #ifdef CONFIG_ROMFS_FS /* |