diff options
Diffstat (limited to 'arch/m68k/platform/coldfire/m528x.c')
| -rw-r--r-- | arch/m68k/platform/coldfire/m528x.c | 44 |
1 files changed, 35 insertions, 9 deletions
diff --git a/arch/m68k/platform/coldfire/m528x.c b/arch/m68k/platform/coldfire/m528x.c index f1319e5d254..21cd161d36f 100644 --- a/arch/m68k/platform/coldfire/m528x.c +++ b/arch/m68k/platform/coldfire/m528x.c @@ -21,18 +21,46 @@ #include <asm/coldfire.h> #include <asm/mcfsim.h> #include <asm/mcfuart.h> +#include <asm/mcfclk.h> /***************************************************************************/ -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) +DEFINE_CLK(pll, "pll.0", MCF_CLK); +DEFINE_CLK(sys, "sys.0", MCF_BUSCLK); +DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK); +DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK); +DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK); +DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK); +DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); +DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); +DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK); +DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); +DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK); + +struct clk *mcf_clks[] = { + &clk_pll, + &clk_sys, + &clk_mcfpit0, + &clk_mcfpit1, + &clk_mcfpit2, + &clk_mcfpit3, + &clk_mcfuart0, + &clk_mcfuart1, + &clk_mcfuart2, + &clk_mcfqspi0, + &clk_fec0, + NULL +}; + +/***************************************************************************/ static void __init m528x_qspi_init(void) { +#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) /* setup Port QS for QSPI with gpio CS control */ __raw_writeb(0x07, MCFGPIO_PQSPAR); -} - #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ +} /***************************************************************************/ @@ -41,7 +69,7 @@ static void __init m528x_uarts_init(void) u8 port; /* make sure PUAPAR is set for UART0 and UART1 */ - port = readb(MCF5282_GPIO_PUAPAR); + port = readb(MCFGPIO_PUAPAR); port |= 0x03 | (0x03 << 2); writeb(port, MCFGPIO_PUAPAR); } @@ -53,9 +81,9 @@ static void __init m528x_fec_init(void) u16 v16; /* Set multi-function pins to ethernet mode for fec0 */ - v16 = readw(MCF_IPSBAR + 0x100056); - writew(v16 | 0xf00, MCF_IPSBAR + 0x100056); - writeb(0xc0, MCF_IPSBAR + 0x100058); + v16 = readw(MCFGPIO_PASPAR); + writew(v16 | 0xf00, MCFGPIO_PASPAR); + writeb(0xc0, MCFGPIO_PEHLPAR); } /***************************************************************************/ @@ -98,9 +126,7 @@ void __init config_BSP(char *commandp, int size) mach_sched_init = hw_timer_init; m528x_uarts_init(); m528x_fec_init(); -#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) m528x_qspi_init(); -#endif } /***************************************************************************/ |