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-rw-r--r--arch/h8300/platform/h8s/generic/Makefile6
-rw-r--r--arch/h8300/platform/h8s/generic/crt0_ram.S128
-rw-r--r--arch/h8300/platform/h8s/generic/crt0_rom.S129
-rw-r--r--arch/h8300/platform/h8s/generic/timer.c54
4 files changed, 317 insertions, 0 deletions
diff --git a/arch/h8300/platform/h8s/generic/Makefile b/arch/h8300/platform/h8s/generic/Makefile
new file mode 100644
index 00000000000..055d53a9811
--- /dev/null
+++ b/arch/h8300/platform/h8s/generic/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the linux kernel.
+#
+
+extra-y = crt0_$(MODEL).o
+obj-y := timer.o
diff --git a/arch/h8300/platform/h8s/generic/crt0_ram.S b/arch/h8300/platform/h8s/generic/crt0_ram.S
new file mode 100644
index 00000000000..86f45017846
--- /dev/null
+++ b/arch/h8300/platform/h8s/generic/crt0_ram.S
@@ -0,0 +1,128 @@
+/*
+ * linux/arch/h8300/platform/h8s/edosk2674/crt0_ram.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend startup
+ * Target Archtecture: generic
+ * Memory Layout : RAM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+
+#if !defined(CONFIG_BLKDEV_RESERVE)
+#if defined(CONFIG_GDB_DEBUG)
+#define RAMEND (__ramend - 0xc000)
+#else
+#define RAMEND __ramend
+#endif
+#else
+#define RAMEND CONFIG_BLKDEV_RESERVE_ADDRESS
+#endif
+
+ .global SYMBOL_NAME(_start)
+ .global SYMBOL_NAME(_command_line)
+ .global SYMBOL_NAME(_platform_gpio_table)
+ .global SYMBOL_NAME(_target_name)
+
+ .h8300s
+
+ .section .text
+ .file "crt0_ram.S"
+
+ /* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+ mov.l #RAMEND,sp
+ ldc #0x80,ccr
+ ldc #0x00,exr
+
+ /* Peripheral Setup */
+ bclr #4,@INTCR:8 /* interrupt mode 2 */
+ bset #5,@INTCR:8
+
+#if defined(CONFIG_MTD_UCLINUX)
+ /* move romfs image */
+ jsr @__move_romfs
+#endif
+
+ /* .bss clear */
+ mov.l #__sbss,er5
+ mov.l er5,er6
+ mov.l #__ebss,er4
+ sub.l er5,er4
+ shlr #2,er4
+ sub.l er0,er0
+1:
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
+
+ /* copy kernel commandline */
+ mov.l #COMMAND_START,er5
+ mov.l #SYMBOL_NAME(command_line),er6
+ mov.w #512,r4
+ eepmov.w
+
+ /* uClinux kernel start */
+ ldc #0x90,ccr /* running kernel */
+ mov.l #SYMBOL_NAME(init_thread_union),sp
+ add.l #0x2000,sp
+ jsr @_start_kernel
+_exit:
+
+ jmp _exit
+
+ rts
+
+ /* I/O port assign information */
+__platform_gpio_table:
+ mov.l #gpio_table,er0
+ rts
+
+gpio_table:
+ ;; P1DDR
+ ;; used,ddr
+ .byte 0x00,0x00
+ ;; P2DDR
+ .byte 0x00,0x00
+ ;; P3DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; P5DDR
+ .byte 0x00,0x00
+ ;; P6DDR
+ .byte 0x00,0x00
+ ;; P7DDR
+ .byte 0x00,0x00
+ ;; P8DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; PADDR
+ .byte 0x00,0x00
+ ;; PBDDR
+ .byte 0x00,0x00
+ ;; PCDDR
+ .byte 0x00,0x00
+ ;; PDDDR
+ .byte 0x00,0x00
+ ;; PEDDR
+ .byte 0x00,0x00
+ ;; PFDDR
+ .byte 0x00,0x00
+ ;; PGDDR
+ .byte 0x00,0x00
+ ;; PHDDR
+ .byte 0x00,0x00
+
+__target_name:
+ .asciz "generic"
+
+ .section .bootvec,"ax"
+ jmp @SYMBOL_NAME(_start)
diff --git a/arch/h8300/platform/h8s/generic/crt0_rom.S b/arch/h8300/platform/h8s/generic/crt0_rom.S
new file mode 100644
index 00000000000..e18e4120228
--- /dev/null
+++ b/arch/h8300/platform/h8s/generic/crt0_rom.S
@@ -0,0 +1,129 @@
+/*
+ * linux/arch/h8300/platform/h8s/generic/crt0_rom.S
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend startup
+ * Target Archtecture: generic
+ * Memory Layout : ROM
+ */
+
+#define ASSEMBLY
+
+#include <linux/config.h>
+#include <asm/linkage.h>
+#include <asm/regs267x.h>
+
+ .global SYMBOL_NAME(_start)
+ .global SYMBOL_NAME(_command_line)
+ .global SYMBOL_NAME(_platform_gpio_table)
+ .global SYMBOL_NAME(_target_name)
+
+ .h8300s
+ .section .text
+ .file "crt0_rom.S"
+
+ /* CPU Reset entry */
+SYMBOL_NAME_LABEL(_start)
+ mov.l #__ramend,sp
+ ldc #0x80,ccr
+ ldc #0,exr
+ bclr #4,@INTCR:8
+ bset #5,@INTCR:8 /* Interrupt mode 2 */
+
+ /* Peripheral Setup */
+
+ /* copy .data */
+#if !defined(CONFIG_H8S_SIM)
+ mov.l #__begin_data,er5
+ mov.l #__sdata,er6
+ mov.l #__edata,er4
+ sub.l er6,er4
+ shlr.l #2,er4
+1:
+ mov.l @er5+,er0
+ mov.l er0,@er6
+ adds #4,er6
+ dec.l #1,er4
+ bne 1b
+#endif
+
+ /* .bss clear */
+ mov.l #__sbss,er5
+ mov.l #__ebss,er4
+ sub.l er5,er4
+ shlr.l #2,er4
+ sub.l er0,er0
+1:
+ mov.l er0,@er5
+ adds #4,er5
+ dec.l #1,er4
+ bne 1b
+
+ /* linux kernel start */
+ ldc #0x90,ccr /* running kernel */
+ mov.l #SYMBOL_NAME(init_thread_union),sp
+ add.l #0x2000,sp
+ jsr @_start_kernel
+_exit:
+
+ jmp _exit
+
+ rts
+
+ /* I/O port assign information */
+__platform_gpio_table:
+ mov.l #gpio_table,er0
+ rts
+
+gpio_table:
+ ;; P1DDR
+ .byte 0x00,0x00
+ ;; P2DDR
+ .byte 0x00,0x00
+ ;; P3DDR
+ .byte 0x00,0x00
+ ;; P4DDR
+ .byte 0x00,0x00
+ ;; P5DDR
+ .byte 0x00,0x00
+ ;; P6DDR
+ .byte 0x00,0x00
+ ;; dummy
+ .byte 0x00,0x00
+ ;; P8DDR
+ .byte 0x00,0x00
+ ;; PADDR
+ .byte 0x00,0x00
+ ;; PBDDR
+ .byte 0x00,0x00
+ ;; PCDDR
+ .byte 0x00,0x00
+ ;; PDDDR
+ .byte 0x00,0x00
+ ;; PEDDR
+ .byte 0x00,0x00
+ ;; PFDDR
+ .byte 0x00,0x00
+ ;; PGDDR
+ .byte 0x00,0x00
+ ;; PHDDR
+ .byte 0x00,0x00
+
+ .section .rodata
+__target_name:
+ .asciz "generic"
+
+ .section .bss
+__command_line:
+ .space 512
+
+ /* interrupt vector */
+ .section .vectors,"ax"
+ .long __start
+ .long __start
+vector = 2
+ .rept 126-1
+ .long _interrupt_redirect_table+vector*4
+vector = vector + 1
+ .endr
diff --git a/arch/h8300/platform/h8s/generic/timer.c b/arch/h8300/platform/h8s/generic/timer.c
new file mode 100644
index 00000000000..633cd8e1c21
--- /dev/null
+++ b/arch/h8300/platform/h8s/generic/timer.c
@@ -0,0 +1,54 @@
+/*
+ * linux/arch/h8300/platform/h8s/generic/timer.c
+ *
+ * Yoshinori Sato <ysato@users.sourceforge.jp>
+ *
+ * Platform depend Timer Handler
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/mm.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/timex.h>
+
+#include <asm/segment.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/regs267x.h>
+
+#define CMFA 6
+
+#define CMIEA 0x40
+#define CCLR_CMA 0x08
+#define CLK_DIV8192 0x03
+
+#define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */
+
+void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *))
+{
+ /* 8bit timer module enabled */
+ ctrl_outb(ctrl_inb(MSTPCRL) & ~0x01, MSTPCRL);
+ /* setup 8bit timer ch1 */
+ ctrl_outb(H8300_TIMER_FREQ / HZ, _8TCORA1); /* set interval */
+ ctrl_outb(0x00, _8TCSR1); /* no output */
+ request_irq(76, timer_int, 0, "timer" ,0);
+ ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR1); /* start count */
+}
+
+void platform_timer_eoi(void)
+{
+ *(volatile unsigned char *)_8TCSR1 &= ~(1 << CMFA);
+}
+
+void platform_gettod(int *year, int *mon, int *day, int *hour,
+ int *min, int *sec)
+{
+ *year = *mon = *day = *hour = *min = *sec = 0;
+}
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-01-07 23:38:24 +0000