diff options
Diffstat (limited to 'arch/blackfin/include/asm/cacheflush.h')
| -rw-r--r-- | arch/blackfin/include/asm/cacheflush.h | 29 |
1 files changed, 24 insertions, 5 deletions
diff --git a/arch/blackfin/include/asm/cacheflush.h b/arch/blackfin/include/asm/cacheflush.h index af03a36c7a4..9a5b2c572eb 100644 --- a/arch/blackfin/include/asm/cacheflush.h +++ b/arch/blackfin/include/asm/cacheflush.h @@ -10,6 +10,10 @@ #define _BLACKFIN_CACHEFLUSH_H #include <asm/blackfin.h> /* for SSYNC() */ +#include <asm/sections.h> /* for _ramend */ +#ifdef CONFIG_SMP +#include <asm/smp.h> +#endif extern void blackfin_icache_flush_range(unsigned long start_address, unsigned long end_address); extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned long end_address); @@ -35,8 +39,13 @@ extern void blackfin_invalidate_entire_icache(void); static inline void flush_icache_range(unsigned start, unsigned end) { -#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK) - blackfin_dcache_flush_range(start, end); +#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) + if (end <= physical_mem_end) + blackfin_dcache_flush_range(start, end); +#endif +#if defined(CONFIG_BFIN_L2_WRITEBACK) + if (start >= L2_START && end <= L2_START + L2_LENGTH) + blackfin_dcache_flush_range(start, end); #endif /* Make sure all write buffers in the data side of the core @@ -48,9 +57,17 @@ static inline void flush_icache_range(unsigned start, unsigned end) * the pipeline. */ SSYNC(); -#if defined(CONFIG_BFIN_ICACHE) - blackfin_icache_flush_range(start, end); - flush_icache_range_others(start, end); +#if defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) + if (end <= physical_mem_end) { + blackfin_icache_flush_range(start, end); + flush_icache_range_others(start, end); + } +#endif +#if defined(CONFIG_BFIN_L2_ICACHEABLE) + if (start >= L2_START && end <= L2_START + L2_LENGTH) { + blackfin_icache_flush_range(start, end); + flush_icache_range_others(start, end); + } #endif } @@ -68,9 +85,11 @@ do { memcpy(dst, src, len); \ #endif #if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK) # define flush_dcache_range(start,end) blackfin_dcache_flush_range((start), (end)) +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 # define flush_dcache_page(page) blackfin_dflush_page(page_address(page)) #else # define flush_dcache_range(start,end) do { } while (0) +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 # define flush_dcache_page(page) do { } while (0) #endif |