diff options
Diffstat (limited to 'arch/arm')
77 files changed, 485 insertions, 1159 deletions
diff --git a/arch/arm/mach-exynos4/include/mach/clkdev.h b/arch/arm/mach-exynos4/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/mach-exynos4/include/mach/clkdev.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __MACH_CLKDEV_H__ -#define __MACH_CLKDEV_H__ - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do {} while (0) - -#endif diff --git a/arch/arm/mach-exynos4/setup-sdhci.c b/arch/arm/mach-exynos4/setup-sdhci.c index 1e83f8cf236..92937b41090 100644 --- a/arch/arm/mach-exynos4/setup-sdhci.c +++ b/arch/arm/mach-exynos4/setup-sdhci.c @@ -10,16 +10,7 @@ * published by the Free Software Foundation. */ -#include <linux/kernel.h> #include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <linux/mmc/card.h> -#include <linux/mmc/host.h> - -#include <plat/regs-sdhci.h> /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ @@ -29,41 +20,3 @@ char *exynos4_hsmmc_clksrcs[4] = { [2] = "sclk_mmc", /* mmc_bus */ [3] = NULL, }; - -void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, - struct mmc_ios *ios, struct mmc_card *card) -{ - u32 ctrl2, ctrl3; - - /* don't need to alter anything according to card-type */ - - ctrl2 = readl(r + S3C_SDHCI_CONTROL2); - - /* select base clock source to HCLK */ - - ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; - - /* - * clear async mode, enable conflict mask, rx feedback ctrl, SD - * clk hold and no use debounce count - */ - - ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | - S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | - S3C_SDHCI_CTRL2_ENFBCLKRX | - S3C_SDHCI_CTRL2_DFCNT_NONE | - S3C_SDHCI_CTRL2_ENCLKOUTHOLD); - - /* Tx and Rx feedback clock delay control */ - - if (ios->clock < 25 * 1000000) - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | - S3C_SDHCI_CTRL3_FCSEL2 | - S3C_SDHCI_CTRL3_FCSEL1 | - S3C_SDHCI_CTRL3_FCSEL0); - else - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); - - writel(ctrl2, r + S3C_SDHCI_CONTROL2); - writel(ctrl3, r + S3C_SDHCI_CONTROL3); -} diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 2a2fa062013..a9201eaeb0f 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -696,9 +696,9 @@ static void __init h1940_init(void) S3C2410_MISCCR_USBSUSPND0 | S3C2410_MISCCR_USBSUSPND1, 0x0); - tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) - | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) - | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); + tmp = (0x78 << S3C24XX_PLL_MDIV_SHIFT) + | (0x02 << S3C24XX_PLL_PDIV_SHIFT) + | (0x03 << S3C24XX_PLL_SDIV_SHIFT); writel(tmp, S3C2410_UPLLCON); gpio_request(S3C2410_GPC(0), "LCD power"); diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c index 196fb37f4b1..72b7c6274c7 100644 --- a/arch/arm/mach-s3c2416/clock.c +++ b/arch/arm/mach-s3c2416/clock.c @@ -21,7 +21,6 @@ #include <plat/cpu.h> #include <plat/cpu-freq.h> -#include <plat/pll6553x.h> #include <plat/pll.h> #include <asm/mach/map.h> diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c b/arch/arm/mach-s3c2416/setup-sdhci.c index ed34fad8f2c..cee53955eb0 100644 --- a/arch/arm/mach-s3c2416/setup-sdhci.c +++ b/arch/arm/mach-s3c2416/setup-sdhci.c @@ -12,17 +12,7 @@ * published by the Free Software Foundation. */ -#include <linux/kernel.h> #include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/io.h> - -#include <linux/mmc/card.h> -#include <linux/mmc/host.h> - -#include <plat/regs-sdhci.h> -#include <plat/sdhci.h> /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ @@ -32,30 +22,3 @@ char *s3c2416_hsmmc_clksrcs[4] = { [2] = "hsmmc-if", /* [3] = "48m", - note not successfully used yet */ }; - -void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev, - void __iomem *r, - struct mmc_ios *ios, - struct mmc_card *card) -{ - u32 ctrl2, ctrl3; - - ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2); - ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; - ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | - S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | - S3C_SDHCI_CTRL2_ENFBCLKRX | - S3C_SDHCI_CTRL2_DFCNT_NONE | - S3C_SDHCI_CTRL2_ENCLKOUTHOLD); - - if (ios->clock < 25 * 1000000) - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | - S3C_SDHCI_CTRL3_FCSEL2 | - S3C_SDHCI_CTRL3_FCSEL1 | - S3C_SDHCI_CTRL3_FCSEL0); - else - ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); - - __raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2); - __raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3); -} diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index 872e68361eb..39c238d7a3d 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c @@ -25,13 +25,13 @@ #include <mach/regs-sys.h> #include <mach/regs-clock.h> -#include <mach/pll.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/cpu-freq.h> #include <plat/clock.h> #include <plat/clock-clksrc.h> +#include <plat/pll.h> /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call * ext_xtal_mux for want of an actual name from the manual. @@ -735,7 +735,8 @@ void __init_or_cpufreq s3c6400_setup_clocks(void) /* For now assume the mux always selects the crystal */ clk_ext_xtal_mux.parent = xtal_clk; - epll = s3c6400_get_epll(xtal); + epll = s3c_get_pll6553x(xtal, __raw_readl(S3C_EPLL_CON0), + __raw_readl(S3C_EPLL_CON1)); mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON)); diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c index 6c498f9a18c..cefd7f6dd4f 100644 --- a/arch/arm/mach-s3c64xx/cpu.c +++ b/arch/arm/mach-s3c64xx/cpu.c @@ -33,8 +33,8 @@ #include <plat/devs.h> #include <plat/clock.h> -#include <mach/s3c6400.h> -#include <mach/s3c6410.h> +#include <plat/s3c6400.h> +#include <plat/s3c6410.h> /* table of supported CPUs */ diff --git a/arch/arm/mach-s3c64xx/include/mach/clkdev.h b/arch/arm/mach-s3c64xx/include/mach/clkdev.h deleted file mode 100644 index 7dffa83d23f..00000000000 --- a/arch/arm/mach-s3c64xx/include/mach/clkdev.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __MACH_CLKDEV_H__ -#define __MACH_CLKDEV_H__ - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do {} while (0) - -#endif diff --git a/arch/arm/mach-s3c64xx/include/mach/pll.h b/arch/arm/mach-s3c64xx/include/mach/pll.h deleted file mode 100644 index 5ef0bb698ee..00000000000 --- a/arch/arm/mach-s3c64xx/include/mach/pll.h +++ /dev/null @@ -1,45 +0,0 @@ -/* arch/arm/plat-s3c64xx/include/plat/pll.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C64XX PLL code - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1) -#define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1) -#define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1) -#define S3C6400_PLL_MDIV_SHIFT (16) -#define S3C6400_PLL_PDIV_SHIFT (8) -#define S3C6400_PLL_SDIV_SHIFT (0) - -#include <asm/div64.h> -#include <plat/pll6553x.h> - -static inline unsigned long s3c6400_get_pll(unsigned long baseclk, - u32 pllcon) -{ - u32 mdiv, pdiv, sdiv; - u64 fvco = baseclk; - - mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK; - pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK; - sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK; - - fvco *= mdiv; - do_div(fvco, (pdiv << sdiv)); - - return (unsigned long)fvco; -} - -static inline unsigned long s3c6400_get_epll(unsigned long baseclk) -{ - return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0), - __raw_readl(S3C_EPLL_CON1)); -} diff --git a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h deleted file mode 100644 index b25bedee0d5..00000000000 --- a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h +++ /dev/null @@ -1,56 +0,0 @@ -/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C64xx - pwm clock and timer support - */ - -/** - * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk - * @tcfg: The timer TCFG1 register bits shifted down to 0. - * - * Return true if the given configuration from TCFG1 is a TCLK instead - * any of the TDIV clocks. - */ -static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) -{ - return tcfg >= S3C64XX_TCFG1_MUX_TCLK; -} - -/** - * tcfg_to_divisor() - convert tcfg1 setting to a divisor - * @tcfg1: The tcfg1 setting, shifted down. - * - * Get the divisor value for the given tcfg1 setting. We assume the - * caller has already checked to see if this is not a TCLK source. - */ -static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) -{ - return 1 << tcfg1; -} - -/** - * pwm_tdiv_has_div1() - does the tdiv setting have a /1 - * - * Return true if we have a /1 in the tdiv setting. - */ -static inline unsigned int pwm_tdiv_has_div1(void) -{ - return 1; -} - -/** - * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. - * @div: The divisor to calculate the bit information for. - * - * Turn a divisor into the necessary bit field for TCFG1. - */ -static inline unsigned long pwm_tdiv_div_bits(unsigned int div) -{ - return ilog2(div); -} - -#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c64xx/mach-anw6410.c index cb8864327ac..d2a68d22eda 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c64xx/mach-anw6410.c @@ -45,7 +45,7 @@ #include <plat/fb.h> #include <plat/regs-fb-v4.h> -#include <mach/s3c6410.h> +#include <plat/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c index 30afaa537fc..fb3d9cd1815 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c64xx/mach-crag6410.c @@ -43,7 +43,6 @@ #include <mach/hardware.h> #include <mach/map.h> -#include <mach/s3c6410.h> #include <mach/regs-sys.h> #include <mach/regs-gpio.h> #include <mach/regs-modem.h> @@ -51,6 +50,7 @@ #include <mach/regs-gpio-memport.h> +#include <plat/s3c6410.h> #include <plat/regs-serial.h> #include <plat/regs-fb-v4.h> #include <plat/fb.h> diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c index b3d93cc8dde..61f4fde088e 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c64xx/mach-hmt.c @@ -37,7 +37,7 @@ #include <plat/fb.h> #include <plat/nand.h> -#include <mach/s3c6410.h> +#include <plat/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c index 8f34a3c1049..5abb6d44252 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c64xx/mach-mini6410.c @@ -32,8 +32,8 @@ #include <mach/regs-gpio.h> #include <mach/regs-modem.h> #include <mach/regs-srom.h> -#include <mach/s3c6410.h> +#include <plat/s3c6410.h> #include <plat/adc.h> #include <plat/cpu.h> #include <plat/devs.h> diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c64xx/mach-ncp.c index 01c6857c5b6..0f4316a2dc0 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c64xx/mach-ncp.c @@ -39,7 +39,7 @@ #include <plat/iic.h> #include <plat/fb.h> -#include <mach/s3c6410.h> +#include <plat/s3c6410.h> #include <plat/clock.h> #include <plat/devs.h> #include <plat/cpu.h> diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index 1f5abfae4ea..1073d8105ba 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c @@ -33,8 +33,8 @@ #include <mach/regs-gpio.h |