diff options
Diffstat (limited to 'arch/arm/plat-samsung/include/plat')
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/adc-core.h | 28 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/ata-core.h | 28 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/ata.h | 36 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/devs.h | 20 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/fb-core.h | 29 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/fb.h | 3 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/fimc-core.h | 44 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/keypad-core.h | 31 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/keypad.h | 13 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-ata.h | 56 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-fb-v4.h | 78 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-fb.h | 30 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-rtc.h | 3 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-serial.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/sdhci.h | 127 |
15 files changed, 389 insertions, 139 deletions
diff --git a/arch/arm/plat-samsung/include/plat/adc-core.h b/arch/arm/plat-samsung/include/plat/adc-core.h new file mode 100644 index 00000000000..a281568d585 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/adc-core.h @@ -0,0 +1,28 @@ +/* linux/arch/arm/plat-samsung/include/plat/adc-core.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com/ + * + * Samsung ADC Controller core functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_ADC_CORE_H +#define __ASM_PLAT_ADC_CORE_H __FILE__ + +/* These functions are only for use with the core support code, such as + * the cpu specific initialisation code + */ + +/* re-define device name depending on support. */ +static inline void s3c_adc_setname(char *name) +{ +#ifdef CONFIG_SAMSUNG_DEV_ADC + s3c_device_adc.name = name; +#endif +} + +#endif /* __ASM_PLAT_ADC_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/ata-core.h b/arch/arm/plat-samsung/include/plat/ata-core.h new file mode 100644 index 00000000000..f5a4ec7141b --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/ata-core.h @@ -0,0 +1,28 @@ +/* linux/arch/arm/plat-samsung/include/plat/ata-core.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung CF-ATA Controller core functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_ATA_CORE_H +#define __ASM_PLAT_ATA_CORE_H __FILE__ + +/* These functions are only for use with the core support code, such as + * the cpu specific initialisation code +*/ + +/* re-define device name depending on support. */ +static inline void s3c_cfcon_setname(char *name) +{ +#ifdef CONFIG_SAMSUNG_DEV_IDE + s3c_device_cfcon.name = name; +#endif +} + +#endif /* __ASM_PLAT_ATA_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/ata.h b/arch/arm/plat-samsung/include/plat/ata.h new file mode 100644 index 00000000000..2a3855a8372 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/ata.h @@ -0,0 +1,36 @@ +/* linux/arch/arm/plat-samsung/include/plat/ata.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung CF-ATA platform_device info + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_ATA_H +#define __ASM_PLAT_ATA_H __FILE__ + +/** + * struct s3c_ide_platdata - S3C IDE driver platform data. + * @setup_gpio: Setup the external GPIO pins to the right state for data + * transfer in true-ide mode. + */ +struct s3c_ide_platdata { + void (*setup_gpio)(void); +}; + +/* + * s3c_ide_set_platdata() - Setup the platform specifc data for IDE driver. + * @pdata: Platform data for IDE driver. + */ +extern void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata); + +/* architecture-specific IDE configuration */ +extern void s3c64xx_ide_setup_gpio(void); +extern void s5pc100_ide_setup_gpio(void); +extern void s5pv210_ide_setup_gpio(void); + +#endif /*__ASM_PLAT_ATA_H */ diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index e6144e4b911..85f6f23a510 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -54,6 +54,8 @@ extern struct platform_device s3c_device_hwmon; extern struct platform_device s3c_device_hsmmc0; extern struct platform_device s3c_device_hsmmc1; extern struct platform_device s3c_device_hsmmc2; +extern struct platform_device s3c_device_hsmmc3; +extern struct platform_device s3c_device_cfcon; extern struct platform_device s3c_device_spi0; extern struct platform_device s3c_device_spi1; @@ -100,6 +102,12 @@ extern struct platform_device s5pc100_device_iis0; extern struct platform_device s5pc100_device_iis1; extern struct platform_device s5pc100_device_iis2; +extern struct platform_device samsung_device_keypad; + +extern struct platform_device s5p_device_fimc0; +extern struct platform_device s5p_device_fimc1; +extern struct platform_device s5p_device_fimc2; + /* s3c2440 specific devices */ #ifdef CONFIG_CPU_S3C2440 @@ -108,3 +116,15 @@ extern struct platform_device s3c_device_camif; extern struct platform_device s3c_device_ac97; #endif + +/** + * s3c_set_platdata() - helper for setting platform data + * @pd: The default platform data for this device. + * @pdsize: The size of the platform data. + * @pdev: Pointer to the device to fill in. + * + * This helper replaces a number of calls that copy and then set the + * platform data of the device. + */ +extern void *s3c_set_platdata(void *pd, size_t pdsize, + struct platform_device *pdev); diff --git a/arch/arm/plat-samsung/include/plat/fb-core.h b/arch/arm/plat-samsung/include/plat/fb-core.h new file mode 100644 index 00000000000..bca383efcf6 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/fb-core.h @@ -0,0 +1,29 @@ +/* + * arch/arm/plat-samsung/include/plat/fb-core.h + * + * Copyright 2010 Samsung Electronics Co., Ltd. + * Pawel Osciak <p.osciak@samsung.com> + * + * Samsung framebuffer driver core functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_PLAT_FB_CORE_H +#define __ASM_PLAT_FB_CORE_H __FILE__ + +/* + * These functions are only for use with the core support code, such as + * the CPU-specific initialization code. + */ + +/* Re-define device name depending on support. */ +static inline void s3c_fb_setname(char *name) +{ +#ifdef CONFIG_S3C_DEV_FB + s3c_device_fb.name = name; +#endif +} + +#endif /* __ASM_PLAT_FB_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 27d3b497b55..cb3ca3adc68 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h @@ -42,6 +42,7 @@ struct s3c_fb_pd_win { * @setup_gpio: Setup the external GPIO pins to the right state to transfer * the data from the display system to the connected display * device. + * @default_win: default window layer number to be used for UI layer. * @vidcon0: The base vidcon0 values to control the panel data format. * @vidcon1: The base vidcon1 values to control the panel data output. * @win: The setup data for each hardware window, or NULL for unused. @@ -58,6 +59,8 @@ struct s3c_fb_platdata { struct s3c_fb_pd_win *win[S3C_FB_MAX_WIN]; + u32 default_win; + u32 vidcon0; u32 vidcon1; }; diff --git a/arch/arm/plat-samsung/include/plat/fimc-core.h b/arch/arm/plat-samsung/include/plat/fimc-core.h new file mode 100644 index 00000000000..81a3bfeecca --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/fimc-core.h @@ -0,0 +1,44 @@ +/* + * arch/arm/plat-samsung/include/plat/fimc-core.h + * + * Copyright 2010 Samsung Electronics Co., Ltd. + * Sylwester Nawrocki <s.nawrocki@samsung.com> + * + * Samsung camera interface driver core functions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_PLAT_FIMC_CORE_H +#define __ASM_PLAT_FIMC_CORE_H __FILE__ + +/* + * These functions are only for use with the core support code, such as + * the CPU-specific initialization code. + */ + +/* Re-define device name to differentiate the subsystem in various SoCs. */ +static inline void s3c_fimc_setname(int id, char *name) +{ + switch (id) { +#ifdef CONFIG_S5P_DEV_FIMC0 + case 0: + s5p_device_fimc0.name = name; + break; +#endif +#ifdef CONFIG_S5P_DEV_FIMC1 + case 1: + s5p_device_fimc1.name = name; + break; +#endif +#ifdef CONFIG_S5P_DEV_FIMC2 + case 2: + s5p_device_fimc2.name = name; + break; +#endif + } +} + +#endif /* __ASM_PLAT_FIMC_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/keypad-core.h b/arch/arm/plat-samsung/include/plat/keypad-core.h new file mode 100644 index 00000000000..d513e1b3a31 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/keypad-core.h @@ -0,0 +1,31 @@ +/* + * linux/arch/arm/plat-samsung/include/plat/keypad-core.h + * + * Copyright (C) 2010 Samsung Electronics Co.Ltd + * Author: Joonyoung Shim <jy0922.shim@samsung.com> + * + * Samsung keypad controller core function + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifndef __ASM_ARCH_KEYPAD_CORE_H +#define __ASM_ARCH_KEYPAD_CORE_H + +/* These function are only for use with the core support code, such as + * the cpu specific initialisation code + */ + +/* re-define device name depending on support. */ +static inline void samsung_keypad_setname(char *name) +{ +#ifdef CONFIG_SAMSUNG_DEV_KEYPAD + samsung_device_keypad.name = name; +#endif +} + +#endif /* __ASM_ARCH_KEYPAD_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/keypad.h b/arch/arm/plat-samsung/include/plat/keypad.h index 3a70c125fe5..b59a6483cd8 100644 --- a/arch/arm/plat-samsung/include/plat/keypad.h +++ b/arch/arm/plat-samsung/include/plat/keypad.h @@ -40,4 +40,17 @@ struct samsung_keypad_platdata { void (*cfg_gpio)(unsigned int rows, unsigned int cols); }; +/** + * samsung_keypad_set_platdata - Set platform data for Samsung Keypad device. + * @pd: Platform data to register to device. + * + * Register the given platform data for use with Samsung Keypad device. + * The call will copy the platform data, so the board definitions can + * make the structure itself __initdata. + */ +extern void samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd); + +/* defined by architecture to configure gpio. */ +extern void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols); + #endif /* __PLAT_SAMSUNG_KEYPAD_H */ diff --git a/arch/arm/plat-samsung/include/plat/regs-ata.h b/arch/arm/plat-samsung/include/plat/regs-ata.h new file mode 100644 index 00000000000..f5df92fdae2 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/regs-ata.h @@ -0,0 +1,56 @@ +/* linux/arch/arm/plat-samsung/include/plat/regs-ata.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung CF-ATA register definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_REGS_ATA_H +#define __ASM_PLAT_REGS_ATA_H __FILE__ + +#define S3C_CFATA_REG(x) (x) + +#define S3C_CFATA_MUX S3C_CFATA_REG(0x0) + +#define S3C_ATA_CTRL S3C_CFATA_REG(0x0) +#define S3C_ATA_STATUS S3C_CFATA_REG(0x4) +#define S3C_ATA_CMD S3C_CFATA_REG(0x8) +#define S3C_ATA_SWRST S3C_CFATA_REG(0xc) +#define S3C_ATA_IRQ S3C_CFATA_REG(0x10) +#define S3C_ATA_IRQ_MSK S3C_CFATA_REG(0x14) +#define S3C_ATA_CFG S3C_CFATA_REG(0x18) + +#define S3C_ATA_MDMA_TIME S3C_CFATA_REG(0x28) +#define S3C_ATA_PIO_TIME S3C_CFATA_REG(0x2c) +#define S3C_ATA_UDMA_TIME S3C_CFATA_REG(0x30) +#define S3C_ATA_XFR_NUM S3C_CFATA_REG(0x34) +#define S3C_ATA_XFR_CNT S3C_CFATA_REG(0x38) +#define S3C_ATA_TBUF_START S3C_CFATA_REG(0x3c) +#define S3C_ATA_TBUF_SIZE S3C_CFATA_REG(0x40) +#define S3C_ATA_SBUF_START S3C_CFATA_REG(0x44) +#define S3C_ATA_SBUF_SIZE S3C_CFATA_REG(0x48) +#define S3C_ATA_CADR_TBUF S3C_CFATA_REG(0x4c) +#define S3C_ATA_CADR_SBUF S3C_CFATA_REG(0x50) +#define S3C_ATA_PIO_DTR S3C_CFATA_REG(0x54) +#define S3C_ATA_PIO_FED S3C_CFATA_REG(0x58) +#define S3C_ATA_PIO_SCR S3C_CFATA_REG(0x5c) +#define S3C_ATA_PIO_LLR S3C_CFATA_REG(0x60) +#define S3C_ATA_PIO_LMR S3C_CFATA_REG(0x64) +#define S3C_ATA_PIO_LHR S3C_CFATA_REG(0x68) +#define S3C_ATA_PIO_DVR S3C_CFATA_REG(0x6c) +#define S3C_ATA_PIO_CSD S3C_CFATA_REG(0x70) +#define S3C_ATA_PIO_DAD S3C_CFATA_REG(0x74) +#define S3C_ATA_PIO_READY S3C_CFATA_REG(0x78) +#define S3C_ATA_PIO_RDATA S3C_CFATA_REG(0x7c) + +#define S3C_CFATA_MUX_TRUEIDE 0x01 + +#define S3C_ATA_CFG_SWAP 0x40 +#define S3C_ATA_CFG_IORDYEN 0x02 + +#endif /* __ASM_PLAT_REGS_ATA_H */ diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h index 0f43599248a..4c3647f8005 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h @@ -40,16 +40,10 @@ /* OSD1 and OSD4 do not have register D */ -#define VIDOSD_A(_win) (0x40 + ((_win) * 16)) -#define VIDOSD_B(_win) (0x44 + ((_win) * 16)) -#define VIDOSD_C(_win) (0x48 + ((_win) * 16)) -#define VIDOSD_D(_win) (0x4C + ((_win) * 16)) - +#define VIDOSD_BASE (0x40) #define VIDINTCON0 (0x130) -#define WxKEYCONy(_win, _con) ((0x140 + ((_win) * 8)) + ((_con) * 4)) - /* WINCONx */ #define WINCONx_CSCWIDTH_MASK (0x3 << 26) @@ -143,76 +137,6 @@ #define WPALCON_W2PAL_16BPP_A555 (1 << 6) -/* system specific implementation code for palette sizes, and other - * information that changes depending on which architecture is being - * compiled. -*/ - -/* return true if window _win has OSD register D */ -#define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0) - -static inline unsigned int s3c_fb_win_pal_size(unsigned int win) -{ - if (win < 2) - return 256; - if (win < 4) - return 16; - if (win == 4) - return 4; - - BUG(); /* shouldn't get here */ -} - -static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp) -{ - /* all windows can do 1/2 bpp */ - - if ((bpp == 25 || bpp == 19) && win == 0) - return 0; /* win 0 does not have 19 or 25bpp modes */ - - if (bpp == 4 && win == 4) - return 0; - - if (bpp == 8 && (win >= 3)) - return 0; /* win 3/4 cannot do 8bpp in any mode */ - - return 1; -} - -static inline int s3c_fb_pal_is16(unsigned int window) -{ - return window > 1; -} - -struct s3c_fb_palette { - struct fb_bitfield r; - struct fb_bitfield g; - struct fb_bitfield b; - struct fb_bitfield a; -}; - -static inline void s3c_fb_init_palette(unsigned int window, - struct s3c_fb_palette *palette) -{ - if (window < 2) { - /* Windows 0/1 are 8/8/8 or A/8/8/8 */ - palette->r.offset = 16; - palette->r.length = 8; - palette->g.offset = 8; - palette->g.length = 8; - palette->b.offset = 0; - palette->b.length = 8; - } else { - /* currently we assume RGB 5/6/5 */ - palette->r.offset = 11; - palette->r.length = 5; - palette->g.offset = 5; - palette->g.length = 6; - palette->b.offset = 0; - palette->b.length = 5; - } -} - /* Notes on per-window bpp settings * * Value Win0 Win1 Win2 Win3 Win 4 diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index 0ef806e5034..8f39aa5b26e 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -112,6 +112,13 @@ #define VIDCON2_ORGYCbCr (1 << 8) #define VIDCON2_YUVORDCrCb (1 << 7) +/* PRTCON (S3C6410, S5PC100) + * Might not be present in the S3C6410 documentation, + * but tests prove it's there almost for sure; shouldn't hurt in any case. + */ +#define PRTCON (0x0c) +#define PRTCON_PROTECT (1 << 11) + /* VIDTCON0 */ #define VIDTCON0_VBPDE_MASK (0xff << 24) @@ -173,6 +180,7 @@ #define WINCONx_BITSWP (1 << 18) #define WINCONx_BYTSWP (1 << 17) #define WINCONx_HAWSWP (1 << 16) +#define WINCONx_WSWP (1 << 15) #define WINCONx_BURSTLEN_MASK (0x3 << 9) #define WINCONx_BURSTLEN_SHIFT (9) #define WINCONx_BURSTLEN_16WORD (0x0 << 9) @@ -212,6 +220,13 @@ #define WINCON1_BPPMODE_25BPP_A1888 (0xd << 2) #define WINCON1_BPPMODE_28BPP_A4888 (0xd << 2) +/* S5PV210 */ +#define SHADOWCON (0x34) +#define SHADOWCON_WINx_PROTECT(_win) (1 << (10 + (_win))) +/* DMA channels (all windows) */ +#define SHADOWCON_CHx_ENABLE(_win) (1 << (_win)) +/* Local input channels (windows 0-2) */ +#define SHADOWCON_CHx_LOCAL_ENABLE(_win) (1 << (5 + (_win))) #define VIDOSDxA_TOPLEFT_X_MASK (0x7ff << 11) #define VIDOSDxA_TOPLEFT_X_SHIFT (11) @@ -291,11 +306,12 @@ #define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15) #define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15) -#define VIDINTCON0_FRAMESEL1 (1 << 14) -#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 14) -#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 14) -#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 14) -#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 14) +#define VIDINTCON0_FRAMESEL1 (1 << 13) +#define VIDINTCON0_FRAMESEL1_MASK (0x3 << 13) +#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 13) +#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 13) +#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 13) +#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 13) #define VIDINTCON0_INT_FRAME (1 << 12) #define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5) @@ -321,6 +337,10 @@ #define VIDINTCON1_INT_FIFO (1 << 0) /* Window colour-key control registers */ +#define WKEYCON (0x140) /* 6410,V210 */ + +#define WKEYCON0 (0x00) +#define WKEYCON1 (0x04) #define WxKEYCON0_KEYBL_EN (1 << 26) #define WxKEYCON0_KEYEN_F (1 << 25) diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index 65c190d142d..30b7cc14cef 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h @@ -14,6 +14,9 @@ #define __ASM_ARCH_REGS_RTC_H __FILE__ #define S3C2410_RTCREG(x) (x) +#define S3C2410_INTP S3C2410_RTCREG(0x30) +#define S3C2410_INTP_ALM (1 << 1) +#define S3C2410_INTP_TIC (1 << 0) #define S3C2410_RTCCON S3C2410_RTCREG(0x40) #define S3C2410_RTCCON_RTCEN (1<<0) diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index a6eba8496b2..788837e99cb 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h @@ -259,6 +259,8 @@ struct s3c2410_uartcfg { unsigned short flags; upf_t uart_flags; /* default uart flags */ + unsigned int has_fracval; + unsigned long ucon; /* value of ucon for port */ unsigned long ulcon; /* value of ulcon for port */ unsigned long ufcon; /* value of ufcon for port */ diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index 016674fa20d..30844c263d0 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -20,10 +20,31 @@ struct mmc_host; struct mmc_card; struct mmc_ios; +enum cd_types { + S3C_SDHCI_CD_INTERNAL, /* use mmc internal CD line */ + S3C_SDHCI_CD_EXTERNAL, /* use external callback */ + S3C_SDHCI_CD_GPIO, /* use external gpio pin for CD line */ + S3C_SDHCI_CD_NONE, /* no CD line, use polling to detect card */ + S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */ +}; + /** * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI * @max_width: The maximum number of data bits supported. * @host_caps: Standard MMC host capabilities bit field. + * @cd_type: Type of Card Detection method (see cd_types enum above) + * @ext_cd_init: Initialize external card detect subsystem. Called on + * sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL. + * notify_func argument is a callback to the sdhci-s3c driver + * that triggers the card detection event. Callback arguments: + * dev is pointer to platform device of the host controller, + * state is new state of the card (0 - removed, 1 - inserted). + * @ext_cd_cleanup: Cleanup external card detect subsystem. Called on + * sdhci-s3c driver remove when cd_type == S3C_SDHCI_CD_EXTERNAL. + * notify_func argument is the same callback as for ext_cd_init. + * @ext_cd_gpio: gpio pin used for external CD line, valid only if + * cd_type == S3C_SDHCI_CD_GPIO + * @ext_cd_gpio_invert: invert values for external CD gpio line * @cfg_gpio: Configure the GPIO for a specific card bit-width * @cfg_card: Configure the interface for a specific card and speed. This * is necessary the controllers and/or GPIO blocks require the @@ -37,9 +58,17 @@ struct mmc_ios; struct s3c_sdhci_platdata { unsigned int max_width; unsigned int host_caps; + enum cd_types cd_type; char **clocks; /* set of clock sources */ + int ext_cd_gpio; + bool ext_cd_gpio_invert; + int (*ext_cd_init)(void (*notify_func)(struct platform_device *, + int state)); + int (*ext_cd_cleanup)(void (*notify_func)(struct platform_device *, + int state)); + void (*cfg_gpio)(struct platform_device *dev, int width); void (*cfg_card)(struct platform_device *dev, void __iomem *regbase, @@ -58,6 +87,7 @@ struct s3c_sdhci_platdata { extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); +extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd); /* Default platform data, exported so that per-cpu initialisation can * set the correct one when there are more than one cpu type selected. @@ -66,6 +96,7 @@ extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; +extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; /* Helper function availablity */ @@ -78,13 +109,13 @@ extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); +extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w); -/* S3C6400 SDHCI setup */ +/* S3C64XX SDHCI setup */ #ifdef CONFIG_S3C64XX_SETUP_SDHCI extern char *s3c64xx_hsmmc_clksrcs[4]; -#ifdef CONFIG_S3C_DEV_HSMMC extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, struct mmc_ios *ios, @@ -92,76 +123,62 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, static inline void s3c6400_default_sdhci0(void) { +#ifdef CONFIG_S3C_DEV_HSMMC s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; +#endif } -#else -static inline void s3c6400_default_sdhci0(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC */ - -#ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s3c6400_default_sdhci1(void) { +#ifdef CONFIG_S3C_DEV_HSMMC1 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; +#endif } -#else -static inline void s3c6400_default_sdhci1(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC1 */ -#ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s3c6400_default_sdhci2(void) { +#ifdef CONFIG_S3C_DEV_HSMMC2 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; +#endif } -#else -static inline void s3c6400_default_sdhci2(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC2 */ - -/* S3C6410 SDHCI setup */ extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r, struct mmc_ios *ios, struct mmc_card *card); -#ifdef CONFIG_S3C_DEV_HSMMC static inline void s3c6410_default_sdhci0(void) { +#ifdef CONFIG_S3C_DEV_HSMMC s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; +#endif } -#else -static inline void s3c6410_default_sdhci0(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC */ -#ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s3c6410_default_sdhci1(void) { +#ifdef CONFIG_S3C_DEV_HSMMC1 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; +#endif } -#else -static inline void s3c6410_default_sdhci1(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC1 */ -#ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s3c6410_default_sdhci2(void) { +#ifdef CONFIG_S3C_DEV_HSMMC2 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; +#endif } -#else -static inline void s3c6410_default_sdhci2(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC2 */ #else static inline void s3c6410_default_sdhci0(void) { } @@ -183,48 +200,42 @@ extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev, struct mmc_ios *ios, struct mmc_card *card); -#ifdef CONFIG_S3C_DEV_HSMMC static inline void s5pc100_default_sdhci0(void) { +#ifdef CONFIG_S3C_DEV_HSMMC s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; +#endif } -#else -static inline void s5pc100_default_sdhci0(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC */ -#ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s5pc100_default_sdhci1(void) { +#ifdef CONFIG_S3C_DEV_HSMMC1 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; +#endif } -#else -static inline void s5pc100_default_sdhci1(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC1 */ -#ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s5pc100_default_sdhci2(void) { +#ifdef CONFIG_S3C_DEV_HSMMC2 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; +#endif } -#else -static inline void s5pc100_default_sdhci2(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC1 */ - #else static inline void s5pc100_default_sdhci0(void) { } static inline void s5pc100_default_sdhci1(void) { } static inline void s5pc100_default_sdhci2(void) { } + #endif /* CONFIG_S5PC100_SETUP_SDHCI */ +/* S5PV210 SDHCI setup */ -/* S5PC110 SDHCI setup */ #ifdef CONFIG_S5PV210_SETUP_SDHCI extern char *s5pv210_hsmmc_clksrcs[4]; @@ -233,46 +244,48 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev, struct mmc_ios *ios, struct mmc_card *card); -#ifdef CONFIG_S3C_DEV_HSMMC static inline void s5pv210_default_sdhci0(void) { +#ifdef CONFIG_S3C_DEV_HSMMC s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; +#endif } -#else -static inline void s5pv210_default_sdhci0(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC */ -#ifdef CONFIG_S3C_DEV_HSMMC1 static inline void s5pv210_default_sdhci1(void) { +#ifdef CONFIG_S3C_DEV_HSMMC1 s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; +#endif } -#else -static inline void s5pv210_default_sdhci1(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC1 */ -#ifdef CONFIG_S3C_DEV_HSMMC2 static inline void s5pv210_default_sdhci2(void) { +#ifdef CONFIG_S3C_DEV_HSMMC2 s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; +#endif +} + +static inline void s5pv210_default_sdhci3(void) +{ +#ifdef CONFIG_S3C_DEV_HSMMC3 + s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; + s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; + s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; +#endif } -#else -static inline void s5pv210_default_sdhci2(void) { } -#endif /* CONFIG_S3C_DEV_HSMMC2 */ #else static inline void s5pv210_default_sdhci0(void) { } static inline void s5pv210_default_sdhci1(void) { } static inline void s5pv210_default_sdhci2(void) { } -#endif /* CONFIG_S5PC100_SETUP_SDHCI */ - - +static inline void s5pv210_default_sdhci3(void) { } +#endif /* CONFIG_S5PV210_SETUP_SDHCI */ #endif /* __PLAT_S3C_SDHCI_H */ |