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-rw-r--r--arch/arm/plat-orion/Makefile10
-rw-r--r--arch/arm/plat-orion/addr-map.c11
-rw-r--r--arch/arm/plat-orion/common.c16
-rw-r--r--arch/arm/plat-orion/gpio.c2
-rw-r--r--arch/arm/plat-orion/include/plat/addr-map.h4
-rw-r--r--arch/arm/plat-orion/include/plat/audio.h7
-rw-r--r--arch/arm/plat-orion/include/plat/common.h8
-rw-r--r--arch/arm/plat-orion/include/plat/ehci-orion.h26
-rw-r--r--arch/arm/plat-orion/include/plat/mpp.h2
-rw-r--r--arch/arm/plat-orion/include/plat/mv_xor.h24
-rw-r--r--arch/arm/plat-orion/include/plat/mvsdio.h20
-rw-r--r--arch/arm/plat-orion/include/plat/orion-gpio.h (renamed from arch/arm/plat-orion/include/plat/gpio.h)2
-rw-r--r--arch/arm/plat-orion/include/plat/orion_nand.h26
-rw-r--r--arch/arm/plat-orion/include/plat/time.h4
-rw-r--r--arch/arm/plat-orion/irq.c2
-rw-r--r--arch/arm/plat-orion/mpp.c7
-rw-r--r--arch/arm/plat-orion/time.c8
17 files changed, 37 insertions, 142 deletions
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile
index c20ce0f5ce3..a82cecb8494 100644
--- a/arch/arm/plat-orion/Makefile
+++ b/arch/arm/plat-orion/Makefile
@@ -1,10 +1,10 @@
#
# Makefile for the linux kernel.
#
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
-obj-y := irq.o pcie.o time.o common.o mpp.o addr-map.o
-obj-m :=
-obj-n :=
-obj- :=
+obj-y += addr-map.o
-obj-$(CONFIG_GENERIC_GPIO) += gpio.o
+orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o
+obj-$(CONFIG_PLAT_ORION_LEGACY) += irq.o pcie.o time.o common.o mpp.o
+obj-$(CONFIG_PLAT_ORION_LEGACY) += $(orion-gpio-y)
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c
index 367ca89ac40..a7b8060c293 100644
--- a/arch/arm/plat-orion/addr-map.c
+++ b/arch/arm/plat-orion/addr-map.c
@@ -48,7 +48,7 @@ EXPORT_SYMBOL_GPL(mv_mbus_dram_info);
static void __init __iomem *
orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win)
{
- return (void __iomem *)(cfg->bridge_virt_base + (win << 4));
+ return cfg->bridge_virt_base + (win << 4);
}
/*
@@ -143,19 +143,16 @@ void __init orion_config_wins(struct orion_addr_map_cfg * cfg,
* Setup MBUS dram target info.
*/
void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
- const u32 ddr_window_cpu_base)
+ const void __iomem *ddr_window_cpu_base)
{
- void __iomem *addr;
int i;
int cs;
orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
- addr = (void __iomem *)ddr_window_cpu_base;
-
for (i = 0, cs = 0; i < 4; i++) {
- u32 base = readl(addr + DDR_BASE_CS_OFF(i));
- u32 size = readl(addr + DDR_SIZE_CS_OFF(i));
+ u32 base = readl(ddr_window_cpu_base + DDR_BASE_CS_OFF(i));
+ u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i));
/*
* Chip select enabled?
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index b8b747a9d36..b8a688cad4c 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -19,8 +19,8 @@
#include <linux/mv643xx_eth.h>
#include <linux/mv643xx_i2c.h>
#include <net/dsa.h>
-#include <plat/mv_xor.h>
-#include <plat/ehci-orion.h>
+#include <linux/platform_data/dma-mv_xor.h>
+#include <linux/platform_data/usb-ehci-orion.h>
#include <mach/bridge-regs.h>
/* Create a clkdev entry for a given device/clk */
@@ -86,13 +86,13 @@ static void __init uart_complete(
struct platform_device *orion_uart,
struct plat_serial8250_port *data,
struct resource *resources,
- unsigned int membase,
+ void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk)
{
data->mapbase = mapbase;
- data->membase = (void __iomem *)membase;
+ data->membase = membase;
data->irq = irq;
data->uartclk = uart_get_clk_rate(clk);
orion_uart->dev.platform_data = data;
@@ -120,7 +120,7 @@ static struct platform_device orion_uart0 = {
.id = PLAT8250_DEV_PLATFORM,
};
-void __init orion_uart0_init(unsigned int membase,
+void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk)
@@ -148,7 +148,7 @@ static struct platform_device orion_uart1 = {
.id = PLAT8250_DEV_PLATFORM1,
};
-void __init orion_uart1_init(unsigned int membase,
+void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk)
@@ -176,7 +176,7 @@ static struct platform_device orion_uart2 = {
.id = PLAT8250_DEV_PLATFORM2,
};
-void __init orion_uart2_init(unsigned int membase,
+void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk)
@@ -204,7 +204,7 @@ static struct platform_device orion_uart3 = {
.id = 3,
};
-void __init orion_uart3_init(unsigned int membase,
+void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk)
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index dfda74fae6f..c29ee7ea200 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -23,7 +23,7 @@
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>
-#include <plat/gpio.h>
+#include <plat/orion-gpio.h>
/*
* GPIO unit register offsets.
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h
index fd556f77562..ec63e4a627d 100644
--- a/arch/arm/plat-orion/include/plat/addr-map.h
+++ b/arch/arm/plat-orion/include/plat/addr-map.h
@@ -16,7 +16,7 @@ extern struct mbus_dram_target_info orion_mbus_dram_info;
struct orion_addr_map_cfg {
const int num_wins; /* Total number of windows */
const int remappable_wins;
- const u32 bridge_virt_base;
+ void __iomem *bridge_virt_base;
/* If NULL, the default cpu_win_can_remap will be used, using
the value in remappable_wins */
@@ -49,5 +49,5 @@ void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
const u8 attr, const int remap);
void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
- const u32 ddr_window_cpu_base);
+ const void __iomem *ddr_window_cpu_base);
#endif
diff --git a/arch/arm/plat-orion/include/plat/audio.h b/arch/arm/plat-orion/include/plat/audio.h
deleted file mode 100644
index d6a55bd2e57..00000000000
--- a/arch/arm/plat-orion/include/plat/audio.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __PLAT_AUDIO_H
-#define __PLAT_AUDIO_H
-
-struct kirkwood_asoc_platform_data {
- int burst;
-};
-#endif
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h
index ae2377ef63e..6bbc3fe5f58 100644
--- a/arch/arm/plat-orion/include/plat/common.h
+++ b/arch/arm/plat-orion/include/plat/common.h
@@ -13,22 +13,22 @@
struct dsa_platform_data;
-void __init orion_uart0_init(unsigned int membase,
+void __init orion_uart0_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk);
-void __init orion_uart1_init(unsigned int membase,
+void __init orion_uart1_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk);
-void __init orion_uart2_init(unsigned int membase,
+void __init orion_uart2_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk);
-void __init orion_uart3_init(unsigned int membase,
+void __init orion_uart3_init(void __iomem *membase,
resource_size_t mapbase,
unsigned int irq,
struct clk *clk);
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h
deleted file mode 100644
index 6fc78e43042..00000000000
--- a/arch/arm/plat-orion/include/plat/ehci-orion.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/plat-orion/include/plat/ehci-orion.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_EHCI_ORION_H
-#define __PLAT_EHCI_ORION_H
-
-#include <linux/mbus.h>
-
-enum orion_ehci_phy_ver {
- EHCI_PHY_ORION,
- EHCI_PHY_DD,
- EHCI_PHY_KW,
- EHCI_PHY_NA,
-};
-
-struct orion_ehci_data {
- enum orion_ehci_phy_ver phy_version;
-};
-
-
-#endif
diff --git a/arch/arm/plat-orion/include/plat/mpp.h b/arch/arm/plat-orion/include/plat/mpp.h
index 723adce99f4..254552fee88 100644
--- a/arch/arm/plat-orion/include/plat/mpp.h
+++ b/arch/arm/plat-orion/include/plat/mpp.h
@@ -29,6 +29,6 @@
#define MPP_OUTPUT_MASK GENERIC_MPP(0, 0x0, 0, 1)
void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
- unsigned int mpp_max, unsigned int dev_bus);
+ unsigned int mpp_max, void __iomem *dev_bus);
#endif
diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h
deleted file mode 100644
index 2ba1f7d76ee..00000000000
--- a/arch/arm/plat-orion/include/plat/mv_xor.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/plat-orion/include/plat/mv_xor.h
- *
- * Marvell XOR platform device data definition file.
- */
-
-#ifndef __PLAT_MV_XOR_H
-#define __PLAT_MV_XOR_H
-
-#include <linux/dmaengine.h>
-#include <linux/mbus.h>
-
-#define MV_XOR_SHARED_NAME "mv_xor_shared"
-#define MV_XOR_NAME "mv_xor"
-
-struct mv_xor_platform_data {
- struct platform_device *shared;
- int hw_id;
- dma_cap_mask_t cap_mask;
- size_t pool_size;
-};
-
-
-#endif
diff --git a/arch/arm/plat-orion/include/plat/mvsdio.h b/arch/arm/plat-orion/include/plat/mvsdio.h
deleted file mode 100644
index 1190efedcb9..00000000000
--- a/arch/arm/plat-orion/include/plat/mvsdio.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * arch/arm/plat-orion/include/plat/mvsdio.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_MVSDIO_H
-#define __MACH_MVSDIO_H
-
-#include <linux/mbus.h>
-
-struct mvsdio_platform_data {
- unsigned int clock;
- int gpio_card_detect;
- int gpio_write_protect;
-};
-
-#endif
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/orion-gpio.h
index 81c6fc8a7b2..614dcac9dc5 100644
--- a/arch/arm/plat-orion/include/plat/gpio.h
+++ b/arch/arm/plat-orion/include/plat/orion-gpio.h
@@ -1,5 +1,5 @@
/*
- * arch/arm/plat-orion/include/plat/gpio.h
+ * arch/arm/plat-orion/include/plat/orion-gpio.h
*
* Marvell Orion SoC GPIO handling.
*
diff --git a/arch/arm/plat-orion/include/plat/orion_nand.h b/arch/arm/plat-orion/include/plat/orion_nand.h
deleted file mode 100644
index 9f3c180834d..00000000000
--- a/arch/arm/plat-orion/include/plat/orion_nand.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * arch/arm/plat-orion/include/plat/orion_nand.h
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_ORION_NAND_H
-#define __PLAT_ORION_NAND_H
-
-/*
- * Device bus NAND private data
- */
-struct orion_nand_data {
- struct mtd_partition *parts;
- int (*dev_ready)(struct mtd_info *mtd);
- u32 nr_parts;
- u8 ale; /* address line number connected to ALE */
- u8 cle; /* address line number connected to CLE */
- u8 width; /* buswidth */
- u8 chip_delay;
-};
-
-
-#endif
diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h
index 4d5f1f6e18d..07527e417c6 100644
--- a/arch/arm/plat-orion/include/plat/time.h
+++ b/arch/arm/plat-orion/include/plat/time.h
@@ -11,9 +11,9 @@
#ifndef __PLAT_TIME_H
#define __PLAT_TIME_H
-void orion_time_set_base(u32 timer_base);
+void orion_time_set_base(void __iomem *timer_base);
-void orion_time_init(u32 bridge_base, u32 bridge_timer1_clr_mask,
+void orion_time_init(void __iomem *bridge_base, u32 bridge_timer1_clr_mask,
unsigned int irq, unsigned int tclk);
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index d751964def4..1867944415c 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -16,7 +16,7 @@
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <plat/irq.h>
-#include <plat/gpio.h>
+#include <plat/orion-gpio.h>
void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
{
diff --git a/arch/arm/plat-orion/mpp.c b/arch/arm/plat-orion/mpp.c
index 3b1e17bd3d1..e686fe76a96 100644
--- a/arch/arm/plat-orion/mpp.c
+++ b/arch/arm/plat-orion/mpp.c
@@ -14,18 +14,19 @@
#include <linux/io.h>
#include <linux/gpio.h>
#include <mach/hardware.h>
+#include <plat/orion-gpio.h>
#include <plat/mpp.h>
/* Address of the ith MPP control register */
-static __init unsigned long mpp_ctrl_addr(unsigned int i,
- unsigned long dev_bus)
+static __init void __iomem *mpp_ctrl_addr(unsigned int i,
+ void __iomem *dev_bus)
{
return dev_bus + (i) * 4;
}
void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
- unsigned int mpp_max, unsigned int dev_bus)
+ unsigned int mpp_max, void __iomem *dev_bus)
{
unsigned int mpp_nr_regs = (1 + mpp_max/8);
u32 mpp_ctrl[mpp_nr_regs];
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 1ed8d1397fc..0f4fa863dd5 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -180,13 +180,13 @@ static struct irqaction orion_timer_irq = {
};
void __init
-orion_time_set_base(u32 _timer_base)
+orion_time_set_base(void __iomem *_timer_base)
{
- timer_base = (void __iomem *)_timer_base;
+ timer_base = _timer_base;
}
void __init
-orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
+orion_time_init(void __iomem *_bridge_base, u32 _bridge_timer1_clr_mask,
unsigned int irq, unsigned int tclk)
{
u32 u;
@@ -194,7 +194,7 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask,
/*
* Set SoC-specific data.
*/
- bridge_base = (void __iomem *)_bridge_base;
+ bridge_base = _bridge_base;
bridge_timer1_clr_mask = _bridge_timer1_clr_mask;
ticks_per_jiffy = (tclk + HZ/2) / HZ;