diff options
Diffstat (limited to 'arch/arm/mach-s5pc100')
23 files changed, 1429 insertions, 183 deletions
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index 8593337784e..b2a11dfa339 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig @@ -5,10 +5,13 @@ # Configuration options for the S5PC100 CPU +if ARCH_S5PC100 + config CPU_S5PC100 bool - select CPU_S5PC100_INIT - select CPU_S5PC100_CLOCK + select PLAT_S5P + select S5P_EXT_INT + select S3C_PL330_DMA help Enable S5PC100 CPU support @@ -17,17 +20,22 @@ config S5PC100_SETUP_FB_24BPP help Common setup code for S5PC1XX with an 24bpp RGB display helper. -config S5PC100_SETUP_SDHCI - bool - select S5PC1XX_SETUP_SDHCI_GPIO - help - Internal helper functions for S5PC100 based SDHCI systems - config S5PC100_SETUP_I2C1 bool help Common setup code for i2c bus 1. +config S5PC100_SETUP_SDHCI + bool + select S5PC100_SETUP_SDHCI_GPIO + help + Internal helper functions for S5PC100 based SDHCI systems + +config S5PC100_SETUP_SDHCI_GPIO + bool + help + Common setup code for SDHCI gpio. + config MACH_SMDKC100 bool "SMDKC100" select CPU_S5PC100 @@ -41,3 +49,5 @@ config MACH_SMDKC100 select S5PC100_SETUP_SDHCI help Machine support for the Samsung SMDKC100 + +endif diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile index 373bc546eae..543f3de5131 100644 --- a/arch/arm/mach-s5pc100/Makefile +++ b/arch/arm/mach-s5pc100/Makefile @@ -11,14 +11,24 @@ obj- := # Core support for S5PC100 system -obj-$(CONFIG_CPU_S5PC100) += cpu.o gpiolib.o +obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o irq-gpio.o obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o +obj-$(CONFIG_CPU_S5PC100) += dma.o # Helper and device support obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o +obj-$(CONFIG_S5PC100_SETUP_SDHCI) += setup-sdhci.o +obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o + +# device support +obj-y += dev-audio.o +obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o # machine support + obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o + +# device support +obj-y += dev-audio.o diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c index d79e7574a85..7b5bdbc9a5d 100644 --- a/arch/arm/mach-s5pc100/cpu.c +++ b/arch/arm/mach-s5pc100/cpu.c @@ -22,47 +22,55 @@ #include <linux/serial_core.h> #include <linux/platform_device.h> -#include <asm/proc-fns.h> - #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> +#include <asm/proc-fns.h> + #include <mach/hardware.h> #include <mach/map.h> #include <asm/irq.h> -#include <plat/cpu-freq.h> #include <plat/regs-serial.h> -#include <plat/regs-power.h> +#include <mach/regs-clock.h> #include <plat/cpu.h> #include <plat/devs.h> #include <plat/clock.h> -#include <plat/sdhci.h> #include <plat/iic-core.h> +#include <plat/sdhci.h> +#include <plat/onenand-core.h> + #include <plat/s5pc100.h> /* Initial IO mappings */ static struct map_desc s5pc100_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSTIMER, + .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)VA_VIC2, + .pfn = __phys_to_pfn(S5P_PA_VIC2), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5PC100_VA_OTHERS, + .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), + .length = SZ_4K, + .type = MT_DEVICE, + } }; static void s5pc100_idle(void) { - unsigned long tmp; - - tmp = __raw_readl(S5PC100_PWR_CFG); - tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE; - tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK; - tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE; - __raw_writel(tmp, S5PC100_PWR_CFG); - - tmp = __raw_readl(S5PC100_OTHERS); - tmp |= S5PC100_PMU_INT_DISABLE; - __raw_writel(tmp, S5PC100_OTHERS); + if (!need_resched()) + cpu_do_idle(); - cpu_do_idle(); + local_irq_enable(); } /* s5pc100_map_io @@ -82,26 +90,29 @@ void __init s5pc100_map_io(void) /* the i2c devices are directly compatible with s3c2440 */ s3c_i2c0_setname("s3c2440-i2c"); s3c_i2c1_setname("s3c2440-i2c"); + + s3c_onenand_setname("s5pc100-onenand"); } void __init s5pc100_init_clocks(int xtal) { - printk(KERN_DEBUG "%s: initialising clocks\n", __func__); + printk(KERN_DEBUG "%s: initializing clocks\n", __func__); + s3c24xx_register_baseclocks(xtal); - s5pc1xx_register_clocks(); + s5p_register_clocks(xtal); s5pc100_register_clocks(); s5pc100_setup_clocks(); } void __init s5pc100_init_irq(void) { - u32 vic_valid[] = {~0, ~0, ~0}; + u32 vic[] = {~0, ~0, ~0}; /* VIC0, VIC1, and VIC2 are fully populated. */ - s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid)); + s5p_init_irq(vic, ARRAY_SIZE(vic)); } -struct sysdev_class s5pc100_sysclass = { +static struct sysdev_class s5pc100_sysclass = { .name = "s5pc100-core", }; @@ -118,9 +129,10 @@ core_initcall(s5pc100_core_init); int __init s5pc100_init(void) { - printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); + printk(KERN_INFO "S5PC100: Initializing architecture\n"); - s5pc1xx_idle = s5pc100_idle; + /* set idle function */ + pm_idle = s5pc100_idle; return sysdev_register(&s5pc100_sysdev); } diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c new file mode 100644 index 00000000000..18cfe9ae193 --- /dev/null +++ b/arch/arm/mach-s5pc100/dev-audio.c @@ -0,0 +1,287 @@ +/* linux/arch/arm/mach-s5pc100/dev-audio.c + * + * Copyright (c) 2010 Samsung Electronics Co. Ltd + * Jaswinder Singh <jassi.brar@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> + +#include <plat/gpio-cfg.h> +#include <plat/audio.h> + +#include <mach/gpio.h> +#include <mach/map.h> +#include <mach/dma.h> +#include <mach/irqs.h> + +static int s5pc100_cfg_i2s(struct platform_device *pdev) +{ + /* configure GPIO for i2s port */ + switch (pdev->id) { + case 1: + s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2)); + break; + + case 2: + s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4)); + break; + + case -1: /* Dedicated pins */ + break; + + default: + printk(KERN_ERR "Invalid Device %d\n", pdev->id); + return -EINVAL; + } + + return 0; +} + +static struct s3c_audio_pdata s3c_i2s_pdata = { + .cfg_gpio = s5pc100_cfg_i2s, +}; + +static struct resource s5pc100_iis0_resource[] = { + [0] = { + .start = S5PC100_PA_I2S0, + .end = S5PC100_PA_I2S0 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_I2S0_TX, + .end = DMACH_I2S0_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_I2S0_RX, + .end = DMACH_I2S0_RX, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device s5pc100_device_iis0 = { + .name = "s3c64xx-iis-v4", + .id = -1, + .num_resources = ARRAY_SIZE(s5pc100_iis0_resource), + .resource = s5pc100_iis0_resource, + .dev = { + .platform_data = &s3c_i2s_pdata, + }, +}; + +static struct resource s5pc100_iis1_resource[] = { + [0] = { + .start = S5PC100_PA_I2S1, + .end = S5PC100_PA_I2S1 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_I2S1_TX, + .end = DMACH_I2S1_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_I2S1_RX, + .end = DMACH_I2S1_RX, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device s5pc100_device_iis1 = { + .name = "s3c64xx-iis", + .id = 1, + .num_resources = ARRAY_SIZE(s5pc100_iis1_resource), + .resource = s5pc100_iis1_resource, + .dev = { + .platform_data = &s3c_i2s_pdata, + }, +}; + +static struct resource s5pc100_iis2_resource[] = { + [0] = { + .start = S5PC100_PA_I2S2, + .end = S5PC100_PA_I2S2 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_I2S2_TX, + .end = DMACH_I2S2_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_I2S2_RX, + .end = DMACH_I2S2_RX, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device s5pc100_device_iis2 = { + .name = "s3c64xx-iis", + .id = 2, + .num_resources = ARRAY_SIZE(s5pc100_iis2_resource), + .resource = s5pc100_iis2_resource, + .dev = { + .platform_data = &s3c_i2s_pdata, + }, +}; + +/* PCM Controller platform_devices */ + +static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) +{ + switch (pdev->id) { + case 0: + s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5)); + s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5)); + break; + + case 1: + s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3)); + break; + + default: + printk(KERN_DEBUG "Invalid PCM Controller number!"); + return -EINVAL; + } + + return 0; +} + +static struct s3c_audio_pdata s3c_pcm_pdata = { + .cfg_gpio = s5pc100_pcm_cfg_gpio, +}; + +static struct resource s5pc100_pcm0_resource[] = { + [0] = { + .start = S5PC100_PA_PCM0, + .end = S5PC100_PA_PCM0 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_PCM0_TX, + .end = DMACH_PCM0_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_PCM0_RX, + .end = DMACH_PCM0_RX, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device s5pc100_device_pcm0 = { + .name = "samsung-pcm", + .id = 0, + .num_resources = ARRAY_SIZE(s5pc100_pcm0_resource), + .resource = s5pc100_pcm0_resource, + .dev = { + .platform_data = &s3c_pcm_pdata, + }, +}; + +static struct resource s5pc100_pcm1_resource[] = { + [0] = { + .start = S5PC100_PA_PCM1, + .end = S5PC100_PA_PCM1 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_PCM1_TX, + .end = DMACH_PCM1_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_PCM1_RX, + .end = DMACH_PCM1_RX, + .flags = IORESOURCE_DMA, + }, +}; + +struct platform_device s5pc100_device_pcm1 = { + .name = "samsung-pcm", + .id = 1, + .num_resources = ARRAY_SIZE(s5pc100_pcm1_resource), + .resource = s5pc100_pcm1_resource, + .dev = { + .platform_data = &s3c_pcm_pdata, + }, +}; + +/* AC97 Controller platform devices */ + +static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) +{ + s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4)); + s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4)); + + return 0; +} + +static struct resource s5pc100_ac97_resource[] = { + [0] = { + .start = S5PC100_PA_AC97, + .end = S5PC100_PA_AC97 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_AC97_PCMOUT, + .end = DMACH_AC97_PCMOUT, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_AC97_PCMIN, + .end = DMACH_AC97_PCMIN, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = DMACH_AC97_MICIN, + .end = DMACH_AC97_MICIN, + .flags = IORESOURCE_DMA, + }, + [4] = { + .start = IRQ_AC97, + .end = IRQ_AC97, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct s3c_audio_pdata s3c_ac97_pdata = { + .cfg_gpio = s5pc100_ac97_cfg_gpio, +}; + +static u64 s5pc100_ac97_dmamask = DMA_BIT_MASK(32); + +struct platform_device s5pc100_device_ac97 = { + .name = "s3c-ac97", + .id = -1, + .num_resources = ARRAY_SIZE(s5pc100_ac97_resource), + .resource = s5pc100_ac97_resource, + .dev = { + .platform_data = &s3c_ac97_pdata, + .dma_mask = &s5pc100_ac97_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + }, +}; diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c new file mode 100644 index 00000000000..14618c34605 --- /dev/null +++ b/arch/arm/mach-s5pc100/dev-spi.c @@ -0,0 +1,233 @@ +/* linux/arch/arm/mach-s5pc100/dev-spi.c + * + * Copyright (C) 2010 Samsung Electronics Co. Ltd. + * Jaswinder Singh <jassi.brar@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> + +#include <mach/dma.h> +#include <mach/map.h> +#include <mach/gpio.h> +#include <mach/spi-clocks.h> + +#include <plat/s3c64xx-spi.h> +#include <plat/gpio-cfg.h> +#include <plat/irqs.h> + +static char *spi_src_clks[] = { + [S5PC100_SPI_SRCCLK_PCLK] = "pclk", + [S5PC100_SPI_SRCCLK_48M] = "spi_48m", + [S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus", +}; + +/* SPI Controller platform_devices */ + +/* Since we emulate multi-cs capability, we do not touch the CS. + * The emulated CS is toggled by board specific mechanism, as it can + * be either some immediate GPIO or some signal out of some other + * chip in between ... or some yet another way. + * We simply do not assume anything about CS. + */ +static int s5pc100_spi_cfg_gpio(struct platform_device *pdev) +{ + switch (pdev->id) { + case 0: + s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP); + s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP); + s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP); + break; + + case 1: + s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2)); + s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2)); + s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP); + s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP); + s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP); + break; + + case 2: + s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3)); + s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3)); + s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); + s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP); + s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP); + break; + + default: + dev_err(&pdev->dev, "Invalid SPI Controller number!"); + return -EINVAL; + } + + return 0; +} + +static struct resource s5pc100_spi0_resource[] = { + [0] = { + .start = S5PC100_PA_SPI0, + .end = S5PC100_PA_SPI0 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_SPI0_TX, + .end = DMACH_SPI0_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_SPI0_RX, + .end = DMACH_SPI0_RX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = IRQ_SPI0, + .end = IRQ_SPI0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct s3c64xx_spi_info s5pc100_spi0_pdata = { + .cfg_gpio = s5pc100_spi_cfg_gpio, + .fifo_lvl_mask = 0x7f, + .rx_lvl_offset = 13, + .high_speed = 1, +}; + +static u64 spi_dmamask = DMA_BIT_MASK(32); + +struct platform_device s5pc100_device_spi0 = { + .name = "s3c64xx-spi", + .id = 0, + .num_resources = ARRAY_SIZE(s5pc100_spi0_resource), + .resource = s5pc100_spi0_resource, + .dev = { + .dma_mask = &spi_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_spi0_pdata, + }, +}; + +static struct resource s5pc100_spi1_resource[] = { + [0] = { + .start = S5PC100_PA_SPI1, + .end = S5PC100_PA_SPI1 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_SPI1_TX, + .end = DMACH_SPI1_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_SPI1_RX, + .end = DMACH_SPI1_RX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = IRQ_SPI1, + .end = IRQ_SPI1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct s3c64xx_spi_info s5pc100_spi1_pdata = { + .cfg_gpio = s5pc100_spi_cfg_gpio, + .fifo_lvl_mask = 0x7f, + .rx_lvl_offset = 13, + .high_speed = 1, +}; + +struct platform_device s5pc100_device_spi1 = { + .name = "s3c64xx-spi", + .id = 1, + .num_resources = ARRAY_SIZE(s5pc100_spi1_resource), + .resource = s5pc100_spi1_resource, + .dev = { + .dma_mask = &spi_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_spi1_pdata, + }, +}; + +static struct resource s5pc100_spi2_resource[] = { + [0] = { + .start = S5PC100_PA_SPI2, + .end = S5PC100_PA_SPI2 + 0x100 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DMACH_SPI2_TX, + .end = DMACH_SPI2_TX, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = DMACH_SPI2_RX, + .end = DMACH_SPI2_RX, + .flags = IORESOURCE_DMA, + }, + [3] = { + .start = IRQ_SPI2, + .end = IRQ_SPI2, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct s3c64xx_spi_info s5pc100_spi2_pdata = { + .cfg_gpio = s5pc100_spi_cfg_gpio, + .fifo_lvl_mask = 0x7f, + .rx_lvl_offset = 13, + .high_speed = 1, +}; + +struct platform_device s5pc100_device_spi2 = { + .name = "s3c64xx-spi", + .id = 2, + .num_resources = ARRAY_SIZE(s5pc100_spi2_resource), + .resource = s5pc100_spi2_resource, + .dev = { + .dma_mask = &spi_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_spi2_pdata, + }, +}; + +void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) +{ + struct s3c64xx_spi_info *pd; + + /* Reject invalid configuration */ + if (!num_cs || src_clk_nr < 0 + || src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) { + printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); + return; + } + + switch (cntrlr) { + case 0: + pd = &s5pc100_spi0_pdata; + break; + case 1: + pd = &s5pc100_spi1_pdata; + break; + case 2: + pd = &s5pc100_spi2_pdata; + break; + default: + printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", + __func__, cntrlr); + return; + } + + pd->num_cs = num_cs; + pd->src_clk_nr = src_clk_nr; + pd->src_clk_name = spi_src_clks[src_clk_nr]; +} diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c new file mode 100644 index 00000000000..0f5517571e2 --- /dev/null +++ b/arch/arm/mach-s5pc100/dma.c @@ -0,0 +1,167 @@ +/* + * Copyright (C) 2010 Samsung Electronics Co. Ltd. + * Jaswinder Singh <jassi.brar@samsung.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> + +#include <plat/devs.h> + +#include <mach/map.h> +#include <mach/irqs.h> + +#include <plat/s3c-pl330-pdata.h> + +static u64 dma_dmamask = DMA_BIT_MASK(32); + +static struct resource s5pc100_pdma0_resource[] = { + [0] = { + .start = S5PC100_PA_PDMA0, + .end = S5PC100_PA_PDMA0 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_PDMA0, + .end = IRQ_PDMA0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct s3c_pl330_platdata s5pc100_pdma0_pdata = { + .peri = { + [0] = DMACH_UART0_RX, + [1] = DMACH_UART0_TX, + [2] = DMACH_UART1_RX, + [3] = DMACH_UART1_TX, + [4] = DMACH_UART2_RX, + [5] = DMACH_UART2_TX, + [6] = DMACH_UART3_RX, + [7] = DMACH_UART3_TX, + [8] = DMACH_IRDA, + [9] = DMACH_I2S0_RX, + [10] = DMACH_I2S0_TX, + [11] = DMACH_I2S0S_TX, + [12] = DMACH_I2S1_RX, + [13] = DMACH_I2S1_TX, + [14] = DMACH_I2S2_RX, + [15] = DMACH_I2S2_TX, + [16] = DMACH_SPI0_RX, + [17] = DMACH_SPI0_TX, + [18] = DMACH_SPI1_RX, + [19] = DMACH_SPI1_TX, + [20] = DMACH_SPI2_RX, + [21] = DMACH_SPI2_TX, + [22] = DMACH_AC97_MICIN, + [23] = DMACH_AC97_PCMIN, + [24] = DMACH_AC97_PCMOUT, + [25] = DMACH_EXTERNAL, + [26] = DMACH_PWM, + [27] = DMACH_SPDIF, + [28] = DMACH_HSI_RX, + [29] = DMACH_HSI_TX, + [30] = DMACH_MAX, + [31] = DMACH_MAX, + }, +}; + +static struct platform_device s5pc100_device_pdma0 = { + .name = "s3c-pl330", + .id = 1, + .num_resources = ARRAY_SIZE(s5pc100_pdma0_resource), + .resource = s5pc100_pdma0_resource, + .dev = { + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_pdma0_pdata, + }, +}; + +static struct resource s5pc100_pdma1_resource[] = { + [0] = { + .start = S5PC100_PA_PDMA1, + .end = S5PC100_PA_PDMA1 + SZ_4K, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_PDMA1, + .end = IRQ_PDMA1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct s3c_pl330_platdata s5pc100_pdma1_pdata = { + .peri = { + [0] = DMACH_UART0_RX, + [1] = DMACH_UART0_TX, + [2] = DMACH_UART1_RX, + [3] = DMACH_UART1_TX, + [4] = DMACH_UART2_RX, + [5] = DMACH_UART2_TX, + [6] = DMACH_UART3_RX, + [7] = DMACH_UART3_TX, + [8] = DMACH_IRDA, + [9] = DMACH_I2S0_RX, + [10] = DMACH_I2S0_TX, + [11] = DMACH_I2S0S_TX, + [12] = DMACH_I2S1_RX, + [13] = DMACH_I2S1_TX, + [14] = DMACH_I2S2_RX, + [15] = DMACH_I2S2_TX, + [16] = DMACH_SPI0_RX, + [17] = DMACH_SPI0_TX, + [18] = DMACH_SPI1_RX, + [19] = DMACH_SPI1_TX, + [20] = DMACH_SPI2_RX, + [21] = DMACH_SPI2_TX, + [22] = DMACH_PCM0_RX, + [23] = DMACH_PCM0_TX, + [24] = DMACH_PCM1_RX, + [25] = DMACH_PCM1_TX, + [26] = DMACH_MSM_REQ0, + [27] = DMACH_MSM_REQ1, + [28] = DMACH_MSM_REQ2, + [29] = DMACH_MSM_REQ3, + [30] = DMACH_MAX, + [31] = DMACH_MAX, + }, +}; + +static struct platform_device s5pc100_device_pdma1 = { + .name = "s3c-pl330", + .id = 2, + .num_resources = ARRAY_SIZE(s5pc100_pdma1_resource), + .resource = s5pc100_pdma1_resource, + .dev = { + .dma_mask = &dma_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &s5pc100_pdma1_pdata, + }, +}; + +static struct platform_device *s5pc100_dmacs[] __initdata = { + &s5pc100_device_pdma0, + &s5pc100_device_pdma1, +}; + +static int __init s5pc100_dma_init(void) +{ + platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs)); + + return 0; +} +arch_initcall(s5pc100_dma_init); diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c index c8e8336a3a1..0fab7f2cd8b 100644 --- a/arch/arm/mach-s5pc100/gpiolib.c +++ b/arch/arm/mach-s5pc100/gpiolib.c @@ -1,10 +1,10 @@ /* - * arch/arm/plat-s5pc1xx/gpiolib.c + * arch/arm/plat-s5pc100/gpiolib.c * * Copyright 2009 Samsung Electronics Co * Kyungmin Park <kyungmin.park@samsung.com> * - * S5PC1XX - GPIOlib support + * S5PC100 - GPIOlib support * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -61,13 +61,12 @@ * L3 8 4Bit None */ -#if 0 -static int s5pc1xx_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) +static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) { return S3C_IRQ_GPIO(chip->base + offset); } -static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) +static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) { int base; @@ -85,7 +84,7 @@ static int s5pc1xx_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset) return IRQ_EINT(24 + offset); return -EINVAL; } -#endif + static struct s3c_gpio_cfg gpio_cfg = { .set_config = s3c_gpio_setcfg_s3c64xx_4bit, .set_pull = s3c_gpio_setpull_updown, @@ -382,31 +381,30 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = { }; /* FIXME move from irq-gpio.c */ -extern struct irq_chip s5pc1xx_gpioint; -extern void s5pc1xx_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); +extern struct irq_chip s5pc100_gpioint; +extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc); static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip) { -#if 0 /* Interrupt */ if (chip->config == &gpio_cfg) { int i, irq; - chip->chip.to_irq = s5pc1xx_gpiolib_to_irq; + chip->chip.to_irq = s5pc100_gpiolib_to_irq; for (i = 0; i < chip->chip.ngpio; i++) { irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i; - set_irq_chip(irq, &s5pc1xx_gpioint); + set_irq_chip(irq, &s5pc100_gpioint); set_irq_data(irq, &chip->chip); set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - } else if (chip->config == &gpio_cfg_eint) - chip->chip.to_irq = s5pc1xx_gpiolib_to_eint; -#endif + } else if (chip->config == &gpio_cfg_eint) { + chip->chip.to_irq = s5pc100_gpiolib_to_eint; + } } -static __init int s5pc1xx_gpiolib_init(void) +static __init int s5pc100_gpiolib_init(void) { struct s3c_gpio_chip *chip; int nr_chips; @@ -419,10 +417,10 @@ static __init int s5pc1xx_gpiolib_init(void) samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips, ARRAY_SIZE(s5pc100_gpio_chips)); -#if 0 + /* Interrupt */ - set_irq_chained_handler(IRQ_GPIOINT, s5pc1xx_irq_gpioint_handler); -#endif + set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler); + return 0; } -core_initcall(s5pc1xx_gpiolib_init); +core_initcall(s5pc100_gpiolib_init); diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S index e181f578948..70e02e91ee3 100644 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S @@ -22,12 +22,14 @@ * aligned and add in the offset when we load the value here. */ - .macro addruart, rx, tmp + .macro addruart, rx, rtmp mrc p15, 0, \rx, c1, |