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-rw-r--r--arch/arm/mach-s3c2410/Kconfig8
-rw-r--r--arch/arm/mach-s3c2410/Makefile1
-rw-r--r--arch/arm/mach-s3c2410/bast-irq.c8
-rw-r--r--arch/arm/mach-s3c2410/irq.c63
-rw-r--r--arch/arm/mach-s3c2410/irq.h2
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c8
-rw-r--r--arch/arm/mach-s3c2410/mach-osiris.c9
-rw-r--r--arch/arm/mach-s3c2410/mach-rx3715.c3
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c50
-rw-r--r--arch/arm/mach-s3c2410/pm-h1940.S33
-rw-r--r--arch/arm/mach-s3c2410/s3c2410-pm.c30
-rw-r--r--arch/arm/mach-s3c2410/s3c2412-irq.c4
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-irq.c10
-rw-r--r--arch/arm/mach-s3c2410/s3c244x-irq.c12
14 files changed, 182 insertions, 59 deletions
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 9aa26b99045..9f46bf330bc 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -41,9 +41,16 @@ config BAST_PC104_IRQ
Say Y here to enable the PC104 IRQ routing on the
Simtec BAST (EB2410ITX)
+config PM_H1940
+ bool
+ depends on PM
+ help
+ Internal node for H1940 and related PM
+
config ARCH_H1940
bool "IPAQ H1940"
select CPU_S3C2410
+ select PM_H1940
help
Say Y here if you are using the HP IPAQ H1940
@@ -115,6 +122,7 @@ config MACH_VR1000
config MACH_RX3715
bool "HP iPAQ rx3715"
select CPU_S3C2440
+ select PM_H1940
help
Say Y here if you are using the HP iPAQ rx3715.
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index d66013365b6..27663e28cc8 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -31,6 +31,7 @@ obj-$(CONFIG_CPU_S3C2410_DMA) += s3c2410-dma.o
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
+obj-$(CONFIG_PM_H1940) += pm-h1940.o
# S3C2412 support
obj-$(CONFIG_CPU_S3C2412) += s3c2412.o
diff --git a/arch/arm/mach-s3c2410/bast-irq.c b/arch/arm/mach-s3c2410/bast-irq.c
index 23d5beea556..379efe70778 100644
--- a/arch/arm/mach-s3c2410/bast-irq.c
+++ b/arch/arm/mach-s3c2410/bast-irq.c
@@ -88,7 +88,7 @@ bast_pc104_mask(unsigned int irqno)
static void
bast_pc104_maskack(unsigned int irqno)
{
- struct irqdesc *desc = irq_desc + IRQ_ISA;
+ struct irq_desc *desc = irq_desc + IRQ_ISA;
bast_pc104_mask(irqno);
desc->chip->ack(IRQ_ISA);
@@ -104,7 +104,7 @@ bast_pc104_unmask(unsigned int irqno)
__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
}
-static struct irqchip bast_pc104_chip = {
+static struct irq_chip bast_pc104_chip = {
.mask = bast_pc104_mask,
.unmask = bast_pc104_unmask,
.ack = bast_pc104_maskack
@@ -112,7 +112,7 @@ static struct irqchip bast_pc104_chip = {
static void
bast_irq_pc104_demux(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
unsigned int stat;
unsigned int irqno;
@@ -157,7 +157,7 @@ static __init int bast_irq_init(void)
unsigned int irqno = bast_pc104_irqs[i];
set_irq_chip(irqno, &bast_pc104_chip);
- set_irq_handler(irqno, do_level_IRQ);
+ set_irq_handler(irqno, handle_level_irq);
set_irq_flags(irqno, IRQF_VALID);
}
}
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c
index 683b3491ba3..3c0ed7871c5 100644
--- a/arch/arm/mach-s3c2410/irq.c
+++ b/arch/arm/mach-s3c2410/irq.c
@@ -180,7 +180,7 @@ s3c_irq_unmask(unsigned int irqno)
__raw_writel(mask, S3C2410_INTMSK);
}
-struct irqchip s3c_irq_level_chip = {
+struct irq_chip s3c_irq_level_chip = {
.name = "s3c-level",
.ack = s3c_irq_maskack,
.mask = s3c_irq_mask,
@@ -188,7 +188,7 @@ struct irqchip s3c_irq_level_chip = {
.set_wake = s3c_irq_wake
};
-static struct irqchip s3c_irq_chip = {
+static struct irq_chip s3c_irq_chip = {
.name = "s3c",
.ack = s3c_irq_ack,
.mask = s3c_irq_mask,
@@ -206,18 +206,6 @@ s3c_irqext_mask(unsigned int irqno)
mask = __raw_readl(S3C24XX_EINTMASK);
mask |= ( 1UL << irqno);
__raw_writel(mask, S3C24XX_EINTMASK);
-
- if (irqno <= (IRQ_EINT7 - EXTINT_OFF)) {
- /* check to see if all need masking */
-
- if ((mask & (0xf << 4)) == (0xf << 4)) {
- /* all masked, mask the parent */
- s3c_irq_mask(IRQ_EINT4t7);
- }
- } else {
- /* todo: the same check as above for the rest of the irq regs...*/
-
- }
}
static void
@@ -229,7 +217,6 @@ s3c_irqext_ack(unsigned int irqno)
bit = 1UL << (irqno - EXTINT_OFF);
-
mask = __raw_readl(S3C24XX_EINTMASK);
__raw_writel(bit, S3C24XX_EINTPEND);
@@ -258,8 +245,6 @@ s3c_irqext_unmask(unsigned int irqno)
mask = __raw_readl(S3C24XX_EINTMASK);
mask &= ~( 1UL << irqno);
__raw_writel(mask, S3C24XX_EINTMASK);
-
- s3c_irq_unmask((irqno <= (IRQ_EINT7 - EXTINT_OFF)) ? IRQ_EINT4t7 : IRQ_EINT8t23);
}
int
@@ -344,7 +329,7 @@ s3c_irqext_type(unsigned int irq, unsigned int type)
return 0;
}
-static struct irqchip s3c_irqext_chip = {
+static struct irq_chip s3c_irqext_chip = {
.name = "s3c-ext",
.mask = s3c_irqext_mask,
.unmask = s3c_irqext_unmask,
@@ -353,7 +338,7 @@ static struct irqchip s3c_irqext_chip = {
.set_wake = s3c_irqext_wake
};
-static struct irqchip s3c_irq_eint0t4 = {
+static struct irq_chip s3c_irq_eint0t4 = {
.name = "s3c-ext0",
.ack = s3c_irq_ack,
.mask = s3c_irq_mask,
@@ -390,7 +375,7 @@ s3c_irq_uart0_ack(unsigned int irqno)
s3c_irqsub_maskack(irqno, INTMSK_UART0, 7);
}
-static struct irqchip s3c_irq_uart0 = {
+static struct irq_chip s3c_irq_uart0 = {
.name = "s3c-uart0",
.mask = s3c_irq_uart0_mask,
.unmask = s3c_irq_uart0_unmask,
@@ -417,7 +402,7 @@ s3c_irq_uart1_ack(unsigned int irqno)
s3c_irqsub_maskack(irqno, INTMSK_UART1, 7 << 3);
}
-static struct irqchip s3c_irq_uart1 = {
+static struct irq_chip s3c_irq_uart1 = {
.name = "s3c-uart1",
.mask = s3c_irq_uart1_mask,
.unmask = s3c_irq_uart1_unmask,
@@ -444,7 +429,7 @@ s3c_irq_uart2_ack(unsigned int irqno)
s3c_irqsub_maskack(irqno, INTMSK_UART2, 7 << 6);
}
-static struct irqchip s3c_irq_uart2 = {
+static struct irq_chip s3c_irq_uart2 = {
.name = "s3c-uart2",
.mask = s3c_irq_uart2_mask,
.unmask = s3c_irq_uart2_unmask,
@@ -471,7 +456,7 @@ s3c_irq_adc_ack(unsigned int irqno)
s3c_irqsub_ack(irqno, INTMSK_ADCPARENT, 3 << 9);
}
-static struct irqchip s3c_irq_adc = {
+static struct irq_chip s3c_irq_adc = {
.name = "s3c-adc",
.mask = s3c_irq_adc_mask,
.unmask = s3c_irq_adc_unmask,
@@ -480,11 +465,11 @@ static struct irqchip s3c_irq_adc = {
/* irq demux for adc */
static void s3c_irq_demux_adc(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
unsigned int subsrc, submsk;
unsigned int offset = 9;
- struct irqdesc *mydesc;
+ struct irq_desc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
@@ -512,7 +497,7 @@ static void s3c_irq_demux_uart(unsigned int start)
{
unsigned int subsrc, submsk;
unsigned int offset = start - IRQ_S3CUART_RX0;
- struct irqdesc *desc;
+ struct irq_desc *desc;
/* read the current pending interrupts, and the mask
* for what it is available */
@@ -549,7 +534,7 @@ static void s3c_irq_demux_uart(unsigned int start)
static void
s3c_irq_demux_uart0(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
irq = irq;
s3c_irq_demux_uart(IRQ_S3CUART_RX0);
@@ -557,7 +542,7 @@ s3c_irq_demux_uart0(unsigned int irq,
static void
s3c_irq_demux_uart1(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
irq = irq;
s3c_irq_demux_uart(IRQ_S3CUART_RX1);
@@ -565,7 +550,7 @@ s3c_irq_demux_uart1(unsigned int irq,
static void
s3c_irq_demux_uart2(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
irq = irq;
s3c_irq_demux_uart(IRQ_S3CUART_RX2);
@@ -573,7 +558,7 @@ s3c_irq_demux_uart2(unsigned int irq,
static void
s3c_irq_demux_extint8(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND);
unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK);
@@ -595,7 +580,7 @@ s3c_irq_demux_extint8(unsigned int irq,
static void
s3c_irq_demux_extint4t7(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
unsigned long eintpnd = __raw_readl(S3C24XX_EINTPEND);
unsigned long eintmsk = __raw_readl(S3C24XX_EINTMASK);
@@ -738,7 +723,7 @@ void __init s3c24xx_init_irq(void)
case IRQ_UART2:
case IRQ_ADCPARENT:
set_irq_chip(irqno, &s3c_irq_level_chip);
- set_irq_handler(irqno, do_level_IRQ);
+ set_irq_handler(irqno, handle_level_irq);
break;
case IRQ_RESERVED6:
@@ -749,7 +734,7 @@ void __init s3c24xx_init_irq(void)
default:
//irqdbf("registering irq %d (s3c irq)\n", irqno);
set_irq_chip(irqno, &s3c_irq_chip);
- set_irq_handler(irqno, do_edge_IRQ);
+ set_irq_handler(irqno, handle_edge_irq);
set_irq_flags(irqno, IRQF_VALID);
}
}
@@ -769,14 +754,14 @@ void __init s3c24xx_init_irq(void)
for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
irqdbf("registering irq %d (ext int)\n", irqno);
set_irq_chip(irqno, &s3c_irq_eint0t4);
- set_irq_handler(irqno, do_edge_IRQ);
+ set_irq_handler(irqno, handle_edge_irq);
set_irq_flags(irqno, IRQF_VALID);
}
for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) {
irqdbf("registering irq %d (extended s3c irq)\n", irqno);
set_irq_chip(irqno, &s3c_irqext_chip);
- set_irq_handler(irqno, do_edge_IRQ);
+ set_irq_handler(irqno, handle_edge_irq);
set_irq_flags(irqno, IRQF_VALID);
}
@@ -787,28 +772,28 @@ void __init s3c24xx_init_irq(void)
for (irqno = IRQ_S3CUART_RX0; irqno <= IRQ_S3CUART_ERR0; irqno++) {
irqdbf("registering irq %d (s3c uart0 irq)\n", irqno);
set_irq_chip(irqno, &s3c_irq_uart0);
- set_irq_handler(irqno, do_level_IRQ);
+ set_irq_handler(irqno, handle_level_irq);
set_irq_flags(irqno, IRQF_VALID);
}
for (irqno = IRQ_S3CUART_RX1; irqno <= IRQ_S3CUART_ERR1; irqno++) {
irqdbf("registering irq %d (s3c uart1 irq)\n", irqno);
set_irq_chip(irqno, &s3c_irq_uart1);
- set_irq_handler(irqno, do_level_IRQ);
+ set_irq_handler(irqno, handle_level_irq);
set_irq_flags(irqno, IRQF_VALID);
}
for (irqno = IRQ_S3CUART_RX2; irqno <= IRQ_S3CUART_ERR2; irqno++) {
irqdbf("registering irq %d (s3c uart2 irq)\n", irqno);
set_irq_chip(irqno, &s3c_irq_uart2);
- set_irq_handler(irqno, do_level_IRQ);
+ set_irq_handler(irqno, handle_level_irq);
set_irq_flags(irqno, IRQF_VALID);
}
for (irqno = IRQ_TC; irqno <= IRQ_ADC; irqno++) {
irqdbf("registering irq %d (s3c adc irq)\n", irqno);
set_irq_chip(irqno, &s3c_irq_adc);
- set_irq_handler(irqno, do_edge_IRQ);
+ set_irq_handler(irqno, handle_edge_irq);
set_irq_flags(irqno, IRQF_VALID);
}
diff --git a/arch/arm/mach-s3c2410/irq.h b/arch/arm/mach-s3c2410/irq.h
index 842a9f42c97..3686a008224 100644
--- a/arch/arm/mach-s3c2410/irq.h
+++ b/arch/arm/mach-s3c2410/irq.h
@@ -17,7 +17,7 @@
#define EXTINT_OFF (IRQ_EINT4 - 4)
-extern struct irqchip s3c_irq_level_chip;
+extern struct irq_chip s3c_irq_level_chip;
static inline void
s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 8c895c077d2..f5b98099a5d 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -33,6 +33,7 @@
#include <asm/arch/regs-serial.h>
#include <asm/arch/regs-lcd.h>
+#include <asm/arch/h1940.h>
#include <asm/arch/h1940-latch.h>
#include <asm/arch/fb.h>
@@ -41,6 +42,7 @@
#include "clock.h"
#include "devs.h"
#include "cpu.h"
+#include "pm.h"
static struct map_desc h1940_iodesc[] __initdata = {
[0] = {
@@ -164,12 +166,16 @@ static void __init h1940_map_io(void)
s3c24xx_init_clocks(0);
s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
s3c24xx_set_board(&h1940_board);
+
+ /* setup PM */
+
+ memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
+ s3c2410_pm_init();
}
static void __init h1940_init_irq(void)
{
s3c24xx_init_irq();
-
}
static void __init h1940_init(void)
diff --git a/arch/arm/mach-s3c2410/mach-osiris.c b/arch/arm/mach-s3c2410/mach-osiris.c
index e193ba69e65..a4ab144e729 100644
--- a/arch/arm/mach-s3c2410/mach-osiris.c
+++ b/arch/arm/mach-s3c2410/mach-osiris.c
@@ -114,6 +114,15 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
.clocks = osiris_serial_clocks,
.clocks_size = ARRAY_SIZE(osiris_serial_clocks),
},
+ [2] = {
+ .hwport = 2,
+ .flags = 0,
+ .ucon = UCON,
+ .ulcon = ULCON,
+ .ufcon = UFCON,
+ .clocks = osiris_serial_clocks,
+ .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+ }
};
/* NAND Flash on Osiris board */
diff --git a/arch/arm/mach-s3c2410/mach-rx3715.c b/arch/arm/mach-s3c2410/mach-rx3715.c
index 23d7c052013..ecbcdf79d73 100644
--- a/arch/arm/mach-s3c2410/mach-rx3715.c
+++ b/arch/arm/mach-s3c2410/mach-rx3715.c
@@ -42,6 +42,7 @@
#include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-lcd.h>
+#include <asm/arch/h1940.h>
#include <asm/arch/nand.h>
#include <asm/arch/fb.h>
@@ -224,7 +225,9 @@ static void __init rx3715_init_irq(void)
static void __init rx3715_init_machine(void)
{
+ memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
s3c2410_pm_init();
+
s3c24xx_fb_set_platdata(&rx3715_lcdcfg);
}
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index a0d7692cdb2..e2eda3937ab 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -41,6 +41,7 @@
#include <asm/arch/regs-serial.h>
#include <asm/arch/regs-gpio.h>
+#include <asm/arch/leds-gpio.h>
#include "clock.h"
#include "devs.h"
@@ -313,6 +314,50 @@ static struct platform_device vr1000_dm9k1 = {
}
};
+/* LEDS */
+
+static struct s3c24xx_led_platdata vr1000_led1_pdata = {
+ .name = "led1",
+ .gpio = S3C2410_GPB0,
+ .def_trigger = "",
+};
+
+static struct s3c24xx_led_platdata vr1000_led2_pdata = {
+ .name = "led2",
+ .gpio = S3C2410_GPB1,
+ .def_trigger = "",
+};
+
+static struct s3c24xx_led_platdata vr1000_led3_pdata = {
+ .name = "led3",
+ .gpio = S3C2410_GPB2,
+ .def_trigger = "",
+};
+
+static struct platform_device vr1000_led1 = {
+ .name = "s3c24xx_led",
+ .id = 1,
+ .dev = {
+ .platform_data = &vr1000_led1_pdata,
+ },
+};
+
+static struct platform_device vr1000_led2 = {
+ .name = "s3c24xx_led",
+ .id = 2,
+ .dev = {
+ .platform_data = &vr1000_led2_pdata,
+ },
+};
+
+static struct platform_device vr1000_led3 = {
+ .name = "s3c24xx_led",
+ .id = 1,
+ .dev = {
+ .platform_data = &vr1000_led3_pdata,
+ },
+};
+
/* devices for this board */
static struct platform_device *vr1000_devices[] __initdata = {
@@ -325,7 +370,10 @@ static struct platform_device *vr1000_devices[] __initdata = {
&serial_device,
&vr1000_nor,
&vr1000_dm9k0,
- &vr1000_dm9k1
+ &vr1000_dm9k1,
+ &vr1000_led1,
+ &vr1000_led2,
+ &vr1000_led3,
};
static struct clk *vr1000_clocks[] = {
diff --git a/arch/arm/mach-s3c2410/pm-h1940.S b/arch/arm/mach-s3c2410/pm-h1940.S
new file mode 100644
index 00000000000..7d66de7ff7d
--- /dev/null
+++ b/arch/arm/mach-s3c2410/pm-h1940.S
@@ -0,0 +1,33 @@
+/* linux/arch/arm/mach-s3c2410/pm-h1940.S
+ *
+ * Copyright (c) 2006 Ben Dooks <ben-linux@fluff.org>
+ *
+ * H1940 Suspend to RAM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <asm/hardware.h>
+#include <asm/arch/map.h>
+
+#include <asm/arch/regs-gpio.h>
+
+ .text
+ .global h1940_pm_return
+
+h1940_pm_return:
+ mov r0, #S3C2410_PA_GPIO
+ ldr pc, [ r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO ]
diff --git a/arch/arm/mach-s3c2410/s3c2410-pm.c b/arch/arm/mach-s3c2410/s3c2410-pm.c
index e51d7666951..77c6814c0f0 100644
--- a/arch/arm/mach-s3c2410/s3c2410-pm.c
+++ b/arch/arm/mach-s3c2410/s3c2410-pm.c
@@ -32,6 +32,7 @@
#include <asm/mach-types.h>
#include <asm/arch/regs-gpio.h>
+#include <asm/arch/h1940.h>
#include "cpu.h"
#include "pm.h"
@@ -52,6 +53,35 @@ static void s3c2410_pm_prepare(void)
DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
+ if (machine_is_h1940()) {
+ void *base = phys_to_virt(H1940_SUSPEND_CHECK);
+ unsigned long ptr;
+ unsigned long calc = 0;
+
+ /* generate check for the bootloader to check on resume */
+
+ for (ptr = 0; ptr < 0x40000; ptr += 0x400)
+ calc += __raw_readl(base+ptr);
+
+ __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
+ }
+
+ /* the RX3715 uses similar code and the same H1940 and the
+ * same offsets for resume and checksum pointers */
+
+ if (machine_is_rx3715()) {
+ void *base = phys_to_virt(H1940_SUSPEND_CHECK);
+ unsigned long ptr;
+ unsigned long calc = 0;
+
+ /* generate check for the bootloader to check on resume */
+
+ for (ptr = 0; ptr < 0x40000; ptr += 0x4)
+ calc += __raw_readl(base+ptr);
+
+ __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
+ }
+
if ( machine_is_aml_m5900() )
s3c2410_gpio_setpin(S3C2410_GPF2, 1);
diff --git a/arch/arm/mach-s3c2410/s3c2412-irq.c b/arch/arm/mach-s3c2410/s3c2412-irq.c
index 7f741547658..ffcc30b23a8 100644
--- a/arch/arm/mach-s3c2410/s3c2412-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2412-irq.c
@@ -98,7 +98,7 @@ s3c2412_irq_unmask(unsigned int irqno)
__raw_writel(mask & ~bitval, S3C2410_INTMSK);
}
-static struct irqchip s3c2412_irq_eint0t4 = {
+static struct irq_chip s3c2412_irq_eint0t4 = {
.ack = s3c2412_irq_ack,
.mask = s3c2412_irq_mask,
.unmask = s3c2412_irq_unmask,
@@ -112,7 +112,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
set_irq_chip(irqno, &s3c2412_irq_eint0t4);
- set_irq_handler(irqno, do_edge_IRQ);
+ set_irq_handler(irqno, handle_edge_irq);
set_irq_flags(irqno, IRQF_VALID);
}
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
index 39db0752d53..1ba19b27ab0 100644
--- a/arch/arm/mach-s3c2410/s3c2440-irq.c
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -42,10 +42,10 @@
/* WDT/AC97 */
static void s3c_irq_demux_wdtac97(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
unsigned int subsrc, submsk;
- struct irqdesc *mydesc;
+ struct irq_desc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
@@ -90,7 +90,7 @@ s3c_irq_wdtac97_ack(unsigned int irqno)
s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
}
-static struct irqchip s3c_irq_wdtac97 = {
+static struct irq_chip s3c_irq_wdtac97 = {
.mask = s3c_irq_wdtac97_mask,
.unmask = s3c_irq_wdtac97_unmask,
.ack = s3c_irq_wdtac97_ack,
@@ -105,12 +105,12 @@ static int s3c2440_irq_add(struct sys_device *sysdev)
/* add new chained handler for wdt, ac7 */
set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
- set_irq_handler(IRQ_WDT, do_level_IRQ);
+ set_irq_handler(IRQ_WDT, handle_level_irq);
set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
set_irq_chip(irqno, &s3c_irq_wdtac97);
- set_irq_handler(irqno, do_level_IRQ);
+ set_irq_handler(irqno, handle_level_irq);
set_irq_flags(irqno, IRQF_VALID);
}
diff --git a/arch/arm/mach-s3c2410/s3c244x-irq.c b/arch/arm/mach-s3c2410/s3c244x-irq.c
index 146f2109dd9..ede94636a72 100644
--- a/arch/arm/mach-s3c2410/s3c244x-irq.c
+++ b/arch/arm/mach-s3c2410/s3c244x-irq.c
@@ -42,10 +42,10 @@
/* camera irq */
static void s3c_irq_demux_cam(unsigned int irq,
- struct irqdesc *desc)
+ struct irq_desc *desc)
{
unsigned int subsrc, submsk;
- struct irqdesc *mydesc;
+ struct irq_desc *mydesc;
/* read the current pending interrupts, and the mask
* for what it is available */
@@ -89,7 +89,7 @@ s3c_irq_cam_ack(unsigned int irqno)
s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
}
-static struct irqchip s3c_irq_cam = {
+static struct irq_chip s3c_irq_cam = {
.mask = s3c_irq_cam_mask,
.unmask = s3c_irq_cam_unmask,
.ack = s3c_irq_cam_ack,
@@ -100,18 +100,18 @@ static int s3c244x_irq_add(struct sys_device *sysdev)
unsigned int irqno;
set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
- set_irq_handler(IRQ_NFCON, do_level_IRQ);
+ set_irq_handler(IRQ_NFCON, handle_level_irq);
set_irq_flags(IRQ_NFCON, IRQF_VALID);
/* add chained handler for camera */
set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
- set_irq_handler(IRQ_CAM, do_level_IRQ);
+ set_irq_handler(IRQ_CAM, handle_level_irq);
set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
set_irq_chip(irqno, &s3c_irq_cam);
- set_irq_handler(irqno, do_level_IRQ);
+ set_irq_handler(irqno, handle_level_irq);
set_irq_flags(irqno, IRQF_VALID);
}
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2024-12-22 04:35:32 +0000