diff options
Diffstat (limited to 'arch/arm/mach-pxa/include')
65 files changed, 8984 insertions, 0 deletions
diff --git a/arch/arm/mach-pxa/include/mach/akita.h b/arch/arm/mach-pxa/include/mach/akita.h new file mode 100644 index 00000000000..5d8cc1d9cb1 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/akita.h @@ -0,0 +1,32 @@ +/* + * Hardware specific definitions for SL-C1000 (Akita) + * + * Copyright (c) 2005 Richard Purdie + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/* Akita IO Expander GPIOs */ + +#define AKITA_IOEXP_RESERVED_7 (1 << 7) +#define AKITA_IOEXP_IR_ON (1 << 6) +#define AKITA_IOEXP_AKIN_PULLUP (1 << 5) +#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4) +#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3) +#define AKITA_IOEXP_MIC_BIAS (1 << 2) +#define AKITA_IOEXP_RESERVED_1 (1 << 1) +#define AKITA_IOEXP_RESERVED_0 (1 << 0) + +/* Direction Bitfield 0=output 1=input */ +#define AKITA_IOEXP_IO_DIR 0 +/* Default Values */ +#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP) + +extern struct platform_device akitaioexp_device; + +void akita_set_ioexp(struct device *dev, unsigned char bitmask); +void akita_reset_ioexp(struct device *dev, unsigned char bitmask); + diff --git a/arch/arm/mach-pxa/include/mach/audio.h b/arch/arm/mach-pxa/include/mach/audio.h new file mode 100644 index 00000000000..f82f96dd105 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/audio.h @@ -0,0 +1,17 @@ +#ifndef __ASM_ARCH_AUDIO_H__ +#define __ASM_ARCH_AUDIO_H__ + +#include <sound/core.h> +#include <sound/pcm.h> + +typedef struct { + int (*startup)(struct snd_pcm_substream *, void *); + void (*shutdown)(struct snd_pcm_substream *, void *); + void (*suspend)(void *); + void (*resume)(void *); + void *priv; +} pxa2xx_audio_ops_t; + +extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops); + +#endif diff --git a/arch/arm/mach-pxa/include/mach/bitfield.h b/arch/arm/mach-pxa/include/mach/bitfield.h new file mode 100644 index 00000000000..f1f0e3387d9 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/bitfield.h @@ -0,0 +1,113 @@ +/* + * FILE bitfield.h + * + * Version 1.1 + * Author Copyright (c) Marc A. Viredaz, 1998 + * DEC Western Research Laboratory, Palo Alto, CA + * Date April 1998 (April 1997) + * System Advanced RISC Machine (ARM) + * Language C or ARM Assembly + * Purpose Definition of macros to operate on bit fields. + */ + + + +#ifndef __BITFIELD_H +#define __BITFIELD_H + +#ifndef __ASSEMBLY__ +#define UData(Data) ((unsigned long) (Data)) +#else +#define UData(Data) (Data) +#endif + + +/* + * MACRO: Fld + * + * Purpose + * The macro "Fld" encodes a bit field, given its size and its shift value + * with respect to bit 0. + * + * Note + * A more intuitive way to encode bit fields would have been to use their + * mask. However, extracting size and shift value information from a bit + * field's mask is cumbersome and might break the assembler (255-character + * line-size limit). + * + * Input + * Size Size of the bit field, in number of bits. + * Shft Shift value of the bit field with respect to bit 0. + * + * Output + * Fld Encoded bit field. + */ + +#define Fld(Size, Shft) (((Size) << 16) + (Shft)) + + +/* + * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit + * + * Purpose + * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return + * the size, shift value, mask, aligned mask, and first bit of a + * bit field. + * + * Input + * Field Encoded bit field (using the macro "Fld"). + * + * Output + * FSize Size of the bit field, in number of bits. + * FShft Shift value of the bit field with respect to bit 0. + * FMsk Mask for the bit field. + * FAlnMsk Mask for the bit field, aligned on bit 0. + * F1stBit First bit of the bit field. + */ + +#define FSize(Field) ((Field) >> 16) +#define FShft(Field) ((Field) & 0x0000FFFF) +#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) +#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) +#define F1stBit(Field) (UData (1) << FShft (Field)) + + +/* + * MACRO: FInsrt + * + * Purpose + * The macro "FInsrt" inserts a value into a bit field by shifting the + * former appropriately. + * + * Input + * Value Bit-field value. + * Field Encoded bit field (using the macro "Fld"). + * + * Output + * FInsrt Bit-field value positioned appropriately. + */ + +#define FInsrt(Value, Field) \ + (UData (Value) << FShft (Field)) + + +/* + * MACRO: FExtr + * + * Purpose + * The macro "FExtr" extracts the value of a bit field by masking and + * shifting it appropriately. + * + * Input + * Data Data containing the bit-field to be extracted. + * Field Encoded bit field (using the macro "Fld"). + * + * Output + * FExtr Bit-field value. + */ + +#define FExtr(Data, Field) \ + ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) + + +#endif /* __BITFIELD_H */ diff --git a/arch/arm/mach-pxa/include/mach/camera.h b/arch/arm/mach-pxa/include/mach/camera.h new file mode 100644 index 00000000000..39516ced8b1 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/camera.h @@ -0,0 +1,48 @@ +/* + camera.h - PXA camera driver header file + + Copyright (C) 2003, Intel Corporation + Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +*/ + +#ifndef __ASM_ARCH_CAMERA_H_ +#define __ASM_ARCH_CAMERA_H_ + +#define PXA_CAMERA_MASTER 1 +#define PXA_CAMERA_DATAWIDTH_4 2 +#define PXA_CAMERA_DATAWIDTH_5 4 +#define PXA_CAMERA_DATAWIDTH_8 8 +#define PXA_CAMERA_DATAWIDTH_9 0x10 +#define PXA_CAMERA_DATAWIDTH_10 0x20 +#define PXA_CAMERA_PCLK_EN 0x40 +#define PXA_CAMERA_MCLK_EN 0x80 +#define PXA_CAMERA_PCP 0x100 +#define PXA_CAMERA_HSP 0x200 +#define PXA_CAMERA_VSP 0x400 + +struct pxacamera_platform_data { + int (*init)(struct device *); + int (*power)(struct device *, int); + int (*reset)(struct device *, int); + + unsigned long flags; + unsigned long mclk_10khz; +}; + +extern void pxa_set_camera_info(struct pxacamera_platform_data *); + +#endif /* __ASM_ARCH_CAMERA_H_ */ diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h new file mode 100644 index 00000000000..2ae373fb567 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/colibri.h @@ -0,0 +1,19 @@ +#ifndef _COLIBRI_H_ +#define _COLIBRI_H_ + +/* physical memory regions */ +#define COLIBRI_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ +#define COLIBRI_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ +#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */ + +/* virtual memory regions */ +#define COLIBRI_DISK_VIRT 0xF0000000 /* Disk On Chip region */ + +/* size of flash */ +#define COLIBRI_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ + +/* Ethernet Controller Davicom DM9000 */ +#define GPIO_DM9000 114 +#define COLIBRI_ETH_IRQ IRQ_GPIO(GPIO_DM9000) + +#endif /* _COLIBRI_H_ */ diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h new file mode 100644 index 00000000000..bf856503baf --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/corgi.h @@ -0,0 +1,109 @@ +/* + * Hardware specific definitions for SL-C7xx series of PDAs + * + * Copyright (c) 2004-2005 Richard Purdie + * + * Based on Sharp's 2.4 kernel patches + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#ifndef __ASM_ARCH_CORGI_H +#define __ASM_ARCH_CORGI_H 1 + + +/* + * Corgi (Non Standard) GPIO Definitions + */ +#define CORGI_GPIO_KEY_INT (0) /* Keyboard Interrupt */ +#define CORGI_GPIO_AC_IN (1) /* Charger Detection */ +#define CORGI_GPIO_WAKEUP (3) /* System wakeup notification? */ +#define CORGI_GPIO_AK_INT (4) /* Headphone Jack Control Interrupt */ +#define CORGI_GPIO_TP_INT (5) /* Touch Panel Interrupt */ +#define CORGI_GPIO_nSD_WP (7) /* SD Write Protect? */ +#define CORGI_GPIO_nSD_DETECT (9) /* MMC/SD Card Detect */ +#define CORGI_GPIO_nSD_INT (10) /* SD Interrupt for SDIO? */ +#define CORGI_GPIO_MAIN_BAT_LOW (11) /* Main Battery Low Notification */ +#define CORGI_GPIO_BAT_COVER (11) /* Battery Cover Detect */ +#define CORGI_GPIO_LED_ORANGE (13) /* Orange LED Control */ +#define CORGI_GPIO_CF_CD (14) /* Compact Flash Card Detect */ +#define CORGI_GPIO_CHRG_FULL (16) /* Charging Complete Notification */ +#define CORGI_GPIO_CF_IRQ (17) /* Compact Flash Interrupt */ +#define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */ +#define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */ +#define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */ +#define CORGI_GPIO_IR_ON (22) /* Enable IR Transciever */ +#define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */ +#define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */ +#define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */ +#define CORGI_GPIO_DISCHARGE_ON (42) /* Enable battery Discharge */ +#define CORGI_GPIO_CHRG_UKN (43) /* Unknown Charging (Bypass Control?) */ +#define CORGI_GPIO_HSYNC (44) /* LCD HSync Pulse */ +#define CORGI_GPIO_USB_PULLUP (45) /* USB show presence to host */ + + +/* + * Corgi Keyboard Definitions + */ +#define CORGI_KEY_STROBE_NUM (12) +#define CORGI_KEY_SENSE_NUM (8) +#define CORGI_GPIO_ALL_STROBE_BIT (0x00003ffc) +#define CORGI_GPIO_HIGH_SENSE_BIT (0xfc000000) +#define CORGI_GPIO_HIGH_SENSE_RSHIFT (26) +#define CORGI_GPIO_LOW_SENSE_BIT (0x00000003) +#define CORGI_GPIO_LOW_SENSE_LSHIFT (6) +#define CORGI_GPIO_STROBE_BIT(a) GPIO_bit(66+(a)) +#define CORGI_GPIO_SENSE_BIT(a) GPIO_bit(58+(a)) +#define CORGI_GAFR_ALL_STROBE_BIT (0x0ffffff0) +#define CORGI_GAFR_HIGH_SENSE_BIT (0xfff00000) +#define CORGI_GAFR_LOW_SENSE_BIT (0x0000000f) +#define CORGI_GPIO_KEY_SENSE(a) (58+(a)) +#define CORGI_GPIO_KEY_STROBE(a) (66+(a)) + + +/* + * Corgi Interrupts + */ +#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) +#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) +#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) +#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) +#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) +#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) +#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) +#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) +#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) +#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ +#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) +#define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ + + +/* + * Corgi SCOOP GPIOs and Config + */ +#define CORGI_SCP_LED_GREEN SCOOP_GPCR_PA11 +#define CORGI_SCP_SWA SCOOP_GPCR_PA12 /* Hinge Switch A */ +#define CORGI_SCP_SWB SCOOP_GPCR_PA13 /* Hinge Switch B */ +#define CORGI_SCP_MUTE_L SCOOP_GPCR_PA14 +#define CORGI_SCP_MUTE_R SCOOP_GPCR_PA15 +#define CORGI_SCP_AKIN_PULLUP SCOOP_GPCR_PA16 +#define CORGI_SCP_APM_ON SCOOP_GPCR_PA17 +#define CORGI_SCP_BACKLIGHT_CONT SCOOP_GPCR_PA18 +#define CORGI_SCP_MIC_BIAS SCOOP_GPCR_PA19 + +#define CORGI_SCOOP_IO_DIR ( CORGI_SCP_LED_GREEN | CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R | \ + CORGI_SCP_AKIN_PULLUP | CORGI_SCP_APM_ON | CORGI_SCP_BACKLIGHT_CONT | \ + CORGI_SCP_MIC_BIAS ) +#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) + + +/* + * Shared data structures + */ +extern struct platform_device corgiscoop_device; +extern struct platform_device corgissp_device; + +#endif /* __ASM_ARCH_CORGI_H */ + diff --git a/arch/arm/mach-pxa/include/mach/debug-macro.S b/arch/arm/mach-pxa/include/mach/debug-macro.S new file mode 100644 index 00000000000..55d6a175ab1 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/debug-macro.S @@ -0,0 +1,25 @@ +/* arch/arm/mach-pxa/include/mach/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include "hardware.h" + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x40000000 @ physical + movne \rx, #io_p2v(0x40000000) @ virtual + orr \rx, \rx, #0x00100000 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h new file mode 100644 index 00000000000..955bfe60606 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/dma.h @@ -0,0 +1,50 @@ +/* + * arch/arm/mach-pxa/include/mach/dma.h + * + * Author: Nicolas Pitre + * Created: Jun 15, 2001 + * Copyright: MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* + * Descriptor structure for PXA's DMA engine + * Note: this structure must always be aligned to a 16-byte boundary. + */ + +typedef struct pxa_dma_desc { + volatile u32 ddadr; /* Points to the next descriptor + flags */ + volatile u32 dsadr; /* DSADR value for the current transfer */ + volatile u32 dtadr; /* DTADR value for the current transfer */ + volatile u32 dcmd; /* DCMD value for the current transfer */ +} pxa_dma_desc; + +typedef enum { + DMA_PRIO_HIGH = 0, + DMA_PRIO_MEDIUM = 1, + DMA_PRIO_LOW = 2 +} pxa_dma_prio; + +#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) +#define HAVE_ARCH_PCI_SET_DMA_MASK 1 +#endif + +/* + * DMA registration + */ + +int __init pxa_init_dma(int num_ch); + +int pxa_request_dma (char *name, + pxa_dma_prio prio, + void (*irq_handler)(int, void *), + void *data); + +void pxa_free_dma (int dma_ch); + +#endif /* _ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S new file mode 100644 index 00000000000..de16c12d523 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/entry-macro.S @@ -0,0 +1,57 @@ +/* + * arch/arm/mach-pxa/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for PXA-based platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <mach/hardware.h> +#include <mach/irqs.h> + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mrc p15, 0, \tmp, c0, c0, 0 @ CPUID + mov \tmp, \tmp, lsr #13 + and \tmp, \tmp, #0x7 @ Core G + cmp \tmp, #1 + bhi 1004f + + mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 + add \base, \base, #0x00d00000 + ldr \irqstat, [\base, #0] @ ICIP + ldr \irqnr, [\base, #4] @ ICMR + b 1002f + +1004: + mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 + mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 + ands \irqnr, \irqstat, \irqnr + beq 1003f + rsb \irqstat, \irqnr, #0 + and \irqstat, \irqstat, \irqnr + clz \irqnr, \irqstat + rsb \irqnr, \irqnr, #31 + add \irqnr, \irqnr, #32 + b 1001f +1003: + mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP + mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR +1002: + ands \irqnr, \irqstat, \irqnr + beq 1001f + rsb \irqstat, \irqnr, #0 + and \irqstat, \irqstat, \irqnr + clz \irqnr, \irqstat + rsb \irqnr, \irqnr, #31 +1001: + .endm diff --git a/arch/arm/mach-pxa/include/mach/eseries-gpio.h b/arch/arm/mach-pxa/include/mach/eseries-gpio.h new file mode 100644 index 00000000000..4c90b131027 --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/eseries-gpio.h @@ -0,0 +1,50 @@ +/* + * eseries-gpio.h + * + * Copyright (C) Ian Molton <spyro@f2s.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/* e-series power button */ +#define GPIO_ESERIES_POWERBTN 0 + +/* UDC GPIO definitions */ +#define GPIO_E7XX_USB_DISC 13 +#define GPIO_E7XX_USB_PULLUP 3 + +#define GPIO_E800_USB_DISC 4 +#define GPIO_E800_USB_PULLUP 84 + +/* e740 PCMCIA GPIO definitions */ +/* Note: PWR1 seems to be inverted */ +#define GPIO_E740_PCMCIA_CD0 8 +#define GPIO_E740_PCMCIA_CD1 44 +#define GPIO_E740_PCMCIA_RDY0 11 +#define GPIO_E740_PCMCIA_RDY1 6 +#define GPIO_E740_PCMCIA_RST0 27 +#define GPIO_E740_PCMCIA_RST1 24 +#define GPIO_E740_PCMCIA_PWR0 20 +#define GPIO_E740_PCMCIA_PWR1 23 + +/* e750 PCMCIA GPIO definitions */ +#define GPIO_E750_PCMCIA_CD0 8 +#define GPIO_E750_PCMCIA_RDY0 12 +#define GPIO_E750_PCMCIA_RST0 27 +#define GPIO_E750_PCMCIA_PWR0 20 + +/* e800 PCMCIA GPIO definitions */ |