diff options
Diffstat (limited to 'arch/arm/mach-omap2/clockdomains.h')
| -rw-r--r-- | arch/arm/mach-omap2/clockdomains.h | 118 |
1 files changed, 89 insertions, 29 deletions
diff --git a/arch/arm/mach-omap2/clockdomains.h b/arch/arm/mach-omap2/clockdomains.h index cd86dcc7b42..281d5da1918 100644 --- a/arch/arm/mach-omap2/clockdomains.h +++ b/arch/arm/mach-omap2/clockdomains.h @@ -14,12 +14,29 @@ /* * OMAP2/3-common clockdomains + * + * Even though the 2420 has a single PRCM module from the + * interconnect's perspective, internally it does appear to have + * separate PRM and CM clockdomains. The usual test case is + * sys_clkout/sys_clkout2. */ /* This is an implicit clockdomain - it is never defined as such in TRM */ static struct clockdomain wkup_clkdm = { .name = "wkup_clkdm", - .pwrdm_name = "wkup_pwrdm", + .pwrdm = { .name = "wkup_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), +}; + +static struct clockdomain prm_clkdm = { + .name = "prm_clkdm", + .pwrdm = { .name = "wkup_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), +}; + +static struct clockdomain cm_clkdm = { + .name = "cm_clkdm", + .pwrdm = { .name = "core_pwrdm" }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), }; @@ -31,7 +48,7 @@ static struct clockdomain wkup_clkdm = { static struct clockdomain mpu_2420_clkdm = { .name = "mpu_clkdm", - .pwrdm_name = "mpu_pwrdm", + .pwrdm = { .name = "mpu_pwrdm" }, .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), @@ -39,7 +56,7 @@ static struct clockdomain mpu_2420_clkdm = { static struct clockdomain iva1_2420_clkdm = { .name = "iva1_clkdm", - .pwrdm_name = "dsp_pwrdm", + .pwrdm = { .name = "dsp_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), @@ -56,7 +73,7 @@ static struct clockdomain iva1_2420_clkdm = { static struct clockdomain mpu_2430_clkdm = { .name = "mpu_clkdm", - .pwrdm_name = "mpu_pwrdm", + .pwrdm = { .name = "mpu_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), @@ -64,7 +81,7 @@ static struct clockdomain mpu_2430_clkdm = { static struct clockdomain mdm_clkdm = { .name = "mdm_clkdm", - .pwrdm_name = "mdm_pwrdm", + .pwrdm = { .name = "mdm_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), @@ -81,7 +98,7 @@ static struct clockdomain mdm_clkdm = { static struct clockdomain dsp_clkdm = { .name = "dsp_clkdm", - .pwrdm_name = "dsp_pwrdm", + .pwrdm = { .name = "dsp_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -89,7 +106,7 @@ static struct clockdomain dsp_clkdm = { static struct clockdomain gfx_24xx_clkdm = { .name = "gfx_clkdm", - .pwrdm_name = "gfx_pwrdm", + .pwrdm = { .name = "gfx_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -97,7 +114,7 @@ static struct clockdomain gfx_24xx_clkdm = { static struct clockdomain core_l3_24xx_clkdm = { .name = "core_l3_clkdm", - .pwrdm_name = "core_pwrdm", + .pwrdm = { .name = "core_pwrdm" }, .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -105,7 +122,7 @@ static struct clockdomain core_l3_24xx_clkdm = { static struct clockdomain core_l4_24xx_clkdm = { .name = "core_l4_clkdm", - .pwrdm_name = "core_pwrdm", + .pwrdm = { .name = "core_pwrdm" }, .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -113,7 +130,7 @@ static struct clockdomain core_l4_24xx_clkdm = { static struct clockdomain dss_24xx_clkdm = { .name = "dss_clkdm", - .pwrdm_name = "core_pwrdm", + .pwrdm = { .name = "core_pwrdm" }, .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -130,7 +147,7 @@ static struct clockdomain dss_24xx_clkdm = { static struct clockdomain mpu_34xx_clkdm = { .name = "mpu_clkdm", - .pwrdm_name = "mpu_pwrdm", + .pwrdm = { .name = "mpu_pwrdm" }, .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -138,7 +155,7 @@ static struct clockdomain mpu_34xx_clkdm = { static struct clockdomain neon_clkdm = { .name = "neon_clkdm", - .pwrdm_name = "neon_pwrdm", + .pwrdm = { .name = "neon_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -146,7 +163,7 @@ static struct clockdomain neon_clkdm = { static struct clockdomain iva2_clkdm = { .name = "iva2_clkdm", - .pwrdm_name = "iva2_pwrdm", + .pwrdm = { .name = "iva2_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -154,7 +171,7 @@ static struct clockdomain iva2_clkdm = { static struct clockdomain gfx_3430es1_clkdm = { .name = "gfx_clkdm", - .pwrdm_name = "gfx_pwrdm", + .pwrdm = { .name = "gfx_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), @@ -162,10 +179,10 @@ static struct clockdomain gfx_3430es1_clkdm = { static struct clockdomain sgx_clkdm = { .name = "sgx_clkdm", - .pwrdm_name = "sgx_pwrdm", + .pwrdm = { .name = "sgx_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), + .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), }; /* @@ -177,7 +194,7 @@ static struct clockdomain sgx_clkdm = { */ static struct clockdomain d2d_clkdm = { .name = "d2d_clkdm", - .pwrdm_name = "core_pwrdm", + .pwrdm = { .name = "core_pwrdm" }, .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -185,7 +202,7 @@ static struct clockdomain d2d_clkdm = { static struct clockdomain core_l3_34xx_clkdm = { .name = "core_l3_clkdm", - .pwrdm_name = "core_pwrdm", + .pwrdm = { .name = "core_pwrdm" }, .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -193,7 +210,7 @@ static struct clockdomain core_l3_34xx_clkdm = { static struct clockdomain core_l4_34xx_clkdm = { .name = "core_l4_clkdm", - .pwrdm_name = "core_pwrdm", + .pwrdm = { .name = "core_pwrdm" }, .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -201,7 +218,7 @@ static struct clockdomain core_l4_34xx_clkdm = { static struct clockdomain dss_34xx_clkdm = { .name = "dss_clkdm", - .pwrdm_name = "dss_pwrdm", + .pwrdm = { .name = "dss_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -209,7 +226,7 @@ static struct clockdomain dss_34xx_clkdm = { static struct clockdomain cam_clkdm = { .name = "cam_clkdm", - .pwrdm_name = "cam_pwrdm", + .pwrdm = { .name = "cam_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -217,28 +234,62 @@ static struct clockdomain cam_clkdm = { static struct clockdomain usbhost_clkdm = { .name = "usbhost_clkdm", - .pwrdm_name = "usbhost_pwrdm", + .pwrdm = { .name = "usbhost_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), + .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), }; static struct clockdomain per_clkdm = { .name = "per_clkdm", - .pwrdm_name = "per_pwrdm", + .pwrdm = { .name = "per_pwrdm" }, .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; +/* + * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is + * switched of even if sdti is in use + */ static struct clockdomain emu_clkdm = { .name = "emu_clkdm", - .pwrdm_name = "emu_pwrdm", - .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP, + .pwrdm = { .name = "emu_pwrdm" }, + .flags = /* CLKDM_CAN_ENABLE_AUTO | */CLKDM_CAN_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; +static struct clockdomain dpll1_clkdm = { + .name = "dpll1_clkdm", + .pwrdm = { .name = "dpll1_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain dpll2_clkdm = { + .name = "dpll2_clkdm", + .pwrdm = { .name = "dpll2_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain dpll3_clkdm = { + .name = "dpll3_clkdm", + .pwrdm = { .name = "dpll3_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain dpll4_clkdm = { + .name = "dpll4_clkdm", + .pwrdm = { .name = "dpll4_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), +}; + +static struct clockdomain dpll5_clkdm = { + .name = "dpll5_clkdm", + .pwrdm = { .name = "dpll5_pwrdm" }, + .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), +}; + #endif /* CONFIG_ARCH_OMAP34XX */ /* @@ -247,14 +298,16 @@ static struct clockdomain emu_clkdm = { static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { { - .pwrdm_name = "mpu_pwrdm", + .pwrdm = { .name = "mpu_pwrdm" }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }, { - .pwrdm_name = "iva2_pwrdm", + .pwrdm = { .name = "iva2_pwrdm" }, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }, - { NULL } + { + .pwrdm = { .name = NULL }, + } }; /* @@ -264,6 +317,8 @@ static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { static struct clockdomain *clockdomains_omap[] = { &wkup_clkdm, + &cm_clkdm, + &prm_clkdm, #ifdef CONFIG_ARCH_OMAP2420 &mpu_2420_clkdm, @@ -297,6 +352,11 @@ static struct clockdomain *clockdomains_omap[] = { &usbhost_clkdm, &per_clkdm, &emu_clkdm, + &dpll1_clkdm, + &dpll2_clkdm, + &dpll3_clkdm, + &dpll4_clkdm, + &dpll5_clkdm, #endif NULL, |