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-rw-r--r--arch/arm/include/asm/hardware/entry-macro-gic.S7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
index 05587f125a1..c115b82fe80 100644
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ b/arch/arm/include/asm/hardware/entry-macro-gic.S
@@ -10,6 +10,13 @@
#include <asm/hardware/gic.h>
+#ifndef HAVE_GET_IRQNR_PREAMBLE
+ .macro get_irqnr_preamble, base, tmp
+ ldr \base, =gic_cpu_base_addr
+ ldr \base, [\base]
+ .endm
+#endif
+
/*
* The interrupt numbering scheme is defined in the
* interrupt controller spec. To wit: