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path: root/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
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Diffstat (limited to 'Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt1628
1 files changed, 1628 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
new file mode 100644
index 00000000000..82b43f91585
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
@@ -0,0 +1,1628 @@
+* Freescale IMX6Q IOMUX Controller
+
+Please refer to fsl,imx-pinctrl.txt in this directory for common binding part
+and usage.
+
+Required properties:
+- compatible: "fsl,imx6q-iomuxc"
+- fsl,pins: two integers array, represents a group of pins mux and config
+ setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a
+ pin working on a specific function, CONFIG is the pad setting value like
+ pull-up for this pin. Please refer to imx6q datasheet for the valid pad
+ config settings.
+
+CONFIG bits definition:
+PAD_CTL_HYS (1 << 16)
+PAD_CTL_PUS_100K_DOWN (0 << 14)
+PAD_CTL_PUS_47K_UP (1 << 14)
+PAD_CTL_PUS_100K_UP (2 << 14)
+PAD_CTL_PUS_22K_UP (3 << 14)
+PAD_CTL_PUE (1 << 13)
+PAD_CTL_PKE (1 << 12)
+PAD_CTL_ODE (1 << 11)
+PAD_CTL_SPEED_LOW (1 << 6)
+PAD_CTL_SPEED_MED (2 << 6)
+PAD_CTL_SPEED_HIGH (3 << 6)
+PAD_CTL_DSE_DISABLE (0 << 3)
+PAD_CTL_DSE_240ohm (1 << 3)
+PAD_CTL_DSE_120ohm (2 << 3)
+PAD_CTL_DSE_80ohm (3 << 3)
+PAD_CTL_DSE_60ohm (4 << 3)
+PAD_CTL_DSE_48ohm (5 << 3)
+PAD_CTL_DSE_40ohm (6 << 3)
+PAD_CTL_DSE_34ohm (7 << 3)
+PAD_CTL_SRE_FAST (1 << 0)
+PAD_CTL_SRE_SLOW (0 << 0)
+
+See below for available PIN_FUNC_ID for imx6q:
+MX6Q_PAD_SD2_DAT1__USDHC2_DAT1 0
+MX6Q_PAD_SD2_DAT1__ECSPI5_SS0 1
+MX6Q_PAD_SD2_DAT1__WEIM_WEIM_CS_2 2
+MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS 3
+MX6Q_PAD_SD2_DAT1__KPP_COL_7 4
+MX6Q_PAD_SD2_DAT1__GPIO_1_14 5
+MX6Q_PAD_SD2_DAT1__CCM_WAIT 6
+MX6Q_PAD_SD2_DAT1__ANATOP_TESTO_0 7
+MX6Q_PAD_SD2_DAT2__USDHC2_DAT2 8
+MX6Q_PAD_SD2_DAT2__ECSPI5_SS1 9
+MX6Q_PAD_SD2_DAT2__WEIM_WEIM_CS_3 10
+MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD 11
+MX6Q_PAD_SD2_DAT2__KPP_ROW_6 12
+MX6Q_PAD_SD2_DAT2__GPIO_1_13 13
+MX6Q_PAD_SD2_DAT2__CCM_STOP 14
+MX6Q_PAD_SD2_DAT2__ANATOP_TESTO_1 15
+MX6Q_PAD_SD2_DAT0__USDHC2_DAT0 16
+MX6Q_PAD_SD2_DAT0__ECSPI5_MISO 17
+MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD 18
+MX6Q_PAD_SD2_DAT0__KPP_ROW_7 19
+MX6Q_PAD_SD2_DAT0__GPIO_1_15 20
+MX6Q_PAD_SD2_DAT0__DCIC2_DCIC_OUT 21
+MX6Q_PAD_SD2_DAT0__TESTO_2 22
+MX6Q_PAD_RGMII_TXC__USBOH3_H2_DATA 23
+MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC 24
+MX6Q_PAD_RGMII_TXC__SPDIF_SPDIF_EXTCLK 25
+MX6Q_PAD_RGMII_TXC__GPIO_6_19 26
+MX6Q_PAD_RGMII_TXC__MIPI_CORE_DPHY_IN_0 27
+MX6Q_PAD_RGMII_TXC__ANATOP_24M_OUT 28
+MX6Q_PAD_RGMII_TD0__MIPI_HSI_CRL_TX_RDY 29
+MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 30
+MX6Q_PAD_RGMII_TD0__GPIO_6_20 31
+MX6Q_PAD_RGMII_TD0__MIPI_CORE_DPHY_IN_1 32
+MX6Q_PAD_RGMII_TD1__MIPI_HSI_CRL_RX_FLG 33
+MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 34
+MX6Q_PAD_RGMII_TD1__GPIO_6_21 35
+MX6Q_PAD_RGMII_TD1__MIPI_CORE_DPHY_IN_2 36
+MX6Q_PAD_RGMII_TD1__CCM_PLL3_BYP 37
+MX6Q_PAD_RGMII_TD2__MIPI_HSI_CRL_RX_DTA 38
+MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 39
+MX6Q_PAD_RGMII_TD2__GPIO_6_22 40
+MX6Q_PAD_RGMII_TD2__MIPI_CORE_DPHY_IN_3 41
+MX6Q_PAD_RGMII_TD2__CCM_PLL2_BYP 42
+MX6Q_PAD_RGMII_TD3__MIPI_HSI_CRL_RX_WAK 43
+MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 44
+MX6Q_PAD_RGMII_TD3__GPIO_6_23 45
+MX6Q_PAD_RGMII_TD3__MIPI_CORE_DPHY_IN_4 46
+MX6Q_PAD_RGMII_RX_CTL__USBOH3_H3_DATA 47
+MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 48
+MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24 49
+MX6Q_PAD_RGMII_RX_CTL__MIPI_DPHY_IN_5 50
+MX6Q_PAD_RGMII_RD0__MIPI_HSI_CRL_RX_RDY 51
+MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 52
+MX6Q_PAD_RGMII_RD0__GPIO_6_25 53
+MX6Q_PAD_RGMII_RD0__MIPI_CORE_DPHY_IN_6 54
+MX6Q_PAD_RGMII_TX_CTL__USBOH3_H2_STROBE 55
+MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 56
+MX6Q_PAD_RGMII_TX_CTL__GPIO_6_26 57
+MX6Q_PAD_RGMII_TX_CTL__CORE_DPHY_IN_7 58
+MX6Q_PAD_RGMII_TX_CTL__ANATOP_REF_OUT 59
+MX6Q_PAD_RGMII_RD1__MIPI_HSI_CTRL_TX_FL 60
+MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 61
+MX6Q_PAD_RGMII_RD1__GPIO_6_27 62
+MX6Q_PAD_RGMII_RD1__CORE_DPHY_TEST_IN_8 63
+MX6Q_PAD_RGMII_RD1__SJC_FAIL 64
+MX6Q_PAD_RGMII_RD2__MIPI_HSI_CRL_TX_DTA 65
+MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 66
+MX6Q_PAD_RGMII_RD2__GPIO_6_28 67
+MX6Q_PAD_RGMII_RD2__MIPI_CORE_DPHY_IN_9 68
+MX6Q_PAD_RGMII_RD3__MIPI_HSI_CRL_TX_WAK 69
+MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 70
+MX6Q_PAD_RGMII_RD3__GPIO_6_29 71
+MX6Q_PAD_RGMII_RD3__MIPI_CORE_DPHY_IN10 72
+MX6Q_PAD_RGMII_RXC__USBOH3_H3_STROBE 73
+MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC 74
+MX6Q_PAD_RGMII_RXC__GPIO_6_30 75
+MX6Q_PAD_RGMII_RXC__MIPI_CORE_DPHY_IN11 76
+MX6Q_PAD_EIM_A25__WEIM_WEIM_A_25 77
+MX6Q_PAD_EIM_A25__ECSPI4_SS1 78
+MX6Q_PAD_EIM_A25__ECSPI2_RDY 79
+MX6Q_PAD_EIM_A25__IPU1_DI1_PIN12 80
+MX6Q_PAD_EIM_A25__IPU1_DI0_D1_CS 81
+MX6Q_PAD_EIM_A25__GPIO_5_2 82
+MX6Q_PAD_EIM_A25__HDMI_TX_CEC_LINE 83
+MX6Q_PAD_EIM_A25__PL301_PER1_HBURST_0 84
+MX6Q_PAD_EIM_EB2__WEIM_WEIM_EB_2 85
+MX6Q_PAD_EIM_EB2__ECSPI1_SS0 86
+MX6Q_PAD_EIM_EB2__CCM_DI1_EXT_CLK 87
+MX6Q_PAD_EIM_EB2__IPU2_CSI1_D_19 88
+MX6Q_PAD_EIM_EB2__HDMI_TX_DDC_SCL 89
+MX6Q_PAD_EIM_EB2__GPIO_2_30 90
+MX6Q_PAD_EIM_EB2__I2C2_SCL 91
+MX6Q_PAD_EIM_EB2__SRC_BT_CFG_30 92
+MX6Q_PAD_EIM_D16__WEIM_WEIM_D_16 93
+MX6Q_PAD_EIM_D16__ECSPI1_SCLK 94
+MX6Q_PAD_EIM_D16__IPU1_DI0_PIN5 95
+MX6Q_PAD_EIM_D16__IPU2_CSI1_D_18 96
+MX6Q_PAD_EIM_D16__HDMI_TX_DDC_SDA 97
+MX6Q_PAD_EIM_D16__GPIO_3_16 98
+MX6Q_PAD_EIM_D16__I2C2_SDA 99
+MX6Q_PAD_EIM_D17__WEIM_WEIM_D_17 100
+MX6Q_PAD_EIM_D17__ECSPI1_MISO 101
+MX6Q_PAD_EIM_D17__IPU1_DI0_PIN6 102
+MX6Q_PAD_EIM_D17__IPU2_CSI1_PIXCLK 103
+MX6Q_PAD_EIM_D17__DCIC1_DCIC_OUT 104
+MX6Q_PAD_EIM_D17__GPIO_3_17 105
+MX6Q_PAD_EIM_D17__I2C3_SCL 106
+MX6Q_PAD_EIM_D17__PL301_PER1_HBURST_1 107
+MX6Q_PAD_EIM_D18__WEIM_WEIM_D_18 108
+MX6Q_PAD_EIM_D18__ECSPI1_MOSI 109
+MX6Q_PAD_EIM_D18__IPU1_DI0_PIN7 110
+MX6Q_PAD_EIM_D18__IPU2_CSI1_D_17 111
+MX6Q_PAD_EIM_D18__IPU1_DI1_D0_CS 112
+MX6Q_PAD_EIM_D18__GPIO_3_18 113
+MX6Q_PAD_EIM_D18__I2C3_SDA 114
+MX6Q_PAD_EIM_D18__PL301_PER1_HBURST_2 115
+MX6Q_PAD_EIM_D19__WEIM_WEIM_D_19 116
+MX6Q_PAD_EIM_D19__ECSPI1_SS1 117
+MX6Q_PAD_EIM_D19__IPU1_DI0_PIN8 118
+MX6Q_PAD_EIM_D19__IPU2_CSI1_D_16 119
+MX6Q_PAD_EIM_D19__UART1_CTS 120
+MX6Q_PAD_EIM_D19__GPIO_3_19 121
+MX6Q_PAD_EIM_D19__EPIT1_EPITO 122
+MX6Q_PAD_EIM_D19__PL301_PER1_HRESP 123
+MX6Q_PAD_EIM_D20__WEIM_WEIM_D_20 124
+MX6Q_PAD_EIM_D20__ECSPI4_SS0 125
+MX6Q_PAD_EIM_D20__IPU1_DI0_PIN16 126
+MX6Q_PAD_EIM_D20__IPU2_CSI1_D_15 127
+MX6Q_PAD_EIM_D20__UART1_RTS 128
+MX6Q_PAD_EIM_D20__GPIO_3_20 129
+MX6Q_PAD_EIM_D20__EPIT2_EPITO 130
+MX6Q_PAD_EIM_D21__WEIM_WEIM_D_21 131
+MX6Q_PAD_EIM_D21__ECSPI4_SCLK 132
+MX6Q_PAD_EIM_D21__IPU1_DI0_PIN17 133
+MX6Q_PAD_EIM_D21__IPU2_CSI1_D_11 134
+MX6Q_PAD_EIM_D21__USBOH3_USBOTG_OC 135
+MX6Q_PAD_EIM_D21__GPIO_3_21 136
+MX6Q_PAD_EIM_D21__I2C1_SCL 137
+MX6Q_PAD_EIM_D21__SPDIF_IN1 138
+MX6Q_PAD_EIM_D22__WEIM_WEIM_D_22 139
+MX6Q_PAD_EIM_D22__ECSPI4_MISO 140
+MX6Q_PAD_EIM_D22__IPU1_DI0_PIN1 141
+MX6Q_PAD_EIM_D22__IPU2_CSI1_D_10 142
+MX6Q_PAD_EIM_D22__USBOH3_USBOTG_PWR 143
+MX6Q_PAD_EIM_D22__GPIO_3_22 144
+MX6Q_PAD_EIM_D22__SPDIF_OUT1 145
+MX6Q_PAD_EIM_D22__PL301_PER1_HWRITE 146
+MX6Q_PAD_EIM_D23__WEIM_WEIM_D_23 147
+MX6Q_PAD_EIM_D23__IPU1_DI0_D0_CS 148
+MX6Q_PAD_EIM_D23__UART3_CTS 149
+MX6Q_PAD_EIM_D23__UART1_DCD 150
+MX6Q_PAD_EIM_D23__IPU2_CSI1_DATA_EN 151
+MX6Q_PAD_EIM_D23__GPIO_3_23 152
+MX6Q_PAD_EIM_D23__IPU1_DI1_PIN2 153
+MX6Q_PAD_EIM_D23__IPU1_DI1_PIN14 154
+MX6Q_PAD_EIM_EB3__WEIM_WEIM_EB_3 155
+MX6Q_PAD_EIM_EB3__ECSPI4_RDY 156
+MX6Q_PAD_EIM_EB3__UART3_RTS 157
+MX6Q_PAD_EIM_EB3__UART1_RI 158
+MX6Q_PAD_EIM_EB3__IPU2_CSI1_HSYNC 159
+MX6Q_PAD_EIM_EB3__GPIO_2_31 160
+MX6Q_PAD_EIM_EB3__IPU1_DI1_PIN3 161
+MX6Q_PAD_EIM_EB3__SRC_BT_CFG_31 162
+MX6Q_PAD_EIM_D24__WEIM_WEIM_D_24 163
+MX6Q_PAD_EIM_D24__ECSPI4_SS2 164
+MX6Q_PAD_EIM_D24__UART3_TXD 165
+MX6Q_PAD_EIM_D24__ECSPI1_SS2 166
+MX6Q_PAD_EIM_D24__ECSPI2_SS2 167
+MX6Q_PAD_EIM_D24__GPIO_3_24 168
+MX6Q_PAD_EIM_D24__AUDMUX_AUD5_RXFS 169
+MX6Q_PAD_EIM_D24__UART1_DTR 170
+MX6Q_PAD_EIM_D25__WEIM_WEIM_D_25 171
+MX6Q_PAD_EIM_D25__ECSPI4_SS3 172
+MX6Q_PAD_EIM_D25__UART3_RXD 173
+MX6Q_PAD_EIM_D25__ECSPI1_SS3 174
+MX6Q_PAD_EIM_D25__ECSPI2_SS3 175
+MX6Q_PAD_EIM_D25__GPIO_3_25 176
+MX6Q_PAD_EIM_D25__AUDMUX_AUD5_RXC 177
+MX6Q_PAD_EIM_D25__UART1_DSR 178
+MX6Q_PAD_EIM_D26__WEIM_WEIM_D_26 179
+MX6Q_PAD_EIM_D26__IPU1_DI1_PIN11 180
+MX6Q_PAD_EIM_D26__IPU1_CSI0_D_1 181
+MX6Q_PAD_EIM_D26__IPU2_CSI1_D_14 182
+MX6Q_PAD_EIM_D26__UART2_TXD 183
+MX6Q_PAD_EIM_D26__GPIO_3_26 184
+MX6Q_PAD_EIM_D26__IPU1_SISG_2 185
+MX6Q_PAD_EIM_D26__IPU1_DISP1_DAT_22 186
+MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27 187
+MX6Q_PAD_EIM_D27__IPU1_DI1_PIN13 188
+MX6Q_PAD_EIM_D27__IPU1_CSI0_D_0 189
+MX6Q_PAD_EIM_D27__IPU2_CSI1_D_13 190
+MX6Q_PAD_EIM_D27__UART2_RXD 191
+MX6Q_PAD_EIM_D27__GPIO_3_27 192
+MX6Q_PAD_EIM_D27__IPU1_SISG_3 193
+MX6Q_PAD_EIM_D27__IPU1_DISP1_DAT_23 194
+MX6Q_PAD_EIM_D28__WEIM_WEIM_D_28 195
+MX6Q_PAD_EIM_D28__I2C1_SDA 196
+MX6Q_PAD_EIM_D28__ECSPI4_MOSI 197
+MX6Q_PAD_EIM_D28__IPU2_CSI1_D_12 198
+MX6Q_PAD_EIM_D28__UART2_CTS 199
+MX6Q_PAD_EIM_D28__GPIO_3_28 200
+MX6Q_PAD_EIM_D28__IPU1_EXT_TRIG 201
+MX6Q_PAD_EIM_D28__IPU1_DI0_PIN13 202
+MX6Q_PAD_EIM_D29__WEIM_WEIM_D_29 203
+MX6Q_PAD_EIM_D29__IPU1_DI1_PIN15 204
+MX6Q_PAD_EIM_D29__ECSPI4_SS0 205
+MX6Q_PAD_EIM_D29__UART2_RTS 206
+MX6Q_PAD_EIM_D29__GPIO_3_29 207
+MX6Q_PAD_EIM_D29__IPU2_CSI1_VSYNC 208
+MX6Q_PAD_EIM_D29__IPU1_DI0_PIN14 209
+MX6Q_PAD_EIM_D30__WEIM_WEIM_D_30 210
+MX6Q_PAD_EIM_D30__IPU1_DISP1_DAT_21 211
+MX6Q_PAD_EIM_D30__IPU1_DI0_PIN11 212
+MX6Q_PAD_EIM_D30__IPU1_CSI0_D_3 213
+MX6Q_PAD_EIM_D30__UART3_CTS 214
+MX6Q_PAD_EIM_D30__GPIO_3_30 215
+MX6Q_PAD_EIM_D30__USBOH3_USBH1_OC 216
+MX6Q_PAD_EIM_D30__PL301_PER1_HPROT_0 217
+MX6Q_PAD_EIM_D31__WEIM_WEIM_D_31 218
+MX6Q_PAD_EIM_D31__IPU1_DISP1_DAT_20 219
+MX6Q_PAD_EIM_D31__IPU1_DI0_PIN12 220
+MX6Q_PAD_EIM_D31__IPU1_CSI0_D_2 221
+MX6Q_PAD_EIM_D31__UART3_RTS 222
+MX6Q_PAD_EIM_D31__GPIO_3_31 223
+MX6Q_PAD_EIM_D31__USBOH3_USBH1_PWR 224
+MX6Q_PAD_EIM_D31__PL301_PER1_HPROT_1 225
+MX6Q_PAD_EIM_A24__WEIM_WEIM_A_24 226
+MX6Q_PAD_EIM_A24__IPU1_DISP1_DAT_19 227
+MX6Q_PAD_EIM_A24__IPU2_CSI1_D_19 228
+MX6Q_PAD_EIM_A24__IPU2_SISG_2 229
+MX6Q_PAD_EIM_A24__IPU1_SISG_2 230
+MX6Q_PAD_EIM_A24__GPIO_5_4 231
+MX6Q_PAD_EIM_A24__PL301_PER1_HPROT_2 232
+MX6Q_PAD_EIM_A24__SRC_BT_CFG_24 233
+MX6Q_PAD_EIM_A23__WEIM_WEIM_A_23 234
+MX6Q_PAD_EIM_A23__IPU1_DISP1_DAT_18 235
+MX6Q_PAD_EIM_A23__IPU2_CSI1_D_18 236
+MX6Q_PAD_EIM_A23__IPU2_SISG_3 237
+MX6Q_PAD_EIM_A23__IPU1_SISG_3 238
+MX6Q_PAD_EIM_A23__GPIO_6_6 239
+MX6Q_PAD_EIM_A23__PL301_PER1_HPROT_3 240
+MX6Q_PAD_EIM_A23__SRC_BT_CFG_23 241
+MX6Q_PAD_EIM_A22__WEIM_WEIM_A_22 242
+MX6Q_PAD_EIM_A22__IPU1_DISP1_DAT_17 243
+MX6Q_PAD_EIM_A22__IPU2_CSI1_D_17 244
+MX6Q_PAD_EIM_A22__GPIO_2_16 245
+MX6Q_PAD_EIM_A22__TPSMP_HDATA_0 246
+MX6Q_PAD_EIM_A22__SRC_BT_CFG_22 247
+MX6Q_PAD_EIM_A21__WEIM_WEIM_A_21 248
+MX6Q_PAD_EIM_A21__IPU1_DISP1_DAT_16 249
+MX6Q_PAD_EIM_A21__IPU2_CSI1_D_16 250
+MX6Q_PAD_EIM_A21__RESERVED_RESERVED 251
+MX6Q_PAD_EIM_A21__MIPI_CORE_DPHY_OUT_18 252
+MX6Q_PAD_EIM_A21__GPIO_2_17 253
+MX6Q_PAD_EIM_A21__TPSMP_HDATA_1 254
+MX6Q_PAD_EIM_A21__SRC_BT_CFG_21 255
+MX6Q_PAD_EIM_A20__WEIM_WEIM_A_20 256
+MX6Q_PAD_EIM_A20__IPU1_DISP1_DAT_15 257
+MX6Q_PAD_EIM_A20__IPU2_CSI1_D_15 258
+MX6Q_PAD_EIM_A20__RESERVED_RESERVED 259
+MX6Q_PAD_EIM_A20__MIPI_CORE_DPHY_OUT_19 260
+MX6Q_PAD_EIM_A20__GPIO_2_18 261
+MX6Q_PAD_EIM_A20__TPSMP_HDATA_2 262
+MX6Q_PAD_EIM_A20__SRC_BT_CFG_20 263
+MX6Q_PAD_EIM_A19__WEIM_WEIM_A_19 264
+MX6Q_PAD_EIM_A19__IPU1_DISP1_DAT_14 265
+MX6Q_PAD_EIM_A19__IPU2_CSI1_D_14 266
+MX6Q_PAD_EIM_A19__RESERVED_RESERVED 267
+MX6Q_PAD_EIM_A19__MIPI_CORE_DPHY_OUT_20 268
+MX6Q_PAD_EIM_A19__GPIO_2_19 269
+MX6Q_PAD_EIM_A19__TPSMP_HDATA_3 270
+MX6Q_PAD_EIM_A19__SRC_BT_CFG_19 271
+MX6Q_PAD_EIM_A18__WEIM_WEIM_A_18 272
+MX6Q_PAD_EIM_A18__IPU1_DISP1_DAT_13 273
+MX6Q_PAD_EIM_A18__IPU2_CSI1_D_13 274
+MX6Q_PAD_EIM_A18__RESERVED_RESERVED 275
+MX6Q_PAD_EIM_A18__MIPI_CORE_DPHY_OUT_21 276
+MX6Q_PAD_EIM_A18__GPIO_2_20 277
+MX6Q_PAD_EIM_A18__TPSMP_HDATA_4 278
+MX6Q_PAD_EIM_A18__SRC_BT_CFG_18 279
+MX6Q_PAD_EIM_A17__WEIM_WEIM_A_17 280
+MX6Q_PAD_EIM_A17__IPU1_DISP1_DAT_12 281
+MX6Q_PAD_EIM_A17__IPU2_CSI1_D_12 282
+MX6Q_PAD_EIM_A17__RESERVED_RESERVED 283
+MX6Q_PAD_EIM_A17__MIPI_CORE_DPHY_OUT_22 284
+MX6Q_PAD_EIM_A17__GPIO_2_21 285
+MX6Q_PAD_EIM_A17__TPSMP_HDATA_5 286
+MX6Q_PAD_EIM_A17__SRC_BT_CFG_17 287
+MX6Q_PAD_EIM_A16__WEIM_WEIM_A_16 288
+MX6Q_PAD_EIM_A16__IPU1_DI1_DISP_CLK 289
+MX6Q_PAD_EIM_A16__IPU2_CSI1_PIXCLK 290
+MX6Q_PAD_EIM_A16__MIPI_CORE_DPHY_OUT_23 291
+MX6Q_PAD_EIM_A16__GPIO_2_22 292
+MX6Q_PAD_EIM_A16__TPSMP_HDATA_6 293
+MX6Q_PAD_EIM_A16__SRC_BT_CFG_16 294
+MX6Q_PAD_EIM_CS0__WEIM_WEIM_CS_0 295
+MX6Q_PAD_EIM_CS0__IPU1_DI1_PIN5 296
+MX6Q_PAD_EIM_CS0__ECSPI2_SCLK 297
+MX6Q_PAD_EIM_CS0__MIPI_CORE_DPHY_OUT_24 298
+MX6Q_PAD_EIM_CS0__GPIO_2_23 299
+MX6Q_PAD_EIM_CS0__TPSMP_HDATA_7 300
+MX6Q_PAD_EIM_CS1__WEIM_WEIM_CS_1 301
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