diff options
64 files changed, 1096 insertions, 1472 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 586cd045e2d..ac1c620d1c7 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -15,7 +15,9 @@ config SUPERH select HAVE_IOREMAP_PROT if MMU select HAVE_ARCH_TRACEHOOK select HAVE_DMA_API_DEBUG + select HAVE_PERF_COUNTER select RTC_LIB + select GENERIC_ATOMIC64 help The SuperH is a RISC processor targeted for use in embedded systems and consumer electronics; it was also used in the Sega Dreamcast @@ -50,6 +52,10 @@ config GENERIC_BUG def_bool y depends on BUG && SUPERH32 +config GENERIC_CSUM + def_bool y + depends on SUPERH64 + config GENERIC_FIND_NEXT_BIT def_bool y diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index 8179cc9be9a..8ece0b5bd02 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug @@ -39,6 +39,7 @@ config EARLY_SCIF_CONSOLE_PORT CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ CPU_SUBTYPE_SH7343 default "0xffea0000" if CPU_SUBTYPE_SH7785 + default "0xffeb0000" if CPU_SUBTYPE_SH7786 default "0xfffe8000" if CPU_SUBTYPE_SH7203 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 default "0xffe80000" if CPU_SH4 diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c index beb88c4da2c..36b8bac9b12 100644 --- a/arch/sh/boards/board-urquell.c +++ b/arch/sh/boards/board-urquell.c @@ -2,6 +2,7 @@ * Renesas Technology Corp. SH7786 Urquell Support. * * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com> + * Copyright (C) 2009 Paul Mundt * * Based on board-sh7785lcr.c * Copyright (C) 2008 Yoshihiro Shimoda @@ -178,6 +179,11 @@ static void __init urquell_init_irq(void) plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK); } +static int urquell_mode_pins(void) +{ + return __raw_readw(UBOARDREG(MDSWMR)); +} + /* Initialize the board */ static void __init urquell_setup(char **cmdline_p) { @@ -193,4 +199,5 @@ static struct sh_machine_vector mv_urquell __initmv = { .mv_name = "Urquell", .mv_setup = urquell_setup, .mv_init_irq = urquell_init_irq, + .mv_mode_pins = urquell_mode_pins, }; diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c index 920ea76abac..1639f891500 100644 --- a/arch/sh/boards/mach-highlander/setup.c +++ b/arch/sh/boards/mach-highlander/setup.c @@ -17,6 +17,7 @@ #include <linux/platform_device.h> #include <linux/ata_platform.h> #include <linux/types.h> +#include <linux/mtd/physmap.h> #include <linux/i2c.h> #include <linux/irq.h> #include <linux/interrupt.h> @@ -184,6 +185,53 @@ static struct platform_device ax88796_device = { .resource = ax88796_resources, }; +static struct mtd_partition nor_flash_partitions[] = { + { + .name = "loader", + .offset = 0x00000000, + .size = 512 * 1024, + }, + { + .name = "bootenv", + .offset = MTDPART_OFS_APPEND, + .size = 512 * 1024, + }, + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = 4 * 1024 * 1024, + }, + { + .name = "data", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + }, +}; + +static struct physmap_flash_data nor_flash_data = { + .width = 4, + .parts = nor_flash_partitions, + .nr_parts = ARRAY_SIZE(nor_flash_partitions), +}; + +/* This config is flash board for mass production. */ +static struct resource nor_flash_resources[] = { + [0] = { + .start = PA_NORFLASH_ADDR, + .end = PA_NORFLASH_ADDR + PA_NORFLASH_SIZE - 1, + .flags = IORESOURCE_MEM, + } +}; + +static struct platform_device nor_flash_device = { + .name = "physmap-flash", + .dev = { + .platform_data = &nor_flash_data, + }, + .num_resources = ARRAY_SIZE(nor_flash_resources), + .resource = nor_flash_resources, +}; + static struct resource smbus_resources[] = { [0] = { .start = PA_SMCR, @@ -215,6 +263,7 @@ static struct platform_device *r7780rp_devices[] __initdata = { &m66592_usb_peripheral_device, &heartbeat_device, &smbus_device, + &nor_flash_device, #ifndef CONFIG_SH_R7780RP &ax88796_device, #endif @@ -253,9 +302,10 @@ device_initcall(r7780rp_devices_setup); /* * Platform specific clocks */ -static void ivdr_clk_enable(struct clk *clk) +static int ivdr_clk_enable(struct clk *clk) { ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); + return 0; } static void ivdr_clk_disable(struct clk *clk) diff --git a/arch/sh/boards/mach-rsk/devices-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c index d8a65ea9166..4af3a771c05 100644 --- a/arch/sh/boards/mach-rsk/devices-rsk7203.c +++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c @@ -26,13 +26,13 @@ static struct smsc911x_platform_config smsc911x_config = { .phy_interface = PHY_INTERFACE_MODE_MII, .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, - .flags = SMSC911X_USE_16BIT, + .flags = SMSC911X_USE_32BIT | SMSC911X_SWAP_FIFO, }; static struct resource smsc911x_resources[] = { [0] = { .start = 0x24000000, - .end = 0x24000000 + 0x100, + .end = 0x240000ff, .flags = IORESOURCE_MEM, }, [1] = { @@ -99,6 +99,10 @@ static int __init rsk7203_devices_setup(void) gpio_request(GPIO_FN_TXD0, NULL); gpio_request(GPIO_FN_RXD0, NULL); + /* Setup LAN9118: CS1 in 16-bit Big Endian Mode, IRQ0 at Port B */ + ctrl_outl(0x36db0400, 0xfffc0008); /* CS1BCR */ + gpio_request(GPIO_FN_IRQ0_PB, NULL); + return platform_add_devices(rsk7203_devices, ARRAY_SIZE(rsk7203_devices)); } diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c index b8d43b638fc..121744c0871 100644 --- a/arch/sh/boards/mach-se/7780/irq.c +++ b/arch/sh/boards/mach-se/7780/irq.c @@ -12,7 +12,6 @@ #include <linux/init.h> #include <linux/irq.h> #include <linux/interrupt.h> -#include <linux/irq.h> #include <linux/io.h> #include <mach-se/mach/se7780.h> diff --git a/arch/sh/configs/r7780mp_defconfig b/arch/sh/configs/r7780mp_defconfig index 943da63a385..d393d9e5bdd 100644 --- a/arch/sh/configs/r7780mp_defconfig +++ b/arch/sh/configs/r7780mp_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.30-rc3 -# Mon Apr 27 12:53:28 2009 +# Linux kernel version: 2.6.30 +# Tue Jun 16 16:08:44 2009 # CONFIG_SUPERH=y CONFIG_SUPERH32=y @@ -20,6 +20,7 @@ CONFIG_GENERIC_CLOCKEVENTS=y # CONFIG_ARCH_SUSPEND_POSSIBLE is not set CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_SYS_SUPPORTS_PCI=y +CONFIG_SYS_SUPPORTS_TMU=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_HAVE_LATENCYTOP_SUPPORT=y @@ -92,6 +93,10 @@ CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y + +# +# Performance Counters +# CONFIG_VM_EVENT_COUNTERS=y CONFIG_PCI_QUIRKS=y CONFIG_COMPAT_BRK=y @@ -100,7 +105,7 @@ CONFIG_SLAB=y # CONFIG_SLOB is not set CONFIG_PROFILING=y CONFIG_TRACEPOINTS=y -# CONFIG_MARKERS is not set +CONFIG_MARKERS=y CONFIG_OPROFILE=m CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set @@ -185,6 +190,7 @@ CONFIG_CPU_SUBTYPE_SH7780=y CONFIG_QUICKLIST=y CONFIG_MMU=y CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_FORCE_MAX_ZONEORDER=11 CONFIG_MEMORY_START=0x08000000 CONFIG_MEMORY_SIZE=0x08000000 # CONFIG_29BIT is not set @@ -203,7 +209,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_PAGE_SIZE_8KB is not set # CONFIG_PAGE_SIZE_16KB is not set # CONFIG_PAGE_SIZE_64KB is not set -CONFIG_ENTRY_OFFSET=0x00001000 CONFIG_HUGETLB_PAGE_SIZE_64K=y # CONFIG_HUGETLB_PAGE_SIZE_256K is not set # CONFIG_HUGETLB_PAGE_SIZE_1MB is not set @@ -225,6 +230,7 @@ CONFIG_NR_QUICK=2 CONFIG_UNEVICTABLE_LRU=y CONFIG_HAVE_MLOCK=y CONFIG_HAVE_MLOCKED_PAGE_BIT=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 # # Cache configuration @@ -258,9 +264,10 @@ CONFIG_SH_R7780MP=y # # Timer and clock configuration # -CONFIG_SH_TMU=y -CONFIG_SH_TIMER_IRQ=28 +CONFIG_SH_TIMER_TMU=y CONFIG_SH_PCLK_FREQ=33333333 +CONFIG_SH_CLK_CPG=y +CONFIG_SH_CLK_CPG_LEGACY=y # CONFIG_NO_HZ is not set # CONFIG_HIGH_RES_TIMERS is not set CONFIG_GENERIC_CLOCKEVENTS_BUILD=y @@ -301,12 +308,14 @@ CONFIG_KEXEC=y # CONFIG_PREEMPT_VOLUNTARY is not set CONFIG_PREEMPT=y CONFIG_GUSA=y +# CONFIG_SPARSE_IRQ is not set # # Boot options # CONFIG_ZERO_PAGE_OFFSET=0x00001000 CONFIG_BOOT_LINK_OFFSET=0x00800000 +CONFIG_ENTRY_OFFSET=0x00001000 CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1" @@ -445,7 +454,91 @@ CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +# CONFIG_MTD_CHAR is not set +# CONFIG_MTD_BLKDEVS is not set +# CONFIG_MTD_BLOCK is not set +# CONFIG_MTD_BLOCK_RO is not set +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CFI_AMDSTD=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +# CONFIG_MTD_PHYSMAP_COMPAT is not set +# CONFIG_MTD_PCI is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +# CONFIG_MTD_NAND is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y # CONFIG_BLK_CPQ_CISS_DA is not set @@ -500,10 +593,6 @@ CONFIG_BLK_DEV_SD=y # CONFIG_BLK_DEV_SR is not set CONFIG_CHR_DEV_SG=m # CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set @@ -521,6 +610,7 @@ CONFIG_SCSI_WAIT_SCAN=m CONFIG_SCSI_LOWLEVEL=y # CONFIG_ISCSI_TCP is not set # CONFIG_SCSI_CXGB3_ISCSI is not set +# CONFIG_SCSI_BNX2_ISCSI is not set # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_3W_9XXX is not set # CONFIG_SCSI_ACARD is not set @@ -529,6 +619,7 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set # CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set @@ -543,7 +634,6 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set -# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_STEX is not set # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_IPR is not set @@ -1111,6 +1201,7 @@ CONFIG_RTC_DRV_RS5C372=y # on-CPU RTC drivers # CONFIG_RTC_DRV_SH=y +# CONFIG_RTC_DRV_GENERIC is not set # CONFIG_DMADEVICES is not set # CONFIG_AUXDISPLAY is not set # CONFIG_UIO is not set @@ -1138,6 +1229,7 @@ CONFIG_FILE_LOCKING=y # CONFIG_XFS_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_BTRFS_FS is not set +CONFIG_FSNOTIFY=y CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y @@ -1145,6 +1237,7 @@ CONFIG_INOTIFY_USER=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set CONFIG_FUSE_FS=m +# CONFIG_CUSE is not set # # Caches @@ -1190,6 +1283,7 @@ CONFIG_MISC_FILESYSTEMS=y # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set +# CONFIG_JFFS2_FS is not set # CONFIG_CRAMFS is not set # CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set @@ -1328,41 +1422,40 @@ CONFIG_HAVE_FUNCTION_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_RING_BUFFER=y +CONFIG_EVENT_TRACING=y +CONFIG_CONTEXT_SWITCH_TRACER=y CONFIG_TRACING=y CONFIG_TRACING_SUPPORT=y - -# -# Tracers -# +CONFIG_FTRACE=y # CONFIG_FUNCTION_TRACER is not set # CONFIG_IRQSOFF_TRACER is not set # CONFIG_PREEMPT_TRACER is not set # CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_EVENT_TRACER is not set +# CONFIG_ENABLE_DEFAULT_TRACERS is not set # CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set +CONFIG_BRANCH_PROFILE_NONE=y +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set +# CONFIG_PROFILE_ALL_BRANCHES is not set # CONFIG_STACK_TRACER is not set # CONFIG_KMEMTRACE is not set # CONFIG_WORKQUEUE_TRACER is not set # CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_FTRACE_STARTUP_TEST is not set +# CONFIG_RING_BUFFER_BENCHMARK is not set # CONFIG_DYNAMIC_DEBUG is not set # CONFIG_DMA_API_DEBUG is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_SH_STANDARD_BIOS=y -# CONFIG_EARLY_SCIF_CONSOLE is not set -CONFIG_EARLY_PRINTK=y +# CONFIG_SH_STANDARD_BIOS is not set +CONFIG_EARLY_SCIF_CONSOLE=y +CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000 +# CONFIG_EARLY_PRINTK is not set # CONFIG_DEBUG_BOOTMEM is not set CONFIG_DEBUG_STACKOVERFLOW=y # CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_4KSTACKS is not set -# CONFIG_IRQSTACKS is not set CONFIG_DUMP_CODE=y # CONFIG_SH_NO_BSS_INIT is not set -# CONFIG_MORE_COMPILE_OPTIONS is not set # # Security options diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile index d2ffc477549..d6303d0e494 100644 --- a/arch/sh/drivers/pci/Makefile +++ b/arch/sh/drivers/pci/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o +obj-$(CONFIG_CPU_SUBTYPE_SH7786) += ops-sh7786.o obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c index e83d0d3aabe..16e0a1baad8 100644 --- a/arch/sh/drivers/pci/ops-dreamcast.c +++ b/arch/sh/drivers/pci/ops-dreamcast.c @@ -18,7 +18,6 @@ #include <linux/pci.h> #include <linux/module.h> #include <linux/io.h> -#include <linux/irq.h> #include <mach/pci.h> /* diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c new file mode 100644 index 00000000000..48f594b9582 --- /dev/null +++ b/arch/sh/drivers/pci/ops-sh7786.c @@ -0,0 +1,134 @@ +/* + * Generic SH7786 PCI-Express operations. + * + * Copyright (C) 2009 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License v2. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/pci.h> +#include <linux/io.h> +#include <linux/spinlock.h> +#include "pcie-sh7786.h" + +enum { + PCI_ACCESS_READ, + PCI_ACCESS_WRITE, +}; + +static DEFINE_SPINLOCK(sh7786_pcie_lock); + +static int sh7786_pcie_config_access(unsigned char access_type, + struct pci_bus *bus, unsigned int devfn, int where, u32 *data) +{ + struct pci_channel *chan = bus->sysdata; + int dev, func; + + dev = PCI_SLOT(devfn); + func = PCI_FUNC(devfn); + + if (bus->number > 255 || dev > 31 || func > 7) + return PCIBIOS_FUNC_NOT_SUPPORTED; + if (devfn) + return PCIBIOS_DEVICE_NOT_FOUND; + + /* Set the PIO address */ + pci_write_reg(chan, (bus->number << 24) | (dev << 19) | + (func << 16) | (where & ~3), SH4A_PCIEPAR); + + /* Enable the configuration access */ + pci_write_reg(chan, (1 << 31), SH4A_PCIEPCTLR); + + if (access_type == PCI_ACCESS_READ) + *data = pci_read_reg(chan, SH4A_PCIEPDR); + else + pci_write_reg(chan, *data, SH4A_PCIEPDR); + + /* Check for master and target aborts */ + if (pci_read_reg(chan, SH4A_PCIEPCICONF1) & ((1 << 29) | (1 << 28))) + return PCIBIOS_DEVICE_NOT_FOUND; + + return PCIBIOS_SUCCESSFUL; +} + +static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 *val) +{ + unsigned long flags; + int ret; + u32 data; + + if ((size == 2) && (where & 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + else if ((size == 4) && (where & 3)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + spin_lock_irqsave(&sh7786_pcie_lock, flags); + ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus, + devfn, where, &data); + if (ret != PCIBIOS_SUCCESSFUL) + goto out; + + if (size == 1) + *val = (data >> ((where & 3) << 3)) & 0xff; + else if (size == 2) + *val = (data >> ((where & 2) << 3)) & 0xffff; + else + *val = data; + + dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x " + "where=0x%04x size=%d val=0x%08lx\n", bus->number, + devfn, where, size, (unsigned long)*val); + +out: + spin_unlock_irqrestore(&sh7786_pcie_lock, flags); + return ret; +} + +static int sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn, + int where, int size, u32 val) +{ + unsigned long flags; + int shift, ret; + u32 data; + + if ((size == 2) && (where & 1)) + return PCIBIOS_BAD_REGISTER_NUMBER; + else if ((size == 4) && (where & 3)) + return PCIBIOS_BAD_REGISTER_NUMBER; + + spin_lock_irqsave(&sh7786_pcie_lock, flags); + ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus, + devfn, where, &data); + if (ret != PCIBIOS_SUCCESSFUL) + goto out; + + dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x " + "where=0x%04x size=%d val=%08lx\n", bus->number, + devfn, where, size, (unsigned long)val); + + if (size == 1) { + shift = (where & 3) << 3; + data &= ~(0xff << shift); + data |= ((val & 0xff) << shift); + } else if (size == 2) { + shift = (where & 2) << 3; + data &= ~(0xffff << shift); + data |= ((val & 0xffff) << shift); + } else + data = val; + + ret = sh7786_pcie_config_access(PCI_ACCESS_WRITE, bus, + devfn, where, &data); +out: + spin_unlock_irqrestore(&sh7786_pcie_lock, flags); + return ret; +} + +struct pci_ops sh7786_pci_ops = { + .read = sh7786_pcie_read, + .write = sh7786_pcie_write, +}; diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c index 54d77cbb8b3..9a1c423ad16 100644 --- a/arch/sh/drivers/pci/pci.c +++ b/arch/sh/drivers/pci/pci.c @@ -53,12 +53,8 @@ static DEFINE_MUTEX(pci_scan_mutex); void __devinit register_pci_controller(struct pci_channel *hose) { - if (request_resource(&iomem_resource, hose->mem_resource) < 0) - goto out; - if (request_resource(&ioport_resource, hose->io_resource) < 0) { - release_resource(hose->mem_resource); - goto out; - } + request_resource(&iomem_resource, hose->mem_resource); + request_resource(&ioport_resource, hose->io_resource); *hose_tail = hose; hose_tail = &hose->next; @@ -80,12 +76,6 @@ void __devinit register_pci_controller(struct pci_channel *hose) pcibios_scanbus(hose); mutex_unlock(&pci_scan_mutex); } - - return; - -out: - printk(KERN_WARNING - "Skipping PCI bus scan due to resource conflict\n"); } static int __init pcibios_init(void) diff --git a/arch/sh/drivers/pci/pcie-sh7786.h b/arch/sh/drivers/pci/pcie-sh7786.h new file mode 100644 index 00000000000..c655290a775 --- /dev/null +++ b/arch/sh/drivers/pci/pcie-sh7786.h @@ -0,0 +1,589 @@ +/* + * SH7786 PCI-Express controller definitions. + * + * Copyright (C) 2008, 2009 Renesas Technology Corp. + * All rights reserved. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __PCI_SH7786_H +#define __PCI_SH7786_H + +/* PCIe bus-0(x4) on SH7786 */ // Rev1.171 +#define SH4A_PCIE_SPW_BASE 0xFE000000 /* spw config address for controller 0 */ +#define SH4A_PCIE_SPW_BASE1 0xFE200000 /* spw config address for controller 1 (Rev1.14)*/ +#define SH4A_PCIE_SPW_BASE2 0xFCC00000 /* spw config address for controller 2 (Rev1.171)*/ +#define SH4A_PCIE_SPW_BASE_LEN 0x00080000 + +#define SH4A_PCI_CNFG_BASE 0xFE040000 /* pci config address for controller 0 */ +#define SH4A_PCI_CNFG_BASE1 0xFE240000 /* pci config address for controller 1 (Rev1.14)*/ +#define SH4A_PCI_CNFG_BASE2 0xFCC40000 /* pci config address for controller 2 (Rev1.171)*/ +#define SH4A_PCI_CNFG_BASE_LEN 0x00040000 + +#define SH4A_PCIPIO_ADDR_OFFSET 0x000001c0 /* offset to pci config_address */ +#define SH4A_PCIPIO_DATA_OFFSET 0x00000220 /* offset to pci config_data */ + +/* + * for PEX8111(Max Payload Size=128B,PCIIO_SIZE=64K), + * for other(Max Payload Size=4096B,PCIIO_SIZE=8M) + */ + +/* PCI0-0: PCI I/O space */ +#define SH4A_PCIIO_BASE 0xFD000000 /* PCI I/O for controller 0 */ +#define SH4A_PCIIO_BASE1 0xFD800000 /* PCI I/O for controller 1 (Rev1.14)*/ +#define SH4A_PCIIO_BASE2 0xFC800000 /* PCI I/O for controller 2 (Rev1.171)*/ + +#define SH4A_PCIIO_SIZE64 0x00010000 /* PLX allows only 64K */ +#define SH4A_PCIIO_SIZE 0x00800000 /* 8M */ +#define SH4A_PCIIO_SIZE2 0x00400000 /* 4M (Rev1.171)*/ + +/* PCI0-1: PCI memory space 29-bit address */ +#define SH4A_PCIMEM_BASE 0x10000000 +#define SH4A_PCIMEM_SIZE 0x04000000 /* 64M */ + +/* PCI0-2: PCI memory space 32-bit address */ +#define SH4A_PCIMEM_BASEA 0xC0000000 /* for controller 0 */ +#define SH4A_PCIMEM_BASEA1 0xA0000000 /* for controller 1 (Rev1.14)*/ +#define SH4A_PCIMEM_BASEA2 0x80000000 /* for controller 2 (Rev1.171)*/ +#define SH4A_PCIMEM_SIZEA 0x20000000 /* 512M */ + +/* PCI0: PCI memory target transfer 32-bit address translation value(Rev1.11T)*/ +#define SH4A_PCIBMSTR_TRANSLATION 0x20000000 + +#define SH4A_PCI_DEVICE_ID 0x0002 +#define SH4A_PCI_VENDOR_ID 0x1912 + +// PCI compatible 000-03f +#define PCI_CMD 0x004 +#define PCI_RID 0x008 +#define PCI_IBAR 0x010 +#define PCI_MBAR0 0x014 +#define PCI_MBAR1 0x018 + +/* PCI power management/MSI/capablity 040-0ff */ +/* PCIE extended 100-fff */ + +/* SH7786 device identification */ // Rev1.171 +#define SH4A_PVR (0xFF000030) +#define SH4A_PVR_SHX3 (0x10400000) +#define SH4A_PRR (0xFF000044) +#define SH4A_PRR_SH7786 (0x00000400) // Rev1.171 + +/* SPVCR0 */ +#define SH4A_PCIEVCR0 (0x000000) /* R - 0x0000 0000 32 */ +#define BITS_TOP_MB (24) +#define MASK_TOP_MB (0xff<<BITS_TOP_MB) +#define BITS_BOT_MB (16) +#define MASK_BOT_MB (0xff<<BITS_BOT_MB) +#define BITS_VC_ID (0) +#define MASK_VC_ID (0xffff<<BITS_VC_ID) + +/* SPVCR1 */ +#define SH4A_PCIEVCR1 (0x000004) /* R - 0x0000 0000 32*/ +#define BITS_BADOPC (5) /* 5 BADOPC 0 R/W */ +#define MASK_BADOPC (1<<BITS_BADOPC) +#define BITS_BADDEST (4) /*4 BADDEST 0 R/W */ +#define MASK_BADDEST (1<<BITS_BADDEST) +#define BITS_UNSOLRESP (3) /* 3 UNSOLRESP 0 R/W */ +#define MASK_UNSOLRESP (1<<BITS_UNSOLRESP) +#define BITS_ERRSNT (1) /* 1 ERRSNT 0 */ +#define MASK_ERRSNT (1<<BITS_ERRSNT) +#define BITS_ERRRCV (0) /* 0 ERRRCV 0 */ +#define MASK_ERRRCV (1<<BITS_ERRRCV) + +/* PCIEECR */ +#define SH4A_PCIEECR (0x000008) /* R/W - 0x0000 0000 32 */ +#define BITS_ENBL (0) /* 0 ENBL 0 R/W */ +#define MASK_ENBL (1<<BITS_ENBL) + +/* PCIEPAR */ +#define SH4A_PCIEPAR (0x000010) /* R/W - 0x0000 0000 32 */ +#define BITS_BN (24) +#define MASK_BN (0xff<<BITS_BN) +#define BITS_DN (19) +#define MASK_DN (0x1f<<BITS_DN) +#define BITS_FN (16) +#define MASK_FN (0x7<<BITS_FN) +#define BITS_EREGNO (8) +#define MASK_EREGNO (0xff<<BITS_EREGNO) +#define BITS_REGNO (2) +#define MASK_REGNO (0x3f<<BITS_REGNO) + +/* PCIEPCTLR */ +#define SH4A_PCIEPCTLR (0x000018) /* R/W - 0x0000 0000 32 */ +#define BITS_CCIE (31) /* 31 CCIE */ +#define MASK_CCIE (1<<BITS_CCIE) +#define BITS_TYPE (8) +#define MASK_TYPE (1<<BITS_TYPE) +#define BITS_C_VC (0) +#define MASK_C_VC (1<<BITS_C_VC) + +/* PCIEPDR */ +#define SH4A_PCIEPDR (0x000020) /* R/W - 0x0000 0000 32 */ +#define BITS_PDR (0) +#define MASK_PDR (0xffffffff<<BITS_PDR) + +/* PCIEMSGALR */ +#define SH4A_PCIEMSGALR (0x000030) /* R/W - 0x0000 0000 32 */ +#define BITS_MSGADRL (0) +#define MASK_MSGADRL (0xffffffff<<BITS_MSGADRL) + +/* PCIEMSGAHR */ +#define SH4A_PCIEMSGAHR (0x000034) /* R/W - 0x0000 0000 32 */ +#define BITS_MSGADRH (0) +#define MASK_MSGADRH (0xffffffff<<BITS_MSGADRH) + +/* PCIEMSGCTLR */ +#define SH4A_PCIEMSGCTLR (0x000038) /* R/W - 0x0000 0000 32 */ +#define BITS_MSGIE (31) +#define MASK_MSGIE (1<<BITS_MSGIE) +#define BITS_MROUTE (16) +#define MASK_MROUTE (0x7<<BITS_MROUTE) +#define BITS_MCODE (8) +#define MASK_MCODE (0xff<<BITS_MCODE) +#define BITS_M_VC (0) +#define MASK_M_VC (1<<BITS_M_VC) + +/* PCIEMSG */ +#define SH4A_PCIEMSG (0x000040) /* W - - 32 */ +#define BITS_MDATA (0) +#define MASK_MDATA (0xffffffff<<BITS_MDATA) + +/* PCIEPHYCTLR */ +#define SH4A_PCIEPHYCTLR (0x010000) /* R/W - 0x0000 0000 32 */ +#define BITS_CKE (0) +#define MASK_CKE (1<<BITS_CKE) + +/* PCIERMSGIER */ +#define SH4A_PCIERMSGIER (0x004040) /* R/W - 0x0000 0000 32 */ + +/* PCIEPHYADRR */ +#define SH4A_PCIEPHYADRR (0x010004) /* R/W - 0x0000 0000 32 */ +#define BITS_ACK (24) // Rev1.171 +#define MASK_ACK (1<<BITS_ACK) // Rev1.171 +#define BITS_CMD (16) // Rev1.171 +#define MASK_CMD (0x03<<BITS_CMD) // Rev1.171 +#define BITS_LANE (8) +#define MASK_LANE (0x0f<<BITS_LANE) +#define BITS_ADR (0) +#define MASK_ADR (0xff<<BITS_ADR) + +/* PCIEPHYDINR */ // Rev1.171 start. +#define SH4A_PCIEPHYDINR (0x010008) /* R/W - 0x0000 0000 32 */ + +/* PCIEPHYDOUTR */ +#define SH4A_PCIEPHYDOUTR (0x01000C) /* R/W - 0x0000 0000 32 */ + +/* PCIEPHYSR */ +#define SH4A_PCIEPHYSR (0x010010) /* R/W - 0x0000 0000 32 */ // Rev1.171 end. + +/* PCIEPHYDATAR */ +#define SH4A_PCIEPHYDATAR (0x00008) /* R/W - 0xxxxx xxxx 32 */ +#define BITS_DATA (0) +#define MASK_DATA (0xffffffff<<BITS_DATA) + +/* PCIETCTLR */ +#define SH4A_PCIETCTLR (0x020000) /* R/W R/W 0x0000 0000 32 */ +#define BITS_CFINT (0) +#define MASK_CFINT (1<<BITS_CFINT) + +/* PCIETSTR */ +#define SH4A_PCIETSTR (0x020004) /* R/W R/W 0x0000 0000 32 */ + +/* PCIEINTR */ +#define SH4A_PCIEINTR (0x020008) /* R/W R/W 0x0000 0000 32 */ +#define BITS_INT_RX_ERP (31) +#define MASK_INT_RX_ERP (1<<BITS_INT_RX_ERP) +#define BITS_INT_RX_VCX_Posted (30) +#define MASK_INT_RX_VCX_Posted (1<<BITS_INT_RX_VCX_Posted) +#define BITS_INT_RX_VCX_NonPosted (29) +#define MASK_INT_RX_VCX_NonPosted (1<<BITS_INT_RX_VCX_NonPosted) +#define BITS_INT_RX_VCX_CPL (28) +#define MASK_INT_RX_VCX_CPL (1<<BITS_INT_RX_VCX_CPL) +#define BITS_INT_TX_VCX_Posted (26) +#define MASK_INT_TX_VCX_Posted (1<<BITS_INT_TX_VCX_Posted) +#define BITS_INT_TX_VCX_NonPosted (25) +#define MASK_INT_TX_VCX_NonPosted (1<<BITS_INT_TX_VCX_NonPosted) +#define BITS_INT_TX_VCX_CPL (24) +#define MASK_INT_TX_VCX_CPL (1<<BITS_INT_TX_VCX_CPL) +#define BITS_INT_RX_VC0_Posted (22) +#define MASK_INT_RX_VC0_Posted (1<<BITS_INT_RX_VC0_Posted) +#define BITS_INT_RX_VC0_NonPosted (21) +#define MASK_INT_RX_VC0_NonPosted (1<<BITS_INT_RX_VC0_NonPosted) +#define BITS_INT_RX_VC0_CPL (20) +#define MASK_INT_RX_VC0_CPL (1<<BITS_INT_RX_VC0_CPL) +#define BITS_INT_TX_VC0_Posted (18) +#define MASK_INT_TX_VC0_Posted (1<<BITS_INT_TX_VC0_Posted) +#define BITS_INT_TX_VC0_NonPosted (17) +#define MASK_INT_TX_VC0_NonPosted (1<<BITS_INT_TX_VC0_NonPosted) +#define BITS_INT_TX_VC0_CPL (16) +#define MASK_INT_TX_VC0_CPL (1<<BITS_INT_TX_VC0_CPL) +#define BITS_INT_RX_CTRL (15) +#define MASK_INT_RX_CTRL (1<<BITS_INT_RX_CTRL) +#define BITS_INT_TX_CTRL (14) +#define MASK_INT_TX_CTRL (1<<BITS_INT_TX_CTRL) +#define BITS_INTTL (11) +#define MASK_INTTL (1<<BITS_INTTL) +#define BITS_INTDL (10) +#define MASK_INTDL (1<<BITS_INTDL) +#define BITS_INTMAC (9) +#define MASK_INTMAC (1<<BITS_INTMAC) +#define BITS_INTPM (8) +#define MASK_INTPM (1<<BITS_INTPM) + +/* PCIEINTER */ +#define SH4A_PCIEINTER (0x02000C) /* R/W R/W 0x0000 0000 32 */ +#define BITS_INT_RX_ERP (31) +#define MASK_INT_RX_ERP (1<<BITS_INT_RX_ERP) +#define BITS_INT_RX_VCX_Posted (30) +#define MASK_INT_RX_VCX_Posted (1<<BITS_INT_RX_VCX_Posted) +#define BITS_INT_RX_VCX_NonPosted (29) +#define MASK_INT_RX_VCX_NonPosted (1<<BITS_INT_RX_VCX_NonPosted) +#define BITS_INT_RX_VCX_CPL (28) +#define MASK_INT_RX_VCX_CPL (1<<BITS_INT_RX_VCX_CPL) +#define BITS_INT_TX_VCX_Posted (26) +#define MASK_INT_TX_VCX_Posted (1<<BITS_INT_TX_VCX_Posted) +#define BITS_INT_TX_VCX_NonPosted (25) +#define MASK_INT_TX_VCX_NonPosted (1<<BITS_INT_TX_VCX_NonPosted) +#define BITS_INT_TX_VCX_CPL (24) +#define MASK_INT_TX_VCX_CPL (1<<BITS_INT_TX_VCX_CPL) +#define BITS_INT_RX_VC0_Posted (22) +#define MASK_INT_RX_VC0_Posted (1<<BITS_INT_RX_VC0_Posted) +#define BITS_INT_RX_VC0_NonPosted (21) +#define MASK_INT_RX_VC0_NonPosted (1<<BITS_INT_RX_VC0_NonPosted) +#define BITS_INT_RX_VC0_CPL (20) +#define MASK_INT_RX_VC0_CPL (1<<BITS_INT_RX_VC0_CPL) +#define BITS_INT_TX_VC0_Posted (18) +#define MASK_INT_TX_VC0_Posted (1<<BITS_INT_TX_VC0_Posted) +#define BITS_INT_TX_VC0_NonPosted (17) +#define MASK_INT_TX_VC0_NonPosted (1<<BITS_INT_TX_VC0_NonPosted) +#define BITS_INT_TX_VC0_CPL (16) +#define MASK_INT_TX_VC0_CPL (1<<BITS_INT_TX_VC0_CPL) +#define BITS_INT_RX_CTRL (15) +#define MASK_INT_RX_CTRL (1<<BITS_INT_RX_CTRL) +#define BITS_INT_TX_CTRL (14) +#define MASK_INT_TX_CTRL (1<<BITS_INT_TX_CTRL) +#define BITS_INTTL (11) +#define MASK_INTTL (1<<BITS_INTTL) +#define BITS_INTDL (10) +#define MASK_INTDL (1<<BITS_INTDL) +#define BITS_INTMAC (9) +#define MASK_INTMAC (1<<BITS_INTMAC) +#define BITS_INTPM (8) +#define MASK_INTPM (1<<BITS_INTPM) + +/* PCIEAIR */ +#define SH4A_PCIEAIR (SH4A_PCIE_BASE + 0x020010) /* R/W R/W 0xxxxx xxxx 32 */ + +/* PCIECIR */ +#define SH4A_PCIECIR (SH4A_PCIE_BASE) /* R/W R/W 0xxxxx xxxx 32 */ + +/* PCIEERRFR */ // Rev1.18 +#define SH4A_PCIEERRFR (0x020020) /* R/W R/W 0xxxxx xxxx 32 */ // Rev1.18 + // Rev1.18 +/* PCIELAR0 */ +#define SH4A_PCIELAR0 (0x020200) /* R/W R/W 0x0000 0000 32 */ +#define BITS_LARn (20) +#define MASK_LARn (0xfff<<BITS_LARn) + +#define SH4A_PCIE_020204 (0x020204) /* R/W R/W 0x0000 0000 32 */ + +/* PCIELAMR0 */ +#define SH4A_PCIELAMR0 (0x020208) /* R/W R/W 0x0000 0000 32 */ +#define BITS_LAMRn (20) +#define MASK_LAMRn (0x1ff<<BITS_LAMRn) +#define BITS_LAREn (0) +#define MASK_LAREn (0x1<<BITS_LAREn) + +/* PCIECSCR0 */ +#define SH4A_PCIECSCR0 (0x020210) /* R/W R/W 0x0000 0000 32 */ +#define BITS_RANGE (2) +#define MASK_RANGE (0x7<<BITS_RANGE) +#define BITS_SNPMD (0) +#define MASK_SNPMD (0x3<<BITS_SNPMD) + +/* PCIECSAR0 */ +#define SH4A_PCIECSAR0 (0x020214) /* R/W R/W 0x0000 0000 32 */ +#define BITS_CSADR (0) +#define MASK_CSADR (0xffffffff<<BITS_CSADR) + +/* PCIESTCTLR0 */ +#define SH4A_PCIESTCTLR0 (0x020218) /* R/W R/W 0x0000 0000 32 */ +#define BITS_SHPRI (8) +#define MASK_SHPRI (0x0f<<BITS_SHPRI) + +#define SH4A_PCIE_020224 (0x020224) /* R/W R/W 0x0000 0000 32 */ + +#define SH4A_PCIELAR1 (0x020220) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIELAMR1 (0x020228) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSCR1 (0x020230) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSAR1 (0x020234) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIESTCTLR1 (0x020238) /* R/W R/W 0x0000 0000 32 */ + +#define SH4A_PCIELAR2 (0x020240) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIE_020244 (0x020244) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIELAMR2 (0x020248) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSCR2 (0x020250) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSAR2 (0x020254) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIESTCTLR2 (0x020258) /* R/W R/W 0x0000 0000 32 */ + +#define SH4A_PCIELAR3 (0x020260) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIE_020264 (0x020264) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIELAMR3 (0x020268) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSCR3 (0x020270) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSAR3 (0x020274) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIESTCTLR3 (0x020278) /* R/W R/W 0x0000 0000 32 */ + +#define SH4A_PCIELAR4 (0x020280) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIE_020284 (0x020284) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIELAMR4 (0x020288) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSCR4 (0x020290) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSAR4 (0x020294) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIESTCTLR4 (0x020298) /* R/W R/W 0x0000 0000 32 */ + +#define SH4A_PCIELAR5 (0x0202A0) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIE_0202A4 (0x0202A4) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIELAMR5 (0x0202A8) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSCR5 (0x0202B0) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIECSAR5 (0x0202B4) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIESTCTLR5 (0x0202B8) /* R/W R/W 0x0000 0000 32 */ + +/* PCIEPARL0 */ +#define SH4A_PCIEPARL0 (0x020400) /* R/W R/W 0x0000 0000 32 */ +#define BITS_PAL (18) +#define MASK_PAL (0x3fff<<BITS_PAL) + +/* PCIEPARH0 */ +#define SH4A_PCIEPARH0 (0x020404) /* R/W R/W 0x0000 0000 32 */ +#define BITS_PAH (0) +#define MASK_PAH (0xffffffff<<BITS_PAH) + +/* PCIEPAMR0 */ +#define SH4A_PCIEPAMR0 (0x020408) /* R/W R/W 0x0000 0000 32 */ +#define BITS_PAM (18) +#define MASK_PAM (0x3fff<<BITS_PAM) + +/* PCIEPTCTLR0 */ +#define SH4A_PCIEPTCTLR0 (0x02040C) /* R/W R/W 0x0000 0000 32 */ +#define BITS_PARE (31) +#define MASK_PARE (0x1<<BITS_PARE) +#define BITS_TC (20) +#define MASK_TC (0x7<<BITS_TC) +#define BITS_T_VC (16) +#define MASK_T_VC (0x1<<BITS_T_VC) +#define BITS_LOCK (12) +#define MASK_LOCK (0x1<<BITS_LOCK) +#define BITS_SPC (8) +#define MASK_SPC (0x1<<BITS_SPC) + +#define SH4A_PCIEPARL1 (0x020420) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARH1 (0x020424) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPAMR1 (0x020428) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPTCTLR1 (0x02042C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARL2 (0x020440) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARH2 (0x020444) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPAMR2 (0x020448) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPTCTLR2 (0x02044C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARL3 (0x020460) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARH3 (0x020464) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPAMR3 (0x020468) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPTCTLR3 (0x02046C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARL4 (0x020480) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARH4 (0x020484) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPAMR4 (0x020488) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPTCTLR4 (0x02048C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARL5 (0x0204A0) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPARH5 (0x0204A4) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPAMR5 (0x0204A8) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPTCTLR5 (0x0204AC) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMAOR (0x021000) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAR0 (0x021100) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAHR0 (0x021104) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAR0 (0x021108) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAHR0 (0x02110C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMBCNTR0 (0x021110) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSBCNTR0 (0x021114) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSTRR0 (0x021118) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCAR0 (0x02111C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCR0 (0x021120) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCC2R0 (0x021124) /* R/W R/W 0x0000 0000 - */ +#define SH4A_PCIEDMCCCR0 (0x021128) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAR1 (0x021140) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAHR1 (0x021144) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAR1 (0x021148) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAHR1 (0x02114C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMBCNTR1 (0x021150) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSBCNTR1 (0x021154) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSTRR1 (0x021158) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCAR1 (0x02115C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCR1 (0x021160) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCC2R1 (0x021164) /* R/W R/W 0x0000 0000 - */ +#define SH4A_PCIEDMCCCR1 (0x021168) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAR2 (0x021180) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAHR2 (0x021184) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAR2 (0x021188) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAHR2 (0x02118C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMBCNTR2 (0x021190) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSBCNTR2 (0x021194) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSTRR2 (0x021198) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCAR2 (0x02119C) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCR2 (0x0211A0) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCC2R2 (0x0211A4) /* R/W R/W 0x0000 0000 - */ +#define SH4A_PCIEDMCCCR2 (0x0211A8) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAR3 (0x0211C0) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSAHR3 (0x0211C4) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAR3 (0x0211C8) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMDAHR3 (0x0211CC) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMBCNTR3 (0x0211D0) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSBCNTR3 (0x0211D4) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMSTRR3 (0x0211D8) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCAR3 (0x0211DC) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCCR3 (0x0211E0) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEDMCC2R3 (0x0211E4) /* R/W R/W 0x0000 0000 - */ +#define SH4A_PCIEDMCCCR3 (0x0211E8) /* R/W R/W 0x0000 0000 32 */ +#define SH4A_PCIEPCICONF0 (0x040000) /* R R - 8/16/32 */ +#define SH4A_PCIEPCICONF1 (0x040004) /* R/W R/W 0x0008 0000 8/16/32 */ +#define SH4A_PCIEPCICONF2 (0x040008) /* R/W R/W 0xFF00 0000 8/16/32 */ +#define SH4A_PCIEPCICONF3 (0x04000C) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEPCICONF4 (0x040010) /* - R/W - 8/16/32 */ +#define SH4A_PCIEPCICONF5 (0x040014) /* - R/W - 8/16/32 */ +#define SH4A_PCIEPCICONF6 (0x040018) /* - R/W - 8/16/32 */ +#define SH4A_PCIEPCICONF7 (0x04001C) /* - R/W - 8/16/32 */ +#define SH4A_PCIEPCICONF8 (0x040020) /* - R/W - 8/16/32 */ +#define SH4A_PCIEPCICONF9 (0x040024) /* - R/W - 8/16/32 */ +#define SH4A_PCIEPCICONF10 (0x040028) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEPCICONF11 (0x04002C) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEPCICONF12 (0x040030) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEPCICONF13 (0x040034) /* R/W R/W 0x0000 0040 8/16/32 */ +#define SH4A_PCIEPCICONF14 (0x040038) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEPCICONF15 (0x04003C) /* R/W R/W 0x0000 00FF 8/16/32 */ +#define SH4A_PCIEPMCAP0 (0x040040) /* R/W R 0x0003 5001 8/16/32 */ +#define SH4A_PCIEPMCAP1 (0x040044) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEMSICAP0 (0x040050) /* R/W R/W 0x0180 7005 8/16/32 */ +#define SH4A_PCIEMSICAP1 (0x040054) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEMSICAP2 (0x040058) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEMSICAP3 (0x04005C) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEMSICAP4 (0x040060) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEMSICAP5 (0x040064) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEEXPCAP0 (0x040070) /* R/W R/W 0x0001 0010 8/16/32 */ +#define SH4A_PCIEEXPCAP1 (0x040074) /* R/W R 0x0000 0005 8/16/32 */ +#define SH4A_PCIEEXPCAP2 (0x040078) /* R/W R/W 0x0000 0801 8/16/32 */ +#define SH4A_PCIEEXPCAP3 (0x04007C) /* R/W R 0x0003 F421 8/16/32 */ +#define SH4A_PCIEEXPCAP4 (0x040080) /* R/W R/W 0x0041 0000 8/16/32 */ +#define SH4A_PCIEEXPCAP5 (0x040084) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEEXPCAP6 (0x040088) /* R/W R/W 0x0000 03C0 8/16/32 */ +#define SH4A_PCIEEXPCAP7 (0x04008C) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEEXPCAP8 (0x040090) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEVCCAP0 (0x040100) /* R/W R 0x1B01 0002 8/16/32 */ +#define SH4A_PCIEVCCAP1 (0x040104) /* R R 0x0000 0001 8/16/32 */ +#define SH4A_PCIEVCCAP2 (0x040108) /* R R 0x0000 0000 8/16/32 */ +#define SH4A_PCIEVCCAP3 (0x04010C) /* R R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEVCCAP4 (0x040110) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEVCCAP5 (0x040114) /* R/W R/W 0x8000 00FF 8/16/32 */ +#define SH4A_PCIEVCCAP6 (0x040118) /* R/W R 0x0002 0000 8/16/32 */ +#define SH4A_PCIEVCCAP7 (0x04011C) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEVCCAP8 (0x040120) /* R/W R/W 0x0000 0000 8/16/32 */ +#define SH4A_PCIEVCCAP9 (0x040124) /* R/W R 0x0002 0000 8/16/32 */ +#define SH4A_PCIENUMCAP0 (0x0001B0) /* RW R 0x0001 0003 8/16/32 */ +#define SH4A_PCIENUMCAP1 (0x0001B4) /* R R 0x0000 0000 8/16/32 */ +#define SH4A_PCIENUMCAP2 (0x0001B8) /* R R 0x0000 0000 8/16/32 */ +#define SH4A_PCIEIDSETR0 (0x041000) /* R/W R 0x0000 FFFF 16/32 */ +#define SH4A_PCIEIDSETR1 (0x041004) /* R/W R 0xFF00 0000 16/32 */ +#define SH4A_PCIEBAR0SETR (0x041008) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEBAR1SETR (0x04100C) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEBAR2SETR (0x041010) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEBAR3SETR (0x041014) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEBAR4SETR (0x041018) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEBAR5SETR (0x04101C) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIECISSETR (0x041020) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEIDSETR2 (0x041024) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEEROMSETR (0x041028) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEDSERSETR0 (0x04102C) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEDSERSETR1 (0x041030) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIECTLR (0x041040) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIETLSR (0x041044) /* R/W1C R 0x0000 0000 16/32 */ +#define SH4A_PCIETLCTLR (0x041048) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEDLSR (0x04104C) /* R/W1C R 0x4003 0000 16/32 */ +#define SH4A_PCIEDLCTLR (0x041050) /* R R 0x0000 0000 16/32 */ +#define SH4A_PCIEMACSR (0x041054) /* R/W1C R 0x0041 0000 16/32 */ +#define SH4A_PCIEMACCTLR (0x041058) /* R/W R 0x0000 0000 16/32 */ +#define PCIEMACCTLR_SCR_DIS (1 << 27) /* scramble disable */ +#define SH4A_PCIEPMSTR (0x04105C) /* R/W1C R 0x0000 0000 16/32 */ +#define SH4A_PCIEPMCTLR (0x041060) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIETLINTENR (0x041064) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEDLINTENR (0x041068) /* R/W R 0x0000 0000 16/32 */ +#define PCIEDLINTENR_DLL_ACT_ENABLE (1 << 31) /* DL active irq */ +#define SH4A_PCIEMACINTENR (0x04106C) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIEPMINTENR (0x041070) /* R/W R 0x0000 0000 16/32 */ +#define SH4A_PCIETXDCTLR (0x044000) /* R/W - H'00000000_00000000 32/64 */ +#define SH4A_PCIETXCTLR (0x044020) /* R/W - H'00000000_00000000 32/64 */ +#define SH4A_PCIETXSR (0x044028) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIETXVC0DCTLR (0x044100) /* R/W - H'00000000_00000000 32/64 */ +#define SH4A_PCIETXVC0SR (0x044108) /* R/W - H'00888000_00000000 32/64 */ +#define SH4A_PCIEVC0PDTXR (0x044110) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0PHTXR (0x044118) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0NPDTXR (0x044120) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0NPHTXR (0x044128) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0CDTXR (0x044130) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0CHTXR (0x044138) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIETXVCXDCTLR (0x044200) /* R/W - H'00000000_00000000 32/64 */ +#define SH4A_PCIETXVCXSR (0x044208) /* R/W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXPDTXR (0x044210) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXPHTXR (0x044218) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXNPDTXR (0x044220) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXNPHTXR (0x044228) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXCDTXR (0x044230) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXCHTXR (0x044238) /* W - H'00000000_00000000 32/64 */ +#define SH4A_PCIERDCTLR (0x046000) /* RW - H'00000000_00000000 32/64 */ +#define SH4A_PCIEERPCTLR (0x046008) /* RW - H'00000000_00000000 32/64 */ +#define SH4A_PCIEERPHR (0x046010) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEERPERR (0x046018) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIERXVC0DCTLR (0x046100) /* RW - H'00000000_00000000 32/64 */ +#define SH4A_PCIERXVC0SR (0x046108) /* RW - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0PDRXR (0x046140) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0PHRXR (0x046148) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0PERR (0x046150) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0NPDRXR (0x046158) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0NPHRXR (0x046160) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0NPERR (0x046168) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0CDRXR (0x046170) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0CHRXR (0x046178) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVC0CERR (0x046180) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIERXVCXDCTLR (0x046200) /* RW - H'00000000_00000000 32/64 */ +#define SH4A_PCIERXVCXSR (0x046208) /* RW - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXPDRXR (0x046240) /* R - H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXPHRXR (0x046248) /* R H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXPERR (0x046250) /* R H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXNPDRXR (0x046258) /* R H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXNPHRXR (0x046260) /* R H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXNPERR (0x046268) /* R H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXCDRXR (0x046270) /* R H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXCHRXR (0x046278) /* R H'00000000_00000000 32/64 */ +#define SH4A_PCIEVCXCERR (0x046280) /* R H'00000000_00000000 32/64 */ + +/* SSI Register Definition for MSI WORK AROUND --hamada */ +#define SH4A_PCI_SSI_BASE 0xFFE00000 /* spw config address */ +#define SH4A_PCI_SSI_BASE_LEN 0x00100000 /* 1MB */ + +#define SH4A_SSICR0 (0x000000) +#define SH4A_SSICR1 (0x010000) +#define SH4A_SSICR2 (0x020000) +#define SH4A_SSICR3 (0x030000) + +#define PCI_REG(x) ((x) + 0x40000) + +static inline void +pci_write_reg(struct pci_channel *chan, unsigned long val, unsigned long reg) +{ + __raw_writel(val, chan->reg_base + reg); +} + +static inline unsigned long +pci_read_reg(struct pci_channel *chan, unsigned long reg) +{ + return __raw_readl(chan->reg_base + reg); +} + +#endif /* __PCI_SH7786_H */ diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h index a0b348068ca..467d9415a32 100644 --- a/arch/sh/include/asm/atomic-irq.h +++ b/arch/sh/include/asm/atomic-irq.h @@ -10,29 +10,29 @@ static inline void atomic_add(int i, atomic_t *v) { unsigned long flags; - local_irq_save(flags); + raw_local_irq_save(flags); v->counter += i; - local_irq_restore(flags); + raw_local_irq_restore(flags); } static inline void atomic_sub(int i, atomic_t *v) { unsigned long flags; - local_irq_save(flags); + raw_local_irq_save(flags); v->counter -= i; - local_irq_restore(flags); + raw_local_irq_restore(flags); } static inline int atomic_add_return(int i, atomic_t *v) { unsigned long temp, flags; - local_irq_save(flags); + raw_local_irq_save(flags); temp = v->counter; temp += i; v->counter = temp; - local_irq_restore(flags); + raw_local_irq_restore(flags); return temp; } @@ -41,11 +41,11 @@ static inline int atomic_sub_return(int i, atomic_t *v) { unsigned long temp, flags; - local_irq_save(flags); + raw_local_irq_save(flags); temp = v->counter; temp -= i; v->counter = temp; - local_irq_restore(flags); + raw_local_irq_restore(flags); return temp; } @@ -54,18 +54,18 @@ static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) { unsigned long flags; - local_irq_save(flags); + raw_local_irq_save(flags); v->counter &= ~mask; - local_irq_restore(flags); + raw_local_irq_restore(flags); } static inline void atomic_set_mask(unsigned int mask, atomic_t *v) { unsigned long flags; - local_irq_save(flags); + raw_local_irq_save(flags); v->counter |= mask; - local_irq_restore(flags); + raw_local_irq_restore(flags); } #endif /* __ASM_SH_ATOMIC_IRQ_H */ diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h index 157c320272c..e8e78137c6f 100644 --- a/arch/sh/include/asm/atomic.h +++ b/arch/sh/include/asm/atomic.h @@ -85,4 +85,6 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) #define smp_mb__after_atomic_inc() barrier() #include <asm-generic/atomic-long.h> +#include <asm-generic/atomic64.h> + #endif /* __ASM_SH_ATOMIC_H */ diff --git a/arch/sh/include/asm/checksum.h b/arch/sh/include/asm/checksum.h index 67496ab0ef0..fc26d1f4b59 100644 --- a/arch/sh/include/asm/checksum.h +++ b/arch/sh/include/asm/checksum.h @@ -1,5 +1,5 @@ #ifdef CONFIG_SUPERH32 # include "checksum_32.h" #else -# include "checksum_64.h" +# include <asm-generic/checksum.h> #endif diff --git a/arch/sh/include/asm/checksum_64.h b/arch/sh/include/asm/checksum_64.h deleted file mode 100644 index 9c62a031a8f..00000000000 --- a/arch/sh/include/asm/checksum_64.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef __ASM_SH_CHECKSUM_64_H -#define __ASM_SH_CHECKSUM_64_H - -/* - * include/asm-sh/checksum_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * Note: when you get a NULL pointer exception here this means someone - * passed in an incorrect kernel address to one of these functions. - * - * If you use these functions directly please don't forget the - * access_ok(). - */ - - -__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, - __wsum sum); - -__wsum csum_partial_copy_from_user(const void __user *src, void *dst, - int len, __wsum sum, int *err_ptr); - -static inline __sum16 csum_fold(__wsum csum) -{ - u32 sum = (__force u32)csum; - sum = (sum & 0xffff) + (sum >> 16); - sum = (sum & 0xffff) + (sum >> 16); - return (__force __sum16)~sum; -} - -__sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -__wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, unsigned short proto, - __wsum sum); - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* __ASM_SH_CHECKSUM_64_H */ diff --git a/arch/sh/include/asm/current.h b/arch/sh/include/asm/current.h index 62b63880b33..4c51401b553 100644 --- a/arch/sh/include/asm/current.h +++ b/arch/sh/include/asm/current.h @@ -1,20 +1 @@ -#ifndef __ASM_SH_CURRENT_H -#define __ASM_SH_CURRENT_H - -/* - * Copyright (C) 1999 Niibe Yutaka - * - */ - -#include <linux/thread_info.h> - -struct task_struct; - -static __inline__ struct task_struct * get_current(void) -{ - return current_thread_info()->task; -} - -#define current get_current() - -#endif /* __ASM_SH_CURRENT_H */ +#include <asm-generic/current.h> diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h index 6bd17847387..04ad0e1e637 100644 --- a/arch/sh/include/asm/dma.h +++ b/arch/sh/include/asm/dma.h @@ -16,13 +16,7 @@ #include <linux/sched.h> #include <linux/sysdev.h> #include <cpu/dma.h> - -/* The maximum address that we can perform a DMA transfer to on this platform */ -/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any - occurrence should be flagged as an error. */ -/* But... */ -/* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */ -#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000) +#include <asm-generic/dma.h> #ifdef CONFIG_NR_DMA_CHANNELS # define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) @@ -137,8 +131,6 @@ extern int dma_xfer(unsigned int chan, unsigned long from, extern int request_dma_bycap(const char **dmac, const char **caps, const char *dev_id); -extern int request_dma(unsigned int chan, const char *dev_id); -extern void free_dma(unsigned int chan); extern int get_dma_residue(unsigned int chan); extern struct dma_info *get_dma_info(unsigned int chan); extern struct dma_channel *get_dma_channel(unsigned int chan); diff --git a/arch/sh/include/asm/ipcbuf.h b/arch/sh/include/asm/ipcbuf.h index 5ffc9972a7e..84c7e51cb6d 100644 --- a/arch/sh/include/asm/ipcbuf.h +++ b/arch/sh/include/asm/ipcbuf.h @@ -1,29 +1 @@ -#ifndef __ASM_SH_IPCBUF_H__ -#define __ASM_SH_IPCBUF_H__ - -/* - * The ipc64_perm structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit mode_t and seq - * - 2 miscellaneous 32-bit values - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid32_t uid; - __kernel_gid32_t gid; - __kernel_uid32_t cuid; - __kernel_gid32_t cgid; - __kernel_mode_t mode; - unsigned short __pad1; - unsigned short seq; - unsigned short __pad2; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* __ASM_SH_IPCBUF_H__ */ +#include <asm-generic/ipcbuf.h> diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h index a2b8c99cc06..df8e1500527 100644 --- a/arch/sh/include/asm/irq.h +++ b/arch/sh/include/asm/irq.h @@ -39,7 +39,6 @@ static inline int generic_irq_demux(int irq) return irq; } -#define irq_canonicalize(irq) (irq) #define irq_demux(irq) sh_mv.mv_irq_demux(irq) void init_IRQ(void); @@ -54,6 +53,7 @@ extern void irq_ctx_exit(int cpu); # define irq_ctx_exit(cpu) do { } while (0) #endif +#include <asm-generic/irq.h> #ifdef CONFIG_CPU_SH5 #include <cpu/irq.h> #endif diff --git a/arch/sh/include/asm/mman.h b/arch/sh/include/asm/mman.h index 7d8b72c91a5..8eebf89f5ab 100644 --- a/arch/sh/include/asm/mman.h +++ b/arch/sh/include/asm/mman.h @@ -1,17 +1 @@ -#ifndef __ASM_SH_MMAN_H -#define __ASM_SH_MMAN_H - -#include <asm-generic/mman-common.h> - -#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ -#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ -#define MAP_LOCKED 0x2000 /* pages are locked */ -#define MAP_NORESERVE 0x4000 /* don't check for reservations */ -#define MAP_POPULATE 0x8000 /* populate (prefault) page tables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#define MCL_CURRENT 1 /* lock all current mappings */ -#define MCL_FUTURE 2 /* lock all future mappings */ - -#endif /* __ASM_SH_MMAN_H */ +#include <asm-generic/mman.h> diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h index 2a9c55f1a83..67d8946db19 100644 --- a/arch/sh/include/asm/mmu_context.h +++ b/arch/sh/include/asm/mmu_context.h @@ -122,30 +122,30 @@ static inline void switch_mm(struct mm_struct *prev, unsigned int cpu = smp_processor_id(); if (likely(prev != next)) { - cpu_set(cpu, next->cpu_vm_mask); + cpumask_set_cpu(cpu, mm_cpumask(next)); set_TTB(next->pgd); activate_context(next, cpu); } else - if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) + if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next))) activate_context(next, cpu); } + +#define activate_mm(prev, next) switch_mm((prev),(next),NULL) +#define deactivate_mm(tsk,mm) do { } while (0) +#define enter_lazy_tlb(mm,tsk) do { } while (0) + #else -#define get_mmu_context(mm) do { } while (0) -#define init_new_context(tsk,mm) (0) -#define destroy_context(mm) do { } while (0) + #define set_asid(asid) do { } while (0) #define get_asid() (0) #define cpu_asid(cpu, mm) ({ (void)cpu; NO_CONTEXT; }) #define switch_and_save_asid(asid) (0) #define set_TTB(pgd) do { } while (0) #define get_TTB() (0) -#define activate_context(mm,cpu) do { } while (0) -#define switch_mm(prev,next,tsk) do { } while (0) -#endif /* CONFIG_MMU */ -#define activate_mm(prev, next) switch_mm((prev),(next),NULL) -#define deactivate_mm(tsk,mm) do { } while (0) -#define enter_lazy_tlb(mm,tsk) do { } while (0) +#include <asm-generic/mmu_context.h> + +#endif /* CONFIG_MMU */ #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4) /* diff --git a/arch/sh/include/asm/module.h b/arch/sh/include/asm/module.h index 46eccd33166..068bf165975 100644 --- a/arch/sh/include/asm/module.h +++ b/arch/sh/include/asm/module.h @@ -1,17 +1,7 @@ #ifndef _ASM_SH_MODULE_H #define _ASM_SH_MODULE_H -/* - * This file contains the SH architecture specific module code. - */ - -struct mod_arch_specific { - /* Nothing to see here .. */ -}; - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr +#include <asm-generic/module.h> #ifdef CONFIG_CPU_LITTLE_ENDIAN # ifdef CONFIG_CPU_SH2 diff --git a/arch/sh/include/asm/msgbuf.h b/arch/sh/include/asm/msgbuf.h index 517432343fb..809134c644a 100644 --- a/arch/sh/include/asm/msgbuf.h +++ b/arch/sh/include/asm/msgbuf.h @@ -1,31 +1 @@ -#ifndef __ASM_SH_MSGBUF_H -#define __ASM_SH_MSGBUF_H - -/* - * The msqid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct msqid64_ds { - struct ipc64_perm msg_perm; - __kernel_time_t msg_stime; /* last msgsnd time */ - unsigned long __unused1; - __kernel_time_t msg_rtime; /* last msgrcv time */ - unsigned long __unused2; - __kernel_time_t msg_ctime; /* last change time */ - unsigned long __unused3; - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused4; - unsigned long __unused5; -}; - -#endif /* __ASM_SH_MSGBUF_H */ +#include <asm-generic/msgbuf.h> diff --git a/arch/sh/include/asm/param.h b/arch/sh/include/asm/param.h index ae245afdfd6..965d4542797 100644 --- a/arch/sh/include/asm/param.h +++ b/arch/sh/include/asm/param.h @@ -1,22 +1 @@ -#ifndef __ASM_SH_PARAM_H -#define __ASM_SH_PARAM_H - -#ifdef __KERNEL__ -# define HZ CONFIG_HZ -# define USER_HZ 100 /* User interfaces are in "ticks" */ -# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ -#endif - -#ifndef HZ -#define HZ 100 -#endif - -#define EXEC_PAGESIZE 4096 - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - -#endif /* __ASM_SH_PARAM_H */ +#include <asm-generic/param.h> diff --git a/arch/sh/include/asm/parport.h b/arch/sh/include/asm/parport.h index f67ba60a2ac..cf252af6459 100644 --- a/arch/sh/include/asm/parport.h +++ b/arch/sh/include/asm/parport.h @@ -1,16 +1 @@ -/* - * Copyright (C) 1999, 2000 Tim Waugh <tim@cyberelk.demon.co.uk> - * - * This file should only be included by drivers/parport/parport_pc.c. - */ -#ifndef __ASM_SH_PARPORT_H -#define __ASM_SH_PARPORT_H - -static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma); - -static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma) -{ - return parport_pc_find_isa_ports(autoirq, autodma); -} - -#endif /* __ASM_SH_PARPORT_H */ +#include <asm-generic/parport.h> diff --git a/arch/sh/include/asm/perf_counter.h b/arch/sh/include/asm/perf_counter.h new file mode 100644 index 00000000000..a8153c2aa6f --- /dev/null +++ b/arch/sh/include/asm/perf_counter.h @@ -0,0 +1,7 @@ +#ifndef __ASM_SH_PERF_COUNTER_H +#define __ASM_SH_PERF_COUNTER_H + +/* SH only supports software counters through this interface. */ +#define set_perf_counter_pending() do { } while (0) + +#endif /* __ASM_SH_PERF_COUNTER_H */ diff --git a/arch/sh/include/asm/posix_types_32.h b/arch/sh/include/asm/posix_types_32.h index 2172732c55c..6a9ceaaf1ae 100644 --- a/arch/sh/include/asm/posix_types_32.h +++ b/arch/sh/include/asm/posix_types_32.h @@ -1,118 +1,29 @@ -#ifndef __ASM_SH_POSIX_TYPES_H -#define __ASM_SH_POSIX_TYPES_H +#ifndef __ASM_SH_POSIX_TYPES_32_H +#define __ASM_SH_POSIX_TYPES_32_H -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; typedef unsigned short __kernel_mode_t; +#define __kernel_mode_t __kernel_mode_t typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; +#define __kernel_nlink_t __kernel_nlink_t typedef unsigned short __kernel_ipc_pid_t; +#define __kernel_ipc_pid_t __kernel_ipc_pid_t typedef unsigned short __kernel_uid_t; +#define __kernel_uid_t __kernel_uid_t typedef unsigned short __kernel_gid_t; -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; +#define __kernel_gid_t __kernel_gid_t + typedef unsigned int __kernel_uid32_t; +#define __kernel_uid32_t __kernel_uid32_t typedef unsigned int __kernel_gid32_t; +#define __kernel_gid32_t __kernel_gid32_t typedef unsigned short __kernel_old_uid_t; +#define __kernel_old_uid_t __kernel_old_uid_t typedef unsigned short __kernel_old_gid_t; +#define __kernel_old_gid_t __kernel_old_gid_t typedef unsigned short __kernel_old_dev_t; +#define __kernel_old_dev_t __kernel_old_dev_t -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); -} - - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *__p) -{ - unsigned long *__tmp = __p->fds_bits; - int __i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - __tmp[ 8] = 0; __tmp[ 9] = 0; - __tmp[10] = 0; __tmp[11] = 0; - __tmp[12] = 0; __tmp[13] = 0; - __tmp[14] = 0; __tmp[15] = 0; - return; - - case 8: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - return; - - case 4: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - return; - } - } - __i = __FDSET_LONGS; - while (__i) { - __i--; - *__tmp = 0; - __tmp++; - } -} - -#endif /* defined(__KERNEL__) */ +#include <asm-generic/posix_types.h> -#endif /* __ASM_SH_POSIX_TYPES_H */ +#endif /* __ASM_SH_POSIX_TYPES_32_H */ diff --git a/arch/sh/include/asm/posix_types_64.h b/arch/sh/include/asm/posix_types_64.h index f83e9bd463d..8cd11485c06 100644 --- a/arch/sh/include/asm/posix_types_64.h +++ b/arch/sh/include/asm/posix_types_64.h @@ -1,127 +1,34 @@ -#ifndef __ASM_SH64_POSIX_TYPES_H -#define __ASM_SH64_POSIX_TYPES_H +#ifndef __ASM_SH_POSIX_TYPES_64_H +#define __ASM_SH_POSIX_TYPES_64_H -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * include/asm-sh64/posix_types.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; typedef unsigned short __kernel_mode_t; +#define __kernel_mode_t __kernel_mode_t typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; +#define __kernel_nlink_t __kernel_nlink_t typedef unsigned short __kernel_ipc_pid_t; +#define __kernel_ipc_pid_t __kernel_ipc_pid_t typedef unsigned short __kernel_uid_t; +#define __kernel_uid_t __kernel_uid_t typedef unsigned short __kernel_gid_t; +#define __kernel_gid_t __kernel_gid_t typedef long unsigned int __kernel_size_t; +#define __kernel_size_t __kernel_size_t typedef int __kernel_ssize_t; +#define __kernel_ssize_t __kernel_ssize_t typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; +#define __kernel_ptrdiff_t __kernel_ptrdiff_t typedef unsigned int __kernel_uid32_t; +#define __kernel_uid32_t __kernel_uid32_t typedef unsigned int __kernel_gid32_t; +#define __kernel_gid32_t __kernel_gid32_t typedef unsigned short __kernel_old_uid_t; +#define __kernel_old_uid_t __kernel_old_uid_t typedef unsigned short __kernel_old_gid_t; +#define __kernel_old_gid_t __kernel_old_gid_t typedef unsigned short __kernel_old_dev_t; +#define __kernel_old_dev_t __kernel_old_dev_t -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); -} - - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *__p) -{ - unsigned long *__tmp = __p->fds_bits; - int __i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - __tmp[ 8] = 0; __tmp[ 9] = 0; - __tmp[10] = 0; __tmp[11] = 0; - __tmp[12] = 0; __tmp[13] = 0; - __tmp[14] = 0; __tmp[15] = 0; - return; - - case 8: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - return; - - case 4: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - return; - } - } - __i = __FDSET_LONGS; - while (__i) { - __i--; - *__tmp = 0; - __tmp++; - } -} - -#endif /* defined(__KERNEL__) */ +#include <asm-generic/posix_types.h> -#endif /* __ASM_SH64_POSIX_TYPES_H */ +#endif /* __ASM_SH_POSIX_TYPES_64_H */ diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h index c693d268a41..327cc2e4c97 100644 --- a/arch/sh/include/asm/scatterlist.h +++ b/arch/sh/include/asm/scatterlist.h @@ -1,28 +1,8 @@ #ifndef __ASM_SH_SCATTERLIST_H #define __ASM_SH_SCATTERLIST_H -#include <asm/types.h> - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; /* for highmem, page offset */ - unsigned int length; - dma_addr_t dma_address; - unsigned int dma_length; -}; - #define ISA_DMA_THRESHOLD PHYS_ADDR_MASK -/* These macros should be used after a pci_map_sg call has been done - * to get bus addresses of each of the SG entries and their lengths. - * You should only work with the number of sg entries pci_map_sg - * returns, or alternatively stop on the first sg_dma_len(sg) which - * is 0. - */ -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) +#include <asm-generic/scatterlist.h> -#endif /* !(__ASM_SH_SCATTERLIST_H) */ +#endif /* __ASM_SH_SCATTERLIST_H */ diff --git a/arch/sh/include/asm/sembuf.h b/arch/sh/include/asm/sembuf.h index d79f3bd570b..7673b83cfef 100644 --- a/arch/sh/include/asm/sembuf.h +++ b/arch/sh/include/asm/sembuf.h @@ -1,25 +1 @@ -#ifndef __ASM_SH_SEMBUF_H -#define __ASM_SH_SEMBUF_H - -/* - * The semid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ - __kernel_time_t sem_otime; /* last semop time */ - unsigned long __unused1; - __kernel_time_t sem_ctime; /* last change time */ - unsigned long __unused2; - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* __ASM_SH_SEMBUF_H */ +#include <asm-generic/sembuf.h> diff --git a/arch/sh/include/asm/serial.h b/arch/sh/include/asm/serial.h index 11f854dd136..a0cb0caff15 100644 --- a/arch/sh/include/asm/serial.h +++ b/arch/sh/include/asm/serial.h @@ -1,19 +1 @@ -/* - * include/asm-sh/serial.h - * - * Configuration details for 8250, 16450, 16550, etc. serial ports - */ - -#ifndef _ASM_SERIAL_H -#define _ASM_SERIAL_H - -/* - * This assumes you have a 1.8432 MHz clock for your UART. - * - * It'd be nice if someone built a serial card with a 24.576 MHz - * clock, since the 16550A is capable of handling a top speed of 1.5 - * megabits/second; but this requires the faster clock. - */ -#define BASE_BAUD ( 1843200 / 16 ) - -#endif /* _ASM_SERIAL_H */ +#include <asm-generic/serial.h> diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h index d450bcf59ee..ce3743599b2 100644 --- a/arch/sh/include/asm/setup.h +++ b/arch/sh/include/asm/setup.h @@ -1,7 +1,7 @@ #ifndef _SH_SETUP_H #define _SH_SETUP_H -#define COMMAND_LINE_SIZE 256 +#include <asm-generic/setup.h> #ifdef __KERNEL__ /* diff --git a/arch/sh/include/asm/shmbuf.h b/arch/sh/include/asm/shmbuf.h index b2101f49052..83c05fc2de3 100644 --- a/arch/sh/include/asm/shmbuf.h +++ b/arch/sh/include/asm/shmbuf.h @@ -1,42 +1 @@ -#ifndef __ASM_SH_SHMBUF_H -#define __ASM_SH_SHMBUF_H - -/* - * The shmid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_time_t shm_atime; /* last attach time */ - unsigned long __unused1; - __kernel_time_t shm_dtime; /* last detach time */ - unsigned long __unused2; - __kernel_time_t shm_ctime; /* last change time */ - unsigned long __unused3; - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused4; - unsigned long __unused5; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* __ASM_SH_SHMBUF_H */ +#include <asm-generic/shmbuf.h> diff --git a/arch/sh/include/asm/signal.h b/arch/sh/include/asm/signal.h index 9cc5f014468..9ac530a90bc 100644 --- a/arch/sh/include/asm/signal.h +++ b/arch/sh/include/asm/signal.h @@ -1,114 +1,10 @@ #ifndef __ASM_SH_SIGNAL_H #define __ASM_SH_SIGNAL_H -#include <linux/types.h> - -/* Avoid too many header ordering problems. */ -struct pt_regs; -struct siginfo; - -#ifdef __KERNEL__ -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -#define _NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - #define SA_RESTORER 0x04000000 -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 +#include <asm-generic/signal.h> -#include <asm-generic/signal-defs.h> - -#ifdef __KERNEL__ struct old_sigaction { __sighandler_t sa_handler; old_sigset_t sa_mask; @@ -116,45 +12,4 @@ struct old_sigaction { void (*sa_restorer)(void); }; -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - void (*sa_restorer)(void); - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ -#include <asm/sigcontext.h> - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* __KERNEL__ */ - #endif /* __ASM_SH_SIGNAL_H */ diff --git a/arch/sh/include/asm/smp.h b/arch/sh/include/asm/smp.h index c24e9c6a173..ca64f43abe6 100644 --- a/arch/sh/include/asm/smp.h +++ b/arch/sh/include/asm/smp.h @@ -43,7 +43,8 @@ void plat_start_cpu(unsigned int cpu, unsigned long entry_point); void plat_send_ipi(unsigned int cpu, unsigned int message); void arch_send_call_function_single_ipi(int cpu); -void arch_send_call_function_ipi(cpumask_t mask); +extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); +#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask #else diff --git a/arch/sh/include/asm/socket.h b/arch/sh/include/asm/socket.h index 345653b9682..6b71384b9d8 100644 --- a/arch/sh/include/asm/socket.h +++ b/arch/sh/include/asm/socket.h @@ -1,60 +1 @@ -#ifndef __ASM_SH_SOCKET_H -#define __ASM_SH_SOCKET_H - -#include <asm/sockios.h> - -/* For setsockopt(2) */ -#define SOL_SOCKET 1 - -#define SO_DEBUG 1 -#define SO_REUSEADDR 2 -#define SO_TYPE 3 -#define SO_ERROR 4 -#define SO_DONTROUTE 5 -#define SO_BROADCAST 6 -#define SO_SNDBUF 7 -#define SO_RCVBUF 8 -#define SO_RCVBUFFORCE 32 -#define SO_SNDBUFFORCE 33 -#define SO_KEEPALIVE 9 -#define SO_OOBINLINE 10 -#define SO_NO_CHECK 11 -#define SO_PRIORITY 12 -#define SO_LINGER 13 -#define SO_BSDCOMPAT 14 -/* To add :#define SO_REUSEPORT 15 */ -#define SO_PASSCRED 16 -#define SO_PEERCRED 17 -#define SO_RCVLOWAT 18 -#define SO_SNDLOWAT 19 -#define SO_RCVTIMEO 20 -#define SO_SNDTIMEO 21 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 22 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 -#define SO_SECURITY_ENCRYPTION_NETWORK 24 - -#define SO_BINDTODEVICE 25 - -/* Socket filtering */ -#define SO_ATTACH_FILTER 26 -#define SO_DETACH_FILTER 27 - -#define SO_PEERNAME 28 -#define SO_TIMESTAMP 29 -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_ACCEPTCONN 30 - -#define SO_PEERSEC 31 -#define SO_PASSSEC 34 -#define SO_TIMESTAMPNS 35 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 36 - -#define SO_TIMESTAMPING 37 -#define SCM_TIMESTAMPING SO_TIMESTAMPING - -#endif /* __ASM_SH_SOCKET_H */ +#include <asm-generic/socket.h> diff --git a/arch/sh/include/asm/swab.h b/arch/sh/include/asm/swab.h index 0e08fe54ad7..1cd09767a7a 100644 --- a/arch/sh/include/asm/swab.h +++ b/arch/sh/include/asm/swab.h @@ -7,8 +7,7 @@ */ #include <linux/compiler.h> #include <linux/types.h> - -#define __SWAB_64_THRU_32__ +#include <asm-generic/swab.h> static inline __attribute_const__ __u32 __arch_swab32(__u32 x) { diff --git a/arch/sh/include/asm/termbits.h b/arch/sh/include/asm/termbits.h index 77db116948c..3935b106de7 100644 --- a/arch/sh/include/asm/termbits.h +++ b/arch/sh/include/asm/termbits.h @@ -1,198 +1 @@ -#ifndef __ASM_SH_TERMBITS_H -#define __ASM_SH_TERMBITS_H - -#include <linux/posix_types.h> - -typedef unsigned char cc_t; -typedef unsigned int speed_t; -typedef unsigned int tcflag_t; - -#define NCCS 19 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ -}; - -struct termios2 { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VTIME 5 -#define VMIN 6 -#define VSWTC 7 -#define VSTART 8 -#define VSTOP 9 -#define VSUSP 10 -#define VEOL 11 -#define VREPRINT 12 -#define VDISCARD 13 -#define VWERASE 14 -#define VLNEXT 15 -#define VEOL2 16 - -/* c_iflag bits */ -#define IGNBRK 0000001 -#define BRKINT 0000002 -#define IGNPAR 0000004 -#define PARMRK 0000010 -#define INPCK 0000020 -#define ISTRIP 0000040 -#define INLCR 0000100 -#define IGNCR 0000200 -#define ICRNL 0000400 -#define IUCLC 0001000 -#define IXON 0002000 -#define IXANY 0004000 -#define IXOFF 0010000 -#define IMAXBEL 0020000 -#define IUTF8 0040000 - -/* c_oflag bits */ -#define OPOST 0000001 -#define OLCUC 0000002 -#define ONLCR 0000004 -#define OCRNL 0000010 -#define ONOCR 0000020 -#define ONLRET 0000040 -#define OFILL 0000100 -#define OFDEL 0000200 -#define NLDLY 0000400 -#define NL0 0000000 -#define NL1 0000400 -#define CRDLY 0003000 -#define CR0 0000000 -#define CR1 0001000 -#define CR2 0002000 -#define CR3 0003000 -#define TABDLY 0014000 -#define TAB0 0000000 -#define TAB1 0004000 -#define TAB2 0010000 -#define TAB3 0014000 -#define XTABS 0014000 -#define BSDLY 0020000 -#define BS0 0000000 -#define BS1 0020000 -#define VTDLY 0040000 -#define VT0 0000000 -#define VT1 0040000 -#define FFDLY 0100000 -#define FF0 0000000 -#define FF1 0100000 - -/* c_cflag bit meaning */ -#define CBAUD 0010017 -#define B0 0000000 /* hang up */ -#define B50 0000001 -#define B75 0000002 -#define B110 0000003 -#define B134 0000004 -#define B150 0000005 -#define B200 0000006 -#define B300 0000007 -#define B600 0000010 -#define B1200 0000011 -#define B1800 0000012 -#define B2400 0000013 -#define B4800 0000014 -#define B9600 0000015 -#define B19200 0000016 -#define B38400 0000017 -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0000060 -#define CS5 0000000 -#define CS6 0000020 -#define CS7 0000040 -#define CS8 0000060 -#define CSTOPB 0000100 -#define CREAD 0000200 -#define PARENB 0000400 -#define PARODD 0001000 -#define HUPCL 0002000 -#define CLOCAL 0004000 -#define CBAUDEX 0010000 -#define BOTHER 0010000 -#define B57600 0010001 -#define B115200 0010002 -#define B230400 0010003 -#define B460800 0010004 -#define B500000 0010005 -#define B576000 0010006 -#define B921600 0010007 -#define B1000000 0010010 -#define B1152000 0010011 -#define B1500000 0010012 -#define B2000000 0010013 -#define B2500000 0010014 -#define B3000000 0010015 -#define B3500000 0010016 -#define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate */ -#define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ - -#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ - -/* c_lflag bits */ -#define ISIG 0000001 -#define ICANON 0000002 -#define XCASE 0000004 -#define ECHO 0000010 -#define ECHOE 0000020 -#define ECHOK 0000040 -#define ECHONL 0000100 -#define NOFLSH 0000200 -#define TOSTOP 0000400 -#define ECHOCTL 0001000 -#define ECHOPRT 0002000 -#define ECHOKE 0004000 -#define FLUSHO 0010000 -#define PENDIN 0040000 -#define IEXTEN 0100000 - -/* tcflow() and TCXONC use these */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* tcflush() and TCFLSH use these */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* tcsetattr uses these */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif /* __ASM_SH_TERMBITS_H */ +#include <asm-generic/termbits.h> diff --git a/arch/sh/include/asm/termios.h b/arch/sh/include/asm/termios.h index 0a8c793c76f..280d78a9d96 100644 --- a/arch/sh/include/asm/termios.h +++ b/arch/sh/include/asm/termios.h @@ -1,90 +1 @@ -#ifndef __ASM_SH_TERMIOS_H -#define __ASM_SH_TERMIOS_H - -#include <asm/termbits.h> -#include <asm/ioctls.h> - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ - -/* intr=^C quit=^\ erase=del kill=^U - eof=^D vtime=\0 vmin=\1 sxtc=\0 - start=^Q stop=^S susp=^Z eol=\0 - reprint=^R discard=^U werase=^W lnext=^V - eol2=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" - -/* - * Translate a "termio" structure into a "termios". Ugh. - */ -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - *(unsigned short *) &(termios)->x = __tmp; \ -} - -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ - copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - */ -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - put_user((termios)->c_iflag, &(termio)->c_iflag); \ - put_user((termios)->c_oflag, &(termio)->c_oflag); \ - put_user((termios)->c_cflag, &(termio)->c_cflag); \ - put_user((termios)->c_lflag, &(termio)->c_lflag); \ - put_user((termios)->c_line, &(termio)->c_line); \ - copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ -}) - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) -#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) - -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_TERMIOS_H */ +#include <asm-generic/termios.h> diff --git a/arch/sh/include/asm/timex.h b/arch/sh/include/asm/timex.h index a873e24113c..b556d49e5f2 100644 --- a/arch/sh/include/asm/timex.h +++ b/arch/sh/include/asm/timex.h @@ -8,11 +8,6 @@ #define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */ -typedef unsigned long long cycles_t; - -static __inline__ cycles_t get_cycles (void) -{ - return 0; -} +#include <asm-generic/timex.h> #endif /* __ASM_SH_TIMEX_H */ diff --git a/arch/sh/include/asm/topology.h b/arch/sh/include/asm/topology.h index 8489a0905a8..b69ee850906 100644 --- a/arch/sh/include/asm/topology.h +++ b/arch/sh/include/asm/topology.h @@ -35,9 +35,6 @@ #define cpumask_of_node(node) ((void)node, cpu_online_mask) #define pcibus_to_node(bus) ((void)(bus), -1) -#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ - CPU_MASK_ALL : \ - node_to_cpumask(pcibus_to_node(bus))) #define cpumask_of_pcibus(bus) (pcibus_to_node(bus) == -1 ? \ CPU_MASK_ALL_PTR : \ cpumask_of_node(pcibus_to_node(bus))) diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h index b13caca62a7..c7f3c94837d 100644 --- a/arch/sh/include/asm/types.h +++ b/arch/sh/include/asm/types.h @@ -1,27 +1,14 @@ #ifndef __ASM_SH_TYPES_H #define __ASM_SH_TYPES_H -#include <asm-generic/int-ll64.h> - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -#endif /* __ASSEMBLY__ */ +#include <asm-generic/types.h> /* * These aren't exported outside the kernel to avoid name space clashes */ #ifdef __KERNEL__ - -#define BITS_PER_LONG 32 - #ifndef __ASSEMBLY__ -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - #ifdef CONFIG_SUPERH32 typedef u16 insn_size_t; #else @@ -29,7 +16,6 @@ typedef u32 insn_size_t; #endif #endif /* __ASSEMBLY__ */ - #endif /* __KERNEL__ */ #endif /* __ASM_SH_TYPES_H */ diff --git a/arch/sh/include/asm/ucontext.h b/arch/sh/include/asm/ucontext.h index 202ef1d5a3c..9bc07b9f30f 100644 --- a/arch/sh/include/asm/ucontext.h +++ b/arch/sh/include/asm/ucontext.h @@ -1,12 +1 @@ -#ifndef __ASM_SH_UCONTEXT_H -#define __ASM_SH_UCONTEXT_H - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - struct sigcontext uc_mcontext; - sigset_t uc_sigmask; /* mask last for extensibility */ -}; - -#endif /* __ASM_SH_UCONTEXT_H */ +#include <asm-generic/ucontext.h> diff --git a/arch/sh/include/asm/unaligned.h b/arch/sh/include/asm/unaligned.h index 8c0ad5e4487..7d14e066996 100644 --- a/arch/sh/include/asm/unaligned.h +++ b/arch/sh/include/asm/unaligned.h @@ -6,19 +6,7 @@ #include <asm/unaligned-sh4a.h> #else /* Otherwise, SH can't handle unaligned accesses. */ -#ifdef __LITTLE_ENDIAN__ -# include <linux/unaligned/le_struct.h> -# include <linux/unaligned/be_byteshift.h> -# include <linux/unaligned/generic.h> -# define get_unaligned __get_unaligned_le -# define put_unaligned __put_unaligned_le -#else -# include <linux/unaligned/be_struct.h> -# include <linux/unaligned/le_byteshift.h> -# include <linux/unaligned/generic.h> -# define get_unaligned __get_unaligned_be -# define put_unaligned __put_unaligned_be -#endif +#include <asm-generic/unaligned.h> #endif #endif /* _ASM_SH_UNALIGNED_H */ diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h index 65197086a1c..61d6ad93d78 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/asm/unistd_32.h @@ -344,8 +344,9 @@ #define __NR_preadv 333 #define __NR_pwritev 334 #define __NR_rt_tgsigqueueinfo 335 +#define __NR_perf_counter_open 336 -#define NR_syscalls 336 +#define NR_syscalls 337 #ifdef __KERNEL__ diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h index 8014aea88ec..a751699afda 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/asm/unistd_64.h @@ -384,10 +384,11 @@ #define __NR_preadv 361 #define __NR_pwritev 362 #define __NR_rt_tgsigqueueinfo 363 +#define __NR_perf_counter_open 364 #ifdef __KERNEL__ -#define NR_syscalls 364 +#define NR_syscalls 365 #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/arch/sh/include/mach-common/mach/highlander.h b/arch/sh/include/mach-common/mach/highlander.h index bd26a848cb0..5d9d4d5154b 100644 --- a/arch/sh/include/mach-common/mach/highlander.h +++ b/arch/sh/include/mach-common/mach/highlander.h @@ -2,6 +2,9 @@ #define __ASM_SH_RENESAS_R7780RP_H /* Box specific addresses. */ +#define PA_NORFLASH_ADDR 0x00000000 +#define PA_NORFLASH_SIZE 0x04000000 + #if defined(CONFIG_SH_R7780MP) #define PA_BCR 0xa4000000 /* FPGA */ #define PA_SDPOW (-1) diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c index 275942e58e4..6dfe2cced3f 100644 --- a/arch/sh/kernel/cpu/clock-cpg.c +++ b/arch/sh/kernel/cpu/clock-cpg.c @@ -1,6 +1,6 @@ #include <linux/clk.h> #include <linux/compiler.h> -#include <linux/bootmem.h> +#include <linux/slab.h> #include <linux/io.h> #include <asm/clock.h> @@ -127,10 +127,11 @@ int __init sh_clk_div6_register(struct clk *clks, int nr) int k; freq_table_size *= (nr_divs + 1); - - freq_table = alloc_bootmem(freq_table_size * nr); - if (!freq_table) + freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL); + if (!freq_table) { + pr_err("sh_clk_div6_register: unable to alloc memory\n"); return -ENOMEM; + } for (k = 0; !ret && (k < nr); k++) { clkp = clks + k; @@ -175,10 +176,11 @@ int __init sh_clk_div4_register(struct clk *clks, int nr, int k; freq_table_size *= (nr_divs + 1); - - freq_table = alloc_bootmem(freq_table_size * nr); - if (!freq_table) + freq_table = kzalloc(freq_table_size * nr, GFP_KERNEL); + if (!freq_table) { + pr_err("sh_clk_div4_register: unable to alloc memory\n"); return -ENOMEM; + } for (k = 0; !ret && (k < nr); k++) { clkp = clks + k; diff --git a/arch/sh/kernel/cpu/sh4a/smp-shx3.c b/arch/sh/kernel/cpu/sh4a/smp-shx3.c index b8869aa20de..2b6b0d50c57 100644 --- a/arch/sh/kernel/cpu/sh4a/smp-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/smp-shx3.c @@ -35,8 +35,7 @@ void __init plat_smp_setup(void) unsigned int cpu = 0; int i, num; - cpus_clear(cpu_possible_map); - cpu_set(cpu, cpu_possible_map); + init_cpu_possible(cpumask_of(cpu)); __cpu_number_map[0] = 0; __cpu_logical_map[0] = 0; @@ -46,7 +45,7 @@ void __init plat_smp_setup(void) * for the total number of cores. */ for (i = 1, num = 0; i < NR_CPUS; i++) { - cpu_set(i, cpu_possible_map); + set_cpu_possible(i, true); __cpu_number_map[i] = ++num; __cpu_logical_map[num] = i; } diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c index 4c3247477aa..066f37dc32a 100644 --- a/arch/sh/kernel/ftrace.c +++ b/arch/sh/kernel/ftrace.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2008 Matt Fleming <mjf@gentoo.org> + * Copyright (C) 2008 Matt Fleming <matt@console-pimps.org> * Copyright (C) 2008 Paul Mundt <lethal@linux-sh.org> * * Code for replacing ftrace calls with jumps. @@ -19,30 +19,37 @@ #include <asm/ftrace.h> #include <asm/cacheflush.h> -static unsigned char ftrace_nop[] = { - 0x09, 0x00, /* nop */ - 0x09, 0x00, /* nop */ -}; - static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE]; -unsigned char *ftrace_nop_replace(void) +static unsigned char ftrace_nop[4]; +/* + * If we're trying to nop out a call to a function, we instead + * place a call to the address after the memory table. + * + * 8c011060 <a>: + * 8c011060: 02 d1 mov.l 8c01106c <a+0xc>,r1 + * 8c011062: 22 4f sts.l pr,@-r15 + * 8c011064: 02 c7 mova 8c011070 <a+0x10>,r0 + * 8c011066: 2b 41 jmp @r1 + * 8c011068: 2a 40 lds r0,pr + * 8c01106a: 09 00 nop + * 8c01106c: 68 24 .word 0x2468 <--- ip + * 8c01106e: 1d 8c .word 0x8c1d + * 8c011070: 26 4f lds.l @r15+,pr <--- ip + MCOUNT_INSN_SIZE + * + * We write 0x8c011070 to 0x8c01106c so that on entry to a() we branch + * past the _mcount call and continue executing code like normal. + */ +static unsigned char *ftrace_nop_replace(unsigned long ip) { + __raw_writel(ip + MCOUNT_INSN_SIZE, ftrace_nop); return ftrace_nop; } -static int is_sh_nop(unsigned char *ip) -{ - return strncmp(ip, ftrace_nop, sizeof(ftrace_nop)); -} - -unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) +static unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) { /* Place the address in the memory table. */ - if (addr == CALLER_ADDR) - __raw_writel(addr + MCOUNT_INSN_OFFSET, ftrace_replaced_code); - else - __raw_writel(addr, ftrace_replaced_code); + __raw_writel(addr, ftrace_replaced_code); /* * No locking needed, this must be called via kstop_machine @@ -51,7 +58,7 @@ unsigned char *ftrace_call_replace(unsigned long ip, unsigned long addr) return ftrace_replaced_code; } -int ftrace_modify_code(unsigned long ip, unsigned char *old_code, +static int ftrace_modify_code(unsigned long ip, unsigned char *old_code, unsigned char *new_code) { unsigned char replaced[MCOUNT_INSN_SIZE]; @@ -66,13 +73,6 @@ int ftrace_modify_code(unsigned long ip, unsigned char *old_code, * kstop_machine, or before SMP starts. */ - /* - * If we're trying to nop out a call to a function, we instead - * place a call to the address after the memory table. - */ - if (is_sh_nop(new_code) == 0) - __raw_writel(ip + MCOUNT_INSN_SIZE, (unsigned long)new_code); - /* read the text we want to modify */ if (probe_kernel_read(replaced, (void *)ip, MCOUNT_INSN_SIZE)) return -EFAULT; @@ -92,13 +92,13 @@ int ftrace_modify_code(unsigned long ip, unsigned char *old_code, int ftrace_update_ftrace_func(ftrace_func_t func) { - unsigned long ip = (unsigned long)(&ftrace_call); + unsigned long ip = (unsigned long)(&ftrace_call) + MCOUNT_INSN_OFFSET; unsigned char old[MCOUNT_INSN_SIZE], *new; - memcpy(old, (unsigned char *)(ip + MCOUNT_INSN_OFFSET), MCOUNT_INSN_SIZE); + memcpy(old, (unsigned char *)ip, MCOUNT_INSN_SIZE); new = ftrace_call_replace(ip, (unsigned long)func); - return ftrace_modify_code(ip + MCOUNT_INSN_OFFSET, old, new); + return ftrace_modify_code(ip, old, new); } int ftrace_make_nop(struct module *mod, @@ -108,7 +108,7 @@ int ftrace_make_nop(struct module *mod, unsigned long ip = rec->ip; old = ftrace_call_replace(ip, addr); - new = ftrace_nop_replace(); + new = ftrace_nop_replace(ip); return ftrace_modify_code(rec->ip, old, new); } @@ -118,7 +118,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) unsigned char *new, *old; unsigned long ip = rec->ip; - old = ftrace_nop_replace(); + old = ftrace_nop_replace(ip); new = ftrace_call_replace(ip, addr); return ftrace_modify_code(rec->ip, old, new); diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c index 8f54ef0cfbc..f5bd156ea50 100644 --- a/arch/sh/kernel/sh_ksyms_64.c +++ b/arch/sh/kernel/sh_ksyms_64.c @@ -38,13 +38,6 @@ EXPORT_SYMBOL(clear_user_page); EXPORT_SYMBOL(flush_dcache_page); #endif -/* Networking helper routines. */ -EXPORT_SYMBOL(csum_partial); -EXPORT_SYMBOL(csum_partial_copy_nocheck); -#ifdef CONFIG_IPV6 -EXPORT_SYMBOL(csum_ipv6_magic); -#endif - #ifdef CONFIG_VT EXPORT_SYMBOL(screen_info); #endif diff --git a/arch/sh/kernel/smp.c b/arch/sh/kernel/smp.c index 8f402741261..442d8d47a41 100644 --- a/arch/sh/kernel/smp.c +++ b/arch/sh/kernel/smp.c @@ -47,7 +47,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) plat_prepare_cpus(max_cpus); #ifndef CONFIG_HOTPLUG_CPU - cpu_present_map = cpu_possible_map; + init_cpu_present(&cpu_possible_map); #endif } @@ -58,8 +58,8 @@ void __devinit smp_prepare_boot_cpu(void) __cpu_number_map[0] = cpu; __cpu_logical_map[0] = cpu; - cpu_set(cpu, cpu_online_map); - cpu_set(cpu, cpu_possible_map); + set_cpu_online(cpu, true); + set_cpu_possible(cpu, true); } asmlinkage void __cpuinit start_secondary(void) @@ -171,11 +171,11 @@ void smp_send_stop(void) smp_call_function(stop_this_cpu, 0, 0); } -void arch_send_call_function_ipi(cpumask_t mask) +void arch_send_call_function_ipi_mask(const struct cpumask *mask) { int cpu; - for_each_cpu_mask(cpu, mask) + for_each_cpu(cpu, mask) plat_send_ipi(cpu, SMP_MSG_FUNCTION); } diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S index a9fff9f731e..f9e21fa2f59 100644 --- a/arch/sh/kernel/syscalls_32.S +++ b/arch/sh/kernel/syscalls_32.S @@ -352,3 +352,4 @@ ENTRY(sys_call_table) .long sys_preadv .long sys_pwritev .long sys_rt_tgsigqueueinfo /* 335 */ + .long sys_perf_counter_open diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S index 75c1889af1e..bf420b616ae 100644 --- a/arch/sh/kernel/syscalls_64.S +++ b/arch/sh/kernel/syscalls_64.S @@ -390,3 +390,4 @@ sys_call_table: .long sys_preadv .long sys_pwritev .long sys_rt_tgsigqueueinfo + .long sys_perf_counter_open diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index 2edde32c764..9b352a1e3fb 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c @@ -91,21 +91,6 @@ module_init(rtc_generic_init); void (*board_time_init)(void); -unsigned long long sched_clock(void) -{ - return (jiffies_64 - INITIAL_JIFFIES) * (NSEC_PER_SEC / HZ); -} - -static void __init sh_late_time_init(void) -{ - /* - * Make sure all compiled-in early timers register themselves. - * Run probe() for one "earlytimer" device. - */ - early_platform_driver_register_all("earlytimer"); - early_platform_driver_probe("earlytimer", 1, 0); -} - void __init time_init(void) { if (board_time_init) @@ -121,5 +106,15 @@ void __init time_init(void) local_timer_setup(smp_processor_id()); #endif - late_time_init = sh_late_time_init; + /* + * Make sure all compiled-in early timers register themselves. + * + * Run probe() for two "earlytimer" devices, these will be the + * clockevents and clocksource devices respectively. In the event + * that only a clockevents device is available, we -ENODEV on the + * clocksource and the jiffies clocksource is used transparently + * instead. No error handling is necessary here. + */ + early_platform_driver_register_all("earlytimer"); + early_platform_driver_probe("earlytimer", 2, 0); } diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c index 46348ed07cc..b3e0067db35 100644 --- a/arch/sh/kernel/traps.c +++ b/arch/sh/kernel/traps.c @@ -69,6 +69,7 @@ BUILD_TRAP_HANDLER(bug) insn_size_t insn = *(insn_size_t *)instruction_pointer(regs); if (insn == TRAPA_BUG_OPCODE) handle_BUG(regs); + return; } #endif diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile index 4bacb9e8347..334bb2da36e 100644 --- a/arch/sh/lib64/Makefile +++ b/arch/sh/lib64/Makefile @@ -10,7 +10,7 @@ # # Panic should really be compiled as PIC -lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o memset.o \ +lib-y := udelay.o dbg.o panic.o memcpy.o memset.o \ copy_user_memcpy.o copy_page.o clear_page.o strcpy.o strlen.o # Extracted from libgcc diff --git a/arch/sh/lib64/c-checksum.c b/arch/sh/lib64/c-checksum.c deleted file mode 100644 index 73c0877e3a2..00000000000 --- a/arch/sh/lib64/c-checksum.c +++ /dev/null @@ -1,214 +0,0 @@ -/* - * arch/sh/lib64/c-checksum.c - * - * This file contains network checksum routines that are better done - * in an architecture-specific manner due to speed.. - */ -#include <linux/string.h> -#include <linux/errno.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <asm/byteorder.h> -#include <asm/uaccess.h> - -static inline unsigned short from64to16(unsigned long long x) -{ - /* add up 32-bit words for 33 bits */ - x = (x & 0xffffffff) + (x >> 32); - /* add up 16-bit and 17-bit words for 17+c bits */ - x = (x & 0xffff) + (x >> 16); - /* add up 16-bit and 2-bit for 16+c bit */ - x = (x & 0xffff) + (x >> 16); - /* add up carry.. */ - x = (x & 0xffff) + (x >> 16); - return x; -} - -static inline unsigned short foldto16(unsigned long x) -{ - /* add up 16-bit for 17 bits */ - x = (x & 0xffff) + (x >> 16); - /* add up carry.. */ - x = (x & 0xffff) + (x >> 16); - return x; -} - -static inline unsigned short myfoldto16(unsigned long long x) -{ - /* Fold down to 32-bits so we don't lose in the typedef-less - network stack. */ - /* 64 to 33 */ - x = (x & 0xffffffff) + (x >> 32); - /* 33 to 32 */ - x = (x & 0xffffffff) + (x >> 32); - - /* add up 16-bit for 17 bits */ - x = (x & 0xffff) + (x >> 16); - /* add up carry.. */ - x = (x & 0xffff) + (x >> 16); - return x; -} - -#define odd(x) ((x)&1) -#define U16(x) ntohs(x) - -static unsigned long do_csum(const unsigned char *buff, int len) -{ - int odd, count; - unsigned long result = 0; - - pr_debug("do_csum buff %p, len %d (0x%x)\n", buff, len, len); -#ifdef DEBUG - for (i = 0; i < len; i++) { - if ((i % 26) == 0) - printk("\n"); - printk("%02X ", buff[i]); - } -#endif - - if (len <= 0) - goto out; - - odd = 1 & (unsigned long) buff; - if (odd) { - result = *buff << 8; - len--; - buff++; - } - count = len >> 1; /* nr of 16-bit words.. */ - if (count) { - if (2 & (unsigned long) buff) { - result += *(unsigned short *) buff; - count--; - len -= 2; - buff += 2; - } - count >>= 1; /* nr of 32-bit words.. */ - if (count) { - unsigned long carry = 0; - do { - unsigned long w = *(unsigned long *) buff; - buff += 4; - count--; - result += carry; - result += w; - carry = (w > result); - } while (count); - result += carry; - result = (result & 0xffff) + (result >> 16); - } - if (len & 2) { - result += *(unsigned short *) buff; - buff += 2; - } - } - if (len & 1) - result += *buff; - result = foldto16(result); - if (odd) - result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); - - pr_debug("\nCHECKSUM is 0x%lx\n", result); - - out: - return result; -} - -/* computes the checksum of a memory block at buff, length len, - and adds in "sum" (32-bit) */ -__wsum csum_partial(const void *buff, int len, __wsum sum) -{ - unsigned long long result = do_csum(buff, len); - - /* add in old sum, and carry.. */ - result += (__force u32)sum; - /* 32+c bits -> 32 bits */ - result = (result & 0xffffffff) + (result >> 32); - - pr_debug("csum_partial, buff %p len %d sum 0x%x result=0x%016Lx\n", - buff, len, sum, result); - - return (__force __wsum)result; -} - -/* Copy while checksumming, otherwise like csum_partial. */ -__wsum -csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) -{ - sum = csum_partial(src, len, sum); - memcpy(dst, src, len); - - return sum; -} - -/* Copy from userspace and compute checksum. If we catch an exception - then zero the rest of the buffer. */ -__wsum -csum_partial_copy_from_user(const void __user *src, void *dst, int len, - __wsum sum, int *err_ptr) -{ - int missing; - - pr_debug - ("csum_partial_copy_from_user src %p, dest %p, len %d, sum %08x, err_ptr %p\n", - src, dst, len, sum, err_ptr); - missing = copy_from_user(dst, src, len); - pr_debug(" access_ok %d\n", __access_ok((unsigned long) src, len)); - pr_debug(" missing %d\n", missing); - if (missing) { - memset(dst + len - missing, 0, missing); - *err_ptr = -EFAULT; - } - - return csum_partial(dst, len, sum); -} - -/* Copy to userspace and compute checksum. */ -__wsum -csum_partial_copy_to_user(const unsigned char *src, unsigned char *dst, int len, - __wsum sum, int *err_ptr) -{ - sum = csum_partial(src, len, sum); - - if (copy_to_user(dst, src, len)) - *err_ptr = -EFAULT; - - return sum; -} - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - */ -__sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - pr_debug("ip_fast_csum %p,%d\n", iph, ihl); - - return (__force __sum16)~do_csum(iph, ihl * 4); -} - -__wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, __wsum sum) -{ - unsigned long long result; - - pr_debug("ntohs(0x%x)=0x%x\n", 0xdead, ntohs(0xdead)); - pr_debug("htons(0x%x)=0x%x\n", 0xdead, htons(0xdead)); - - result = (__force u64) saddr + (__force u64) daddr + - (__force u64) sum + ((len + proto) << 8); - - /* Fold down to 32-bits so we don't lose in the typedef-less - network stack. */ - /* 64 to 33 */ - result = (result & 0xffffffff) + (result >> 32); - /* 33 to 32 */ - result = (result & 0xffffffff) + (result >> 32); - - pr_debug("%s saddr %x daddr %x len %x proto %x sum %x result %08Lx\n", - __func__, saddr, daddr, len, proto, sum, result); - - return (__wsum)result; -} -EXPORT_SYMBOL(csum_tcpudp_nofold); diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index cf56a2af5fe..2964f5f4a7e 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -184,6 +184,9 @@ static void sh_cmt_disable(struct sh_cmt_priv *p) /* disable channel */ sh_cmt_start_stop_ch(p, 0); + /* disable interrupts in CMT block */ + sh_cmt_write(p, CMCSR, 0); + /* stop clock */ clk_disable(p->clk); } @@ -599,7 +602,6 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev) p->irqaction.handler = sh_cmt_interrupt; p->irqaction.dev_id = p; p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; - p->irqaction.mask = CPU_MASK_NONE; ret = setup_irq(irq, &p->irqaction); if (ret) { pr_err("sh_cmt: failed to request irq %d\n", irq); diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c index d1ae75454d1..973e714d605 100644 --- a/drivers/clocksource/sh_mtu2.c +++ b/drivers/clocksource/sh_mtu2.c @@ -283,7 +283,6 @@ static int sh_mtu2_setup(struct sh_mtu2_priv *p, struct platform_device *pdev) p->irqaction.dev_id = p; p->irqaction.irq = irq; p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; - p->irqaction.mask = CPU_MASK_NONE; /* get hold of clock */ p->clk = clk_get(&p->pdev->dev, cfg->clk); diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index d6ea4398bf6..9ffb05f4095 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -138,6 +138,9 @@ static void sh_tmu_disable(struct sh_tmu_priv *p) /* disable channel */ sh_tmu_start_stop_ch(p, 0); + /* disable interrupts in TMU block */ + sh_tmu_write(p, TCR, 0x0000); + /* stop clock */ clk_disable(p->clk); } @@ -385,7 +388,6 @@ static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev) p->irqaction.dev_id = p; p->irqaction.irq = irq; p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL; - p->irqaction.mask = CPU_MASK_NONE; /* get hold of clock */ p->clk = clk_get(&p->pdev->dev, cfg->clk); diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index a4cf1079b31..66f52674ca0 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c @@ -1332,44 +1332,46 @@ err_unreg: return ret; } -static int sci_suspend(struct platform_device *dev, pm_message_t state) +static int sci_suspend(struct device *dev) { - struct sh_sci_priv *priv = platform_get_drvdata(dev); + struct sh_sci_priv *priv = dev_get_drvdata(dev); struct sci_port *p; unsigned long flags; spin_lock_irqsave(&priv->lock, flags); list_for_each_entry(p, &priv->ports, node) uart_suspend_port(&sci_uart_driver, &p->port); - spin_unlock_irqrestore(&priv->lock, flags); return 0; } -static int sci_resume(struct platform_device *dev) +static int sci_resume(struct device *dev) { - struct sh_sci_priv *priv = platform_get_drvdata(dev); + struct sh_sci_priv *priv = dev_get_drvdata(dev); struct sci_port *p; unsigned long flags; spin_lock_irqsave(&priv->lock, flags); list_for_each_entry(p, &priv->ports, node) uart_resume_port(&sci_uart_driver, &p->port); - spin_unlock_irqrestore(&priv->lock, flags); return 0; } +static struct dev_pm_ops sci_dev_pm_ops = { + .suspend = sci_suspend, + .resume = sci_resume, +}; + static struct platform_driver sci_driver = { .probe = sci_probe, .remove = __devexit_p(sci_remove), - .suspend = sci_suspend, - .resume = sci_resume, .driver = { .name = "sh-sci", .owner = THIS_MODULE, + .pm = &sci_dev_pm_ops, }, }; diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c index d687a9b93d0..3dd231a643b 100644 --- a/drivers/sh/intc.c +++ b/drivers/sh/intc.c @@ -20,7 +20,6 @@ #include <linux/module.h> #include <linux/io.h> #include <linux/interrupt.h> -#include <linux/bootmem.h> #include <linux/sh_intc.h> #include <linux/sysdev.h> #include <linux/list.h> @@ -675,7 +674,7 @@ void __init register_intc_controller(struct intc_desc *desc) unsigned int i, k, smp; struct intc_desc_int *d; - d = alloc_bootmem(sizeof(*d)); + d = kzalloc(sizeof(*d), GFP_NOWAIT); INIT_LIST_HEAD(&d->list); list_add(&d->list, &intc_list); @@ -687,9 +686,9 @@ void __init register_intc_controller(struct intc_desc *desc) #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0; #endif - d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); + d->reg = kzalloc(d->nr_reg * sizeof(*d->reg), GFP_NOWAIT); #ifdef CONFIG_SMP - d->smp = alloc_bootmem(d->nr_reg * sizeof(*d->smp)); + d->smp = kzalloc(d->nr_reg * sizeof(*d->smp), GFP_NOWAIT); #endif k = 0; @@ -702,7 +701,7 @@ void __init register_intc_controller(struct intc_desc *desc) } if (desc->prio_regs) { - d->prio = alloc_bootmem(desc->nr_vectors * sizeof(*d->prio)); + d->prio = kzalloc(desc->nr_vectors * sizeof(*d->prio), GFP_NOWAIT); for (i = 0; i < desc->nr_prio_regs; i++) { smp = IS_SMP(desc->prio_regs[i]); @@ -712,7 +711,7 @@ void __init register_intc_controller(struct intc_desc *desc) } if (desc->sense_regs) { - d->sense = alloc_bootmem(desc->nr_vectors * sizeof(*d->sense)); + d->sense = kzalloc(desc->nr_vectors * sizeof(*d->sense), GFP_NOWAIT); for (i = 0; i < desc->nr_sense_regs; i++) { k += save_reg(d, k, desc->sense_regs[i].reg, 0); @@ -757,7 +756,7 @@ void __init register_intc_controller(struct intc_desc *desc) vect2->enum_id = 0; if (!intc_evt2irq_table) - intc_evt2irq_table = alloc_bootmem(NR_IRQS); + intc_evt2irq_table = kzalloc(NR_IRQS, GFP_NOWAIT); if (!intc_evt2irq_table) { pr_warning("intc: cannot allocate evt2irq!\n"); |