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-rw-r--r--arch/ppc64/kernel/pmac_feature.c60
-rw-r--r--arch/ppc64/kernel/pmac_nvram.c30
-rw-r--r--arch/ppc64/kernel/pmac_pci.c12
-rw-r--r--arch/ppc64/kernel/pmac_setup.c10
-rw-r--r--arch/ppc64/kernel/pmac_smp.c2
-rw-r--r--arch/ppc64/kernel/pmac_time.c4
-rw-r--r--drivers/ide/ppc/pmac.c80
-rw-r--r--drivers/macintosh/ans-lcd.c10
-rw-r--r--drivers/macintosh/mediabay.c56
-rw-r--r--drivers/macintosh/via-cuda.c1
-rw-r--r--drivers/macintosh/via-pmu.c129
-rw-r--r--drivers/macintosh/via-pmu68k.c15
12 files changed, 203 insertions, 206 deletions
diff --git a/arch/ppc64/kernel/pmac_feature.c b/arch/ppc64/kernel/pmac_feature.c
index eb4e6c3f694..26075f11db7 100644
--- a/arch/ppc64/kernel/pmac_feature.c
+++ b/arch/ppc64/kernel/pmac_feature.c
@@ -53,7 +53,7 @@
* We use a single global lock to protect accesses. Each driver has
* to take care of its own locking
*/
-static DEFINE_SPINLOCK(feature_lock __pmacdata);
+static DEFINE_SPINLOCK(feature_lock);
#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
@@ -62,9 +62,9 @@ static DEFINE_SPINLOCK(feature_lock __pmacdata);
/*
* Instance of some macio stuffs
*/
-struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata;
+struct macio_chip macio_chips[MAX_MACIO_CHIPS] ;
-struct macio_chip* __pmac macio_find(struct device_node* child, int type)
+struct macio_chip* macio_find(struct device_node* child, int type)
{
while(child) {
int i;
@@ -79,7 +79,7 @@ struct macio_chip* __pmac macio_find(struct device_node* child, int type)
}
EXPORT_SYMBOL_GPL(macio_find);
-static const char* macio_names[] __pmacdata =
+static const char* macio_names[] =
{
"Unknown",
"Grand Central",
@@ -106,9 +106,9 @@ static const char* macio_names[] __pmacdata =
#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
-static struct device_node* uninorth_node __pmacdata;
-static u32* uninorth_base __pmacdata;
-static u32 uninorth_rev __pmacdata;
+static struct device_node* uninorth_node;
+static u32* uninorth_base;
+static u32 uninorth_rev;
static void *u3_ht;
extern struct device_node *k2_skiplist[2];
@@ -133,14 +133,14 @@ struct pmac_mb_def
struct feature_table_entry* features;
unsigned long board_flags;
};
-static struct pmac_mb_def pmac_mb __pmacdata;
+static struct pmac_mb_def pmac_mb;
/*
* Here are the chip specific feature functions
*/
-static long __pmac g5_read_gpio(struct device_node* node, long param, long value)
+static long g5_read_gpio(struct device_node* node, long param, long value)
{
struct macio_chip* macio = &macio_chips[0];
@@ -148,7 +148,7 @@ static long __pmac g5_read_gpio(struct device_node* node, long param, long value
}
-static long __pmac g5_write_gpio(struct device_node* node, long param, long value)
+static long g5_write_gpio(struct device_node* node, long param, long value)
{
struct macio_chip* macio = &macio_chips[0];
@@ -156,7 +156,7 @@ static long __pmac g5_write_gpio(struct device_node* node, long param, long valu
return 0;
}
-static long __pmac g5_gmac_enable(struct device_node* node, long param, long value)
+static long g5_gmac_enable(struct device_node* node, long param, long value)
{
struct macio_chip* macio = &macio_chips[0];
unsigned long flags;
@@ -181,7 +181,7 @@ static long __pmac g5_gmac_enable(struct device_node* node, long param, long val
return 0;
}
-static long __pmac g5_fw_enable(struct device_node* node, long param, long value)
+static long g5_fw_enable(struct device_node* node, long param, long value)
{
struct macio_chip* macio = &macio_chips[0];
unsigned long flags;
@@ -206,7 +206,7 @@ static long __pmac g5_fw_enable(struct device_node* node, long param, long value
return 0;
}
-static long __pmac g5_mpic_enable(struct device_node* node, long param, long value)
+static long g5_mpic_enable(struct device_node* node, long param, long value)
{
unsigned long flags;
@@ -220,7 +220,7 @@ static long __pmac g5_mpic_enable(struct device_node* node, long param, long val
return 0;
}
-static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long value)
+static long g5_eth_phy_reset(struct device_node* node, long param, long value)
{
struct macio_chip* macio = &macio_chips[0];
struct device_node *phy;
@@ -250,7 +250,7 @@ static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long v
return 0;
}
-static long __pmac g5_i2s_enable(struct device_node *node, long param, long value)
+static long g5_i2s_enable(struct device_node *node, long param, long value)
{
/* Very crude implementation for now */
struct macio_chip* macio = &macio_chips[0];
@@ -275,7 +275,7 @@ static long __pmac g5_i2s_enable(struct device_node *node, long param, long valu
#ifdef CONFIG_SMP
-static long __pmac g5_reset_cpu(struct device_node* node, long param, long value)
+static long g5_reset_cpu(struct device_node* node, long param, long value)
{
unsigned int reset_io = 0;
unsigned long flags;
@@ -320,12 +320,12 @@ static long __pmac g5_reset_cpu(struct device_node* node, long param, long value
* This takes the second CPU off the bus on dual CPU machines
* running UP
*/
-void __pmac g5_phy_disable_cpu1(void)
+void g5_phy_disable_cpu1(void)
{
UN_OUT(U3_API_PHY_CONFIG_1, 0);
}
-static long __pmac generic_get_mb_info(struct device_node* node, long param, long value)
+static long generic_get_mb_info(struct device_node* node, long param, long value)
{
switch(param) {
case PMAC_MB_INFO_MODEL:
@@ -347,14 +347,14 @@ static long __pmac generic_get_mb_info(struct device_node* node, long param, lon
/* Used on any machine
*/
-static struct feature_table_entry any_features[] __pmacdata = {
+static struct feature_table_entry any_features[] = {
{ PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
{ 0, NULL }
};
/* G5 features
*/
-static struct feature_table_entry g5_features[] __pmacdata = {
+static struct feature_table_entry g5_features[] = {
{ PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
{ PMAC_FTR_1394_ENABLE, g5_fw_enable },
{ PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
@@ -368,7 +368,7 @@ static struct feature_table_entry g5_features[] __pmacdata = {
{ 0, NULL }
};
-static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
+static struct pmac_mb_def pmac_mb_defs[] = {
{ "PowerMac7,2", "PowerMac G5",
PMAC_TYPE_POWERMAC_G5, g5_features,
0,
@@ -394,7 +394,7 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
/*
* The toplevel feature_call callback
*/
-long __pmac pmac_do_feature_call(unsigned int selector, ...)
+long pmac_do_feature_call(unsigned int selector, ...)
{
struct device_node* node;
long param, value;
@@ -706,8 +706,8 @@ void __init pmac_check_ht_link(void)
* Early video resume hook
*/
-static void (*pmac_early_vresume_proc)(void *data) __pmacdata;
-static void *pmac_early_vresume_data __pmacdata;
+static void (*pmac_early_vresume_proc)(void *data);
+static void *pmac_early_vresume_data;
void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
{
@@ -725,11 +725,11 @@ EXPORT_SYMBOL(pmac_set_early_video_resume);
* AGP related suspend/resume code
*/
-static struct pci_dev *pmac_agp_bridge __pmacdata;
-static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata;
-static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata;
+static struct pci_dev *pmac_agp_bridge;
+static int (*pmac_agp_suspend)(struct pci_dev *bridge);
+static int (*pmac_agp_resume)(struct pci_dev *bridge);
-void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
+void pmac_register_agp_pm(struct pci_dev *bridge,
int (*suspend)(struct pci_dev *bridge),
int (*resume)(struct pci_dev *bridge))
{
@@ -746,7 +746,7 @@ void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
}
EXPORT_SYMBOL(pmac_register_agp_pm);
-void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
+void pmac_suspend_agp_for_card(struct pci_dev *dev)
{
if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
return;
@@ -756,7 +756,7 @@ void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
}
EXPORT_SYMBOL(pmac_suspend_agp_for_card);
-void __pmac pmac_resume_agp_for_card(struct pci_dev *dev)
+void pmac_resume_agp_for_card(struct pci_dev *dev)
{
if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
return;
diff --git a/arch/ppc64/kernel/pmac_nvram.c b/arch/ppc64/kernel/pmac_nvram.c
index e32a902236e..11586d535f8 100644
--- a/arch/ppc64/kernel/pmac_nvram.c
+++ b/arch/ppc64/kernel/pmac_nvram.c
@@ -82,10 +82,10 @@ extern int system_running;
static int (*core99_write_bank)(int bank, u8* datas);
static int (*core99_erase_bank)(int bank);
-static char *nvram_image __pmacdata;
+static char *nvram_image;
-static ssize_t __pmac core99_nvram_read(char *buf, size_t count, loff_t *index)
+static ssize_t core99_nvram_read(char *buf, size_t count, loff_t *index)
{
int i;
@@ -103,7 +103,7 @@ static ssize_t __pmac core99_nvram_read(char *buf, size_t count, loff_t *index)
return count;
}
-static ssize_t __pmac core99_nvram_write(char *buf, size_t count, loff_t *index)
+static ssize_t core99_nvram_write(char *buf, size_t count, loff_t *index)
{
int i;
@@ -121,14 +121,14 @@ static ssize_t __pmac core99_nvram_write(char *buf, size_t count, loff_t *index)
return count;
}
-static ssize_t __pmac core99_nvram_size(void)
+static ssize_t core99_nvram_size(void)
{
if (nvram_image == NULL)
return -ENODEV;
return NVRAM_SIZE;
}
-static u8 __pmac chrp_checksum(struct chrp_header* hdr)
+static u8 chrp_checksum(struct chrp_header* hdr)
{
u8 *ptr;
u16 sum = hdr->signature;
@@ -139,7 +139,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr)
return sum;
}
-static u32 __pmac core99_calc_adler(u8 *buffer)
+static u32 core99_calc_adler(u8 *buffer)
{
int cnt;
u32 low, high;
@@ -161,7 +161,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer)
return (high << 16) | low;
}
-static u32 __pmac core99_check(u8* datas)
+static u32 core99_check(u8* datas)
{
struct core99_header* hdr99 = (struct core99_header*)datas;
@@ -180,7 +180,7 @@ static u32 __pmac core99_check(u8* datas)
return hdr99->generation;
}
-static int __pmac sm_erase_bank(int bank)
+static int sm_erase_bank(int bank)
{
int stat, i;
unsigned long timeout;
@@ -212,7 +212,7 @@ static int __pmac sm_erase_bank(int bank)
return 0;
}
-static int __pmac sm_write_bank(int bank, u8* datas)
+static int sm_write_bank(int bank, u8* datas)
{
int i, stat = 0;
unsigned long timeout;
@@ -247,7 +247,7 @@ static int __pmac sm_write_bank(int bank, u8* datas)
return 0;
}
-static int __pmac amd_erase_bank(int bank)
+static int amd_erase_bank(int bank)
{
int i, stat = 0;
unsigned long timeout;
@@ -294,7 +294,7 @@ static int __pmac amd_erase_bank(int bank)
return 0;
}
-static int __pmac amd_write_bank(int bank, u8* datas)
+static int amd_write_bank(int bank, u8* datas)
{
int i, stat = 0;
unsigned long timeout;
@@ -341,7 +341,7 @@ static int __pmac amd_write_bank(int bank, u8* datas)
}
-static int __pmac core99_nvram_sync(void)
+static int core99_nvram_sync(void)
{
struct core99_header* hdr99;
unsigned long flags;
@@ -431,7 +431,7 @@ int __init pmac_nvram_init(void)
return 0;
}
-int __pmac pmac_get_partition(int partition)
+int pmac_get_partition(int partition)
{
struct nvram_partition *part;
const char *name;
@@ -459,7 +459,7 @@ int __pmac pmac_get_partition(int partition)
return part->index;
}
-u8 __pmac pmac_xpram_read(int xpaddr)
+u8 pmac_xpram_read(int xpaddr)
{
int offset = pmac_get_partition(pmac_nvram_XPRAM);
loff_t index;
@@ -476,7 +476,7 @@ u8 __pmac pmac_xpram_read(int xpaddr)
return buf;
}
-void __pmac pmac_xpram_write(int xpaddr, u8 data)
+void pmac_xpram_write(int xpaddr, u8 data)
{
int offset = pmac_get_partition(pmac_nvram_XPRAM);
loff_t index;
diff --git a/arch/ppc64/kernel/pmac_pci.c b/arch/ppc64/kernel/pmac_pci.c
index dc40a0cad0b..1f61aa4746e 100644
--- a/arch/ppc64/kernel/pmac_pci.c
+++ b/arch/ppc64/kernel/pmac_pci.c
@@ -121,7 +121,7 @@ static void __init fixup_bus_range(struct device_node *bridge)
|(((unsigned long)(off)) & 0xFCUL) \
|1UL)
-static unsigned long __pmac macrisc_cfg_access(struct pci_controller* hose,
+static unsigned long macrisc_cfg_access(struct pci_controller* hose,
u8 bus, u8 dev_fn, u8 offset)
{
unsigned int caddr;
@@ -142,7 +142,7 @@ static unsigned long __pmac macrisc_cfg_access(struct pci_controller* hose,
return ((unsigned long)hose->cfg_data) + offset;
}
-static int __pmac macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
+static int macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 *val)
{
struct pci_controller *hose;
@@ -173,7 +173,7 @@ static int __pmac macrisc_read_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_SUCCESSFUL;
}
-static int __pmac macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
+static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 val)
{
struct pci_controller *hose;
@@ -265,7 +265,7 @@ static int u3_ht_skip_device(struct pci_controller *hose,
+ (((unsigned long)bus) << 16) \
+ 0x01000000UL)
-static unsigned long __pmac u3_ht_cfg_access(struct pci_controller* hose,
+static unsigned long u3_ht_cfg_access(struct pci_controller* hose,
u8 bus, u8 devfn, u8 offset)
{
if (bus == hose->first_busno) {
@@ -277,7 +277,7 @@ static unsigned long __pmac u3_ht_cfg_access(struct pci_controller* hose,
return ((unsigned long)hose->cfg_data) + U3_HT_CFA1(bus, devfn, offset);
}
-static int __pmac u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
+static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 *val)
{
struct pci_controller *hose;
@@ -327,7 +327,7 @@ static int __pmac u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
return PCIBIOS_SUCCESSFUL;
}
-static int __pmac u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
+static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 val)
{
struct pci_controller *hose;
diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c
index 325426c7bed..1f5118078f7 100644
--- a/arch/ppc64/kernel/pmac_setup.c
+++ b/arch/ppc64/kernel/pmac_setup.c
@@ -98,7 +98,7 @@ EXPORT_SYMBOL(smu_cmdbuf_abs);
extern void udbg_init_scc(struct device_node *np);
-static void __pmac pmac_show_cpuinfo(struct seq_file *m)
+static void pmac_show_cpuinfo(struct seq_file *m)
{
struct device_node *np;
char *pp;
@@ -210,7 +210,7 @@ static int pmac_late_init(void)
late_initcall(pmac_late_init);
/* can't be __init - can be called whenever a disk is first accessed */
-void __pmac note_bootable_part(dev_t dev, int part, int goodness)
+void note_bootable_part(dev_t dev, int part, int goodness)
{
extern dev_t boot_dev;
char *p;
@@ -231,7 +231,7 @@ void __pmac note_bootable_part(dev_t dev, int part, int goodness)
}
}
-static void __pmac pmac_restart(char *cmd)
+static void pmac_restart(char *cmd)
{
switch(sys_ctrler) {
#ifdef CONFIG_ADB_PMU
@@ -250,7 +250,7 @@ static void __pmac pmac_restart(char *cmd)
}
}
-static void __pmac pmac_power_off(void)
+static void pmac_power_off(void)
{
switch(sys_ctrler) {
#ifdef CONFIG_ADB_PMU
@@ -268,7 +268,7 @@ static void __pmac pmac_power_off(void)
}
}
-static void __pmac pmac_halt(void)
+static void pmac_halt(void)
{
pmac_power_off();
}
diff --git a/arch/ppc64/kernel/pmac_smp.c b/arch/ppc64/kernel/pmac_smp.c
index a23de37227b..9fd23ea55bc 100644
--- a/arch/ppc64/kernel/pmac_smp.c
+++ b/arch/ppc64/kernel/pmac_smp.c
@@ -310,7 +310,7 @@ static void __init smp_core99_setup_cpu(int cpu_nr)
}
}
-struct smp_ops_t core99_smp_ops __pmacdata = {
+struct smp_ops_t core99_smp_ops = {
.message_pass = smp_mpic_message_pass,
.probe = smp_core99_probe,
.kick_cpu = smp_core99_kick_cpu,
diff --git a/arch/ppc64/kernel/pmac_time.c b/arch/ppc64/kernel/pmac_time.c
index 3059edb09cc..6c8c99295e7 100644
--- a/arch/ppc64/kernel/pmac_time.c
+++ b/arch/ppc64/kernel/pmac_time.c
@@ -51,7 +51,7 @@
extern struct timezone sys_tz;
extern void to_tm(int tim, struct rtc_time * tm);
-void __pmac pmac_get_rtc_time(struct rtc_time *tm)
+void pmac_get_rtc_time(struct rtc_time *tm)
{
switch(sys_ctrler) {
#ifdef CONFIG_ADB_PMU
@@ -92,7 +92,7 @@ void __pmac pmac_get_rtc_time(struct rtc_time *tm)
}
}
-int __pmac pmac_set_rtc_time(struct rtc_time *tm)
+int pmac_set_rtc_time(struct rtc_time *tm)
{
switch(sys_ctrler) {
#ifdef CONFIG_ADB_PMU
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 87d1f8a1f41..d8c3d8ebad3 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -81,7 +81,7 @@ typedef struct pmac_ide_hwif {
} pmac_ide_hwif_t;
-static pmac_ide_hwif_t pmac_ide[MAX_HWIFS] __pmacdata;
+static pmac_ide_hwif_t pmac_ide[MAX_HWIFS];
static int pmac_ide_count;
enum {
@@ -242,7 +242,7 @@ struct mdma_timings_t {
int cycleTime;
};
-struct mdma_timings_t mdma_timings_33[] __pmacdata =
+struct mdma_timings_t mdma_timings_33[] =
{
{ 240, 240, 480 },
{ 180, 180, 360 },
@@ -255,7 +255,7 @@ struct mdma_timings_t mdma_timings_33[] __pmacdata =
{ 0, 0, 0 }
};
-struct mdma_timings_t mdma_timings_33k[] __pmacdata =
+struct mdma_timings_t mdma_timings_33k[] =
{
{ 240, 240, 480 },
{ 180, 180, 360 },
@@ -268,7 +268,7 @@ struct mdma_timings_t mdma_timings_33k[] __pmacdata =
{ 0, 0, 0 }
};
-struct mdma_timings_t mdma_timings_66[] __pmacdata =
+struct mdma_timings_t mdma_timings_66[] =
{
{ 240, 240, 480 },
{ 180, 180, 360 },
@@ -286,7 +286,7 @@ struct {
int addrSetup; /* ??? */
int rdy2pause;
int wrDataSetup;
-} kl66_udma_timings[] __pmacdata =
+} kl66_udma_timings[] =
{
{ 0, 180, 120 }, /* Mode 0 */
{ 0, 150, 90 }, /* 1 */
@@ -301,7 +301,7 @@ struct kauai_timing {
u32 timing_reg;
};
-static struct kauai_timing kauai_pio_timings[] __pmacdata =
+static struct kauai_timing kauai_pio_timings[] =
{
{ 930 , 0x08000fff },
{ 600 , 0x08000a92 },
@@ -316,7 +316,7 @@ static struct kauai_timing kauai_pio_timings[] __pmacdata =
{ 120 , 0x04000148 }
};
-static struct kauai_timing kauai_mdma_timings[] __pmacdata =
+static struct kauai_timing kauai_mdma_timings[] =
{
{ 1260 , 0x00fff000 },
{ 480 , 0x00618000 },
@@ -330,7 +330,7 @@ static struct kauai_timing kauai_mdma_timings[] __pmacdata =
{ 0 , 0 },
};
-static struct kauai_timing kauai_udma_timings[] __pmacdata =
+static struct kauai_timing kauai_udma_timings[] =
{
{ 120 , 0x000070c0 },
{ 90 , 0x00005d80 },
@@ -341,7 +341,7 @@ static struct kauai_timing kauai_udma_timings[] __pmacdata =
{ 0 , 0 },
};
-static struct kauai_timing shasta_pio_timings[] __pmacdata =
+static struct kauai_timing shasta_pio_timings[] =
{
{ 930 , 0x08000fff },
{ 600 , 0x0A000c97 },
@@ -356,7 +356,7 @@ static struct kauai_timing shasta_pio_timings[] __pmacdata =
{ 120 , 0x0400010a }
};
-static struct kauai_timing shasta_mdma_timings[] __pmacdata =
+static struct kauai_timing shasta_mdma_timings[] =
{
{ 1260 , 0x00fff000 },
{ 480 , 0x00820800 },
@@ -370,7 +370,7 @@ static struct kauai_timing shasta_mdma_timings[] __pmacdata =
{ 0 , 0 },
};
-static struct kauai_timing shasta_udma133_timings[] __pmacdata =
+static struct kauai_timing shasta_udma133_timings[] =
{
{ 120 , 0x00035901, },
{ 90 , 0x000348b1, },
@@ -522,7 +522,7 @@ pmu_hd_blink_init(void)
* N.B. this can't be an initfunc, because the media-bay task can
* call ide_[un]register at any time.
*/
-void __pmac
+void
pmac_ide_init_hwif_ports(hw_regs_t *hw,
unsigned long data_port, unsigned long ctrl_port,
int *irq)
@@ -559,7 +559,7 @@ pmac_ide_init_hwif_ports(hw_regs_t *hw,
* timing register when selecting that unit. This version is for
* ASICs with a single timing register
*/
-static void __pmac
+static void
pmac_ide_selectproc(ide_drive_t *drive)
{
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -579,7 +579,7 @@ pmac_ide_selectproc(ide_drive_t *drive)
* timing register when selecting that unit. This version is for
* ASICs with a dual timing register (Kauai)
*/
-static void __pmac
+static void
pmac_ide_kauai_selectproc(ide_drive_t *drive)
{
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -600,7 +600,7 @@ pmac_ide_kauai_selectproc(ide_drive_t *drive)
/*
* Force an update of controller timing values for a given drive
*/
-static void __pmac
+static void
pmac_ide_do_update_timings(ide_drive_t *drive)
{
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -633,7 +633,7 @@ pmac_outbsync(ide_drive_t *drive, u8 value, unsigned long port)
* to sort that out sooner or later and see if I can finally get the
* common version to work properly in all cases
*/
-static int __pmac
+static int
pmac_ide_do_setfeature(ide_drive_t *drive, u8 command)
{
ide_hwif_t *hwif = HWIF(drive);
@@ -710,7 +710,7 @@ out:
/*
* Old tuning functions (called on hdparm -p), sets up drive PIO timings
*/
-static void __pmac
+static void
pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
{
ide_pio_data_t d;
@@ -801,7 +801,7 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
/*
* Calculate KeyLargo ATA/66 UDMA timings
*/
-static int __pmac
+static int
set_timings_udma_ata4(u32 *timings, u8 speed)
{
unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks;
@@ -829,7 +829,7 @@ set_timings_udma_ata4(u32 *timings, u8 speed)
/*
* Calculate Kauai ATA/100 UDMA timings
*/
-static int __pmac
+static int
set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
{
struct ide_timing *t = ide_timing_find_mode(speed);
@@ -849,7 +849,7 @@ set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
/*
* Calculate Shasta ATA/133 UDMA timings
*/
-static int __pmac
+static int
set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
{
struct ide_timing *t = ide_timing_find_mode(speed);
@@ -869,7 +869,7 @@ set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
/*
* Calculate MDMA timings for all cells
*/
-static int __pmac
+static int
set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
u8 speed, int drive_cycle_time)
{
@@ -1014,7 +1014,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
* our dedicated function is more precise as it uses the drive provided
* cycle time value. We should probably fix this one to deal with that too...
*/
-static int __pmac
+static int
pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
{
int unit = (drive->select.b.unit & 0x01);
@@ -1092,7 +1092,7 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
* Blast some well known "safe" values to the timing registers at init or
* wakeup from sleep time, before we do real calculation
*/
-static void __pmac
+static void
sanitize_timings(pmac_ide_hwif_t *pmif)
{
unsigned int value, value2 = 0;
@@ -1123,13 +1123,13 @@ sanitize_timings(pmac_ide_hwif_t *pmif)
pmif->timings[2] = pmif->timings[3] = value2;
}
-unsigned long __pmac
+unsigned long
pmac_ide_get_base(int index)
{
return pmac_ide[index].regbase;
}
-int __pmac
+int
pmac_ide_check_base(unsigned long base)
{
int ix;
@@ -1140,7 +1140,7 @@ pmac_ide_check_base(unsigned long base)
return -1;
}
-int __pmac
+int
pmac_ide_get_irq(unsigned long base)
{
int ix;
@@ -1151,7 +1151,7 @@ pmac_ide_get_irq(unsigned long base)
return 0;
}
-static int ide_majors[] __pmacdata = { 3, 22, 33, 34, 56, 57 };
+static int ide_majors[] = { 3, 22, 33, 34, 56, 57 };
dev_t __init
pmac_find_ide_boot(char *bootdevice, int n)
@@ -1701,7 +1701,7 @@ pmac_ide_probe(void)
* pmac_ide_build_dmatable builds the DBDMA command list
* for a transfer and sets the DBDMA channel to point to it.
*/
-static int __pmac
+static int
pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
{
struct dbdma_cmd *table;
@@ -1785,7 +1785,7 @@ pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
}
/* Teardown mappings after DMA has completed. */
-static void __pmac
+static void
pmac_ide_destroy_dmatable (ide_drive_t *drive)
{
ide_hwif_t *hwif = drive->hwif;
@@ -1802,7 +1802,7 @@ pmac_ide_destroy_dmatable (ide_drive_t *drive)
/*
* Pick up best MDMA timing for the drive and apply it
*/
-static int __pmac
+static int
pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode)
{
ide_hwif_t *hwif = HWIF(drive);
@@ -1859,7 +1859,7 @@ pmac_ide_mdma_enable(ide_drive_t *drive, u16 mode)
/*
* Pick up best UDMA timing for the drive and apply it
*/
-static int __pmac
+static int
pmac_ide_udma_enable(ide_drive_t *drive, u16 mode)
{
ide_hwif_t *hwif = HWIF(drive);
@@ -1915,7 +1915,7 @@ pmac_ide_udma_enable(ide_drive_t *drive, u16 mode)
* Check what is the best DMA timing setting for the drive and
* call appropriate functions to apply it.
*/
-static int __pmac
+static int
pmac_ide_dma_check(ide_drive_t *drive)
{
struct hd_driveid *id = drive->id;
@@ -1967,7 +1967,7 @@ pmac_ide_dma_check(ide_drive_t *drive)
* Prepare a DMA transfer. We build the DMA table, adjust the timings for
* a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
*/
-static int __pmac
+static int
pmac_ide_dma_setup(ide_drive_t *drive)
{
ide_hwif_t *hwif = HWIF(drive);
@@ -1997,7 +1997,7 @@ pmac_ide_dma_setup(ide_drive_t *drive)
return 0;
}
-static void __pmac
+static void
pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
{
/* issue cmd to drive */
@@ -2008,7 +2008,7 @@ pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
* Kick the DMA controller into life after the DMA command has been issued
* to the drive.
*/
-static void __pmac
+static void
pmac_ide_dma_start(ide_drive_t *drive)
{
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2024,7 +2024,7 @@ pmac_ide_dma_start(ide_drive_t *drive)
/*
* After a DMA transfer, make sure the controller is stopped
*/
-static int __pmac
+static int
pmac_ide_dma_end (ide_drive_t *drive)
{
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2052,7 +2052,7 @@ pmac_ide_dma_end (ide_drive_t *drive)
* that's not implemented yet), on the other hand, we don't have shared interrupts
* so it's not really a problem
*/
-static int __pmac
+static int
pmac_ide_dma_test_irq (ide_drive_t *drive)
{
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
@@ -2108,19 +2108,19 @@ pmac_ide_dma_test_irq (ide_drive_t *drive)
return 1;
}
-static int __pmac
+static int
pmac_ide_dma_host_off (ide_drive_t *drive)
{
return 0;
}
-static int __pmac
+static int
pmac_ide_dma_host_on (ide_drive_t *drive)
{
return 0;
}
-static int __pmac
+static int
pmac_ide_dma_lostirq (ide_drive_t *drive)
{
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
diff --git a/drivers/macintosh/ans-lcd.c b/drivers/macintosh/ans-lcd.c
index 5e0811dc653..2b8a6e821d4 100644
--- a/drivers/macintosh/ans-lcd.c
+++ b/drivers/macintosh/ans-lcd.c
@@ -27,7 +27,7 @@ static volatile unsigned char __iomem *anslcd_ptr;
#undef DEBUG
-static void __pmac
+static void
anslcd_write_byte_ctrl ( unsigned char c )
{
#ifdef DEBUG
@@ -43,14 +43,14 @@ anslcd_write_byte_ctrl ( unsigned char c )
}
}
-static void __pmac
+static void
anslcd_write_byte_data ( unsigned char c )
{
out_8(anslcd_ptr + ANSLCD_DATA_IX, c);
udelay(anslcd_short_delay);
}
-static ssize_t __pmac
+static ssize_t
anslcd_write( struct file * file, const char __user * buf,
size_t count, loff_t *ppos )
{
@@ -73,7 +73,7 @@ anslcd_write( struct file * file, const char __user * buf,
return p - buf;
}
-static int __pmac
+static int
anslcd_ioctl( struct inode * inode, struct file * file,
unsigned int cmd, unsigned long arg )
{
@@ -115,7 +115,7 @@ anslcd_ioctl( struct inode * inode, struct file * file,
}
}
-static int __pmac
+static int
anslcd_open( struct inode * inode, struct file * file )
{
return 0;
diff --git a/drivers/macintosh/mediabay.c b/drivers/macintosh/mediabay.c
index c0712a1ea5a..b856bb67169 100644
--- a/drivers/macintosh/mediabay.c
+++ b/drivers/macintosh/mediabay.c
@@ -167,19 +167,19 @@ enum {
* Functions for polling content of media bay
*/
-static u8 __pmac
+static u8
ohare_mb_content(struct media_bay_info *bay)
{
return (MB_IN32(bay, OHARE_MBCR) >> 12) & 7;
}
-static u8 __pmac
+static u8
heathrow_mb_content(struct media_bay_info *bay)
{
return (MB_IN32(bay, HEATHROW_MBCR) >> 12) & 7;
}
-static u8 __pmac
+static u8
keylargo_mb_content(struct media_bay_info *bay)
{
int new_gpio;
@@ -205,7 +205,7 @@ keylargo_mb_content(struct media_bay_info *bay)
* into reset state as well
*/
-static void __pmac
+static void
ohare_mb_power(struct media_bay_info* bay, int on_off)
{
if (on_off) {
@@ -224,7 +224,7 @@ ohare_mb_power(struct media_bay_info* bay, int on_off)
MB_BIC(bay, OHARE_MBCR, 0x00000F00);
}
-static void __pmac
+static void
heathrow_mb_power(struct media_bay_info* bay, int on_off)
{
if (on_off) {
@@ -243,7 +243,7 @@ heathrow_mb_power(struct media_bay_info* bay, int on_off)
MB_BIC(bay, HEATHROW_MBCR, 0x00000F00);
}
-static void __pmac
+static void
keylargo_mb_power(struct media_bay_info* bay, int on_off)
{
if (on_off) {
@@ -267,7 +267,7 @@ keylargo_mb_power(struct media_bay_info* bay, int on_off)
* enable the related busses
*/
-static int __pmac
+static int
ohare_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
{
switch(device_id) {
@@ -287,7 +287,7 @@ ohare_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
return -ENODEV;
}
-static int __pmac
+static int
heathrow_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
{
switch(device_id) {
@@ -307,7 +307,7 @@ heathrow_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
return -ENODEV;
}
-static int __pmac
+static int
keylargo_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
{
switch(device_id) {
@@ -330,43 +330,43 @@ keylargo_mb_setup_bus(struct media_bay_info* bay, u8 device_id)
* Functions for tweaking resets
*/
-static void __pmac
+static void
ohare_mb_un_reset(struct media_bay_info* bay)
{
MB_BIS(bay, OHARE_FCR, OH_BAY_RESET_N);
}
-static void __pmac keylargo_mb_init(struct media_bay_info *bay)
+static void keylargo_mb_init(struct media_bay_info *bay)
{
MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_ENABLE);
}
-static void __pmac heathrow_mb_un_reset(struct media_bay_info* bay)
+static void heathrow_mb_un_reset(struct media_bay_info* bay)
{
MB_BIS(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
}
-static void __pmac keylargo_mb_un_reset(struct media_bay_info* bay)
+static void keylargo_mb_un_reset(struct media_bay_info* bay)
{
MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
}
-static void __pmac ohare_mb_un_reset_ide(struct media_bay_info* bay)
+static void ohare_mb_un_reset_ide(struct media_bay_info* bay)
{
MB_BIS(bay, OHARE_FCR, OH_IDE1_RESET_N);
}
-static void __pmac heathrow_mb_un_reset_ide(struct media_bay_info* bay)
+static void heathrow_mb_un_reset_ide(struct media_bay_info* bay)
{
MB_BIS(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
}
-static void __pmac keylargo_mb_un_reset_ide(struct media_bay_info* bay)
+static void keylargo_mb_un_reset_ide(struct media_bay_info* bay)
{
MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
}
-static inline void __pmac set_mb_power(struct media_bay_info* bay, int onoff)
+static inline void set_mb_power(struct media_bay_info* bay, int onoff)
{
/* Power up up and assert the bay reset line */
if (onoff) {
@@ -382,7 +382,7 @@ static inline void __pmac set_mb_power(struct media_bay_info* bay, int